static void
radial_gradient(struct ureg_program *ureg,
struct ureg_dst out,
struct ureg_src pos,
struct ureg_src sampler,
struct ureg_src coords,
struct ureg_src const0124,
struct ureg_src matrow0,
struct ureg_src matrow1, struct ureg_src matrow2)
{
struct ureg_dst temp0 = ureg_DECL_temporary(ureg);
struct ureg_dst temp1 = ureg_DECL_temporary(ureg);
struct ureg_dst temp2 = ureg_DECL_temporary(ureg);
struct ureg_dst temp3 = ureg_DECL_temporary(ureg);
struct ureg_dst temp4 = ureg_DECL_temporary(ureg);
struct ureg_dst temp5 = ureg_DECL_temporary(ureg);
ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
ureg_MOV(ureg,
ureg_writemask(temp0, TGSI_WRITEMASK_Z),
ureg_scalar(const0124, TGSI_SWIZZLE_Y));
ureg_DP3(ureg, temp1, matrow0, ureg_src(temp0));
ureg_DP3(ureg, temp2, matrow1, ureg_src(temp0));
ureg_DP3(ureg, temp3, matrow2, ureg_src(temp0));
ureg_RCP(ureg, temp3, ureg_src(temp3));
ureg_MUL(ureg, temp1, ureg_src(temp1), ureg_src(temp3));
ureg_MUL(ureg, temp2, ureg_src(temp2), ureg_src(temp3));
ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_X), ureg_src(temp1));
ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_Y), ureg_src(temp2));
ureg_MUL(ureg, temp0, ureg_scalar(coords, TGSI_SWIZZLE_Y),
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_Y));
ureg_MAD(ureg, temp1,
ureg_scalar(coords, TGSI_SWIZZLE_X),
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_X), ureg_src(temp0));
ureg_ADD(ureg, temp1, ureg_src(temp1), ureg_src(temp1));
ureg_MUL(ureg, temp3,
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_Y),
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_Y));
ureg_MAD(ureg, temp4,
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_X),
ureg_scalar(ureg_src(temp5), TGSI_SWIZZLE_X), ureg_src(temp3));
ureg_MOV(ureg, temp4, ureg_negate(ureg_src(temp4)));
ureg_MUL(ureg, temp2, ureg_scalar(coords, TGSI_SWIZZLE_Z), ureg_src(temp4));
ureg_MUL(ureg, temp0,
ureg_scalar(const0124, TGSI_SWIZZLE_W), ureg_src(temp2));
ureg_MUL(ureg, temp3, ureg_src(temp1), ureg_src(temp1));
ureg_SUB(ureg, temp2, ureg_src(temp3), ureg_src(temp0));
ureg_RSQ(ureg, temp2, ureg_abs(ureg_src(temp2)));
ureg_RCP(ureg, temp2, ureg_src(temp2));
ureg_SUB(ureg, temp1, ureg_src(temp2), ureg_src(temp1));
ureg_ADD(ureg, temp0,
ureg_scalar(coords, TGSI_SWIZZLE_Z),
ureg_scalar(coords, TGSI_SWIZZLE_Z));
ureg_RCP(ureg, temp0, ureg_src(temp0));
ureg_MUL(ureg, temp2, ureg_src(temp1), ureg_src(temp0));
ureg_TEX(ureg, out, TGSI_TEXTURE_1D, ureg_src(temp2), sampler);
ureg_release_temporary(ureg, temp0);
ureg_release_temporary(ureg, temp1);
ureg_release_temporary(ureg, temp2);
ureg_release_temporary(ureg, temp3);
ureg_release_temporary(ureg, temp4);
ureg_release_temporary(ureg, temp5);
}
static void
compile_instruction(
struct gl_context *ctx,
struct st_translate *t,
const struct prog_instruction *inst,
boolean clamp_dst_color_output)
{
struct ureg_program *ureg = t->ureg;
GLuint i;
struct ureg_dst dst[1] = { { 0 } };
struct ureg_src src[4];
unsigned num_dst;
unsigned num_src;
num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
num_src = _mesa_num_inst_src_regs( inst->Opcode );
if (num_dst)
dst[0] = translate_dst( t,
&inst->DstReg,
inst->Saturate,
clamp_dst_color_output);
for (i = 0; i < num_src; i++)
src[i] = translate_src( t, &inst->SrcReg[i] );
switch( inst->Opcode ) {
case OPCODE_SWZ:
emit_swz( t, dst[0], &inst->SrcReg[0] );
return;
case OPCODE_BGNLOOP:
case OPCODE_CAL:
case OPCODE_ELSE:
case OPCODE_ENDLOOP:
debug_assert(num_dst == 0);
ureg_label_insn( ureg,
translate_opcode( inst->Opcode ),
src, num_src,
get_label( t, inst->BranchTarget ));
return;
case OPCODE_IF:
debug_assert(num_dst == 0);
ureg_label_insn( ureg,
ctx->Const.NativeIntegers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF,
src, num_src,
get_label( t, inst->BranchTarget ));
return;
case OPCODE_TEX:
case OPCODE_TXB:
case OPCODE_TXD:
case OPCODE_TXL:
case OPCODE_TXP:
src[num_src++] = t->samplers[inst->TexSrcUnit];
ureg_tex_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
st_translate_texture_target( inst->TexSrcTarget,
inst->TexShadow ),
NULL, 0,
src, num_src );
return;
case OPCODE_SCS:
dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
case OPCODE_XPD:
dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
case OPCODE_NOISE1:
case OPCODE_NOISE2:
case OPCODE_NOISE3:
case OPCODE_NOISE4:
/* At some point, a motivated person could add a better
* implementation of noise. Currently not even the nvidia
* binary drivers do anything more than this. In any case, the
* place to do this is in the GL state tracker, not the poor
* driver.
*/
ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
break;
case OPCODE_DDY:
emit_ddy( t, dst[0], &inst->SrcReg[0] );
break;
case OPCODE_RSQ:
ureg_RSQ( ureg, dst[0], ureg_abs(src[0]) );
break;
default:
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
}
}
static void
compile_instruction(
struct gl_context *ctx,
struct st_translate *t,
const struct prog_instruction *inst)
{
struct ureg_program *ureg = t->ureg;
GLuint i;
struct ureg_dst dst[1] = { { 0 } };
struct ureg_src src[4];
unsigned num_dst;
unsigned num_src;
num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
num_src = _mesa_num_inst_src_regs( inst->Opcode );
if (num_dst)
dst[0] = translate_dst( t,
&inst->DstReg,
inst->Saturate);
for (i = 0; i < num_src; i++)
src[i] = translate_src( t, &inst->SrcReg[i] );
switch( inst->Opcode ) {
case OPCODE_SWZ:
emit_swz( t, dst[0], &inst->SrcReg[0] );
return;
case OPCODE_TEX:
case OPCODE_TXB:
case OPCODE_TXP:
src[num_src++] = t->samplers[inst->TexSrcUnit];
ureg_tex_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
st_translate_texture_target( inst->TexSrcTarget,
inst->TexShadow ),
NULL, 0,
src, num_src );
return;
case OPCODE_SCS:
dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
case OPCODE_XPD:
dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
case OPCODE_RSQ:
ureg_RSQ( ureg, dst[0], ureg_abs(src[0]) );
break;
case OPCODE_ABS:
ureg_MOV(ureg, dst[0], ureg_abs(src[0]));
break;
case OPCODE_SUB:
ureg_ADD(ureg, dst[0], src[0], ureg_negate(src[1]));
break;
default:
ureg_insn( ureg,
translate_opcode( inst->Opcode ),
dst, num_dst,
src, num_src );
break;
}
}
