int
simple_lock_try_no_trace(
simple_lock_t l)
{
pc_t pc;
unsigned int success;
OBTAIN_PC(pc, l);
USLDBG(usld_lock_try_pre(l, pc));
if (success = hw_lock_try(&l->interlock)) {
USLDBG(usld_lock_try_post(l, pc));
}
return success;
}
/*
* Conditionally acquire a usimple_lock.
*
* MACH_RT: On success, returns with preemption disabled.
* On failure, returns with preemption in the same state
* as when first invoked. Note that the hw_lock routines
* are responsible for maintaining preemption state.
*
* XXX No stats are gathered on a miss; I preserved this
* behavior from the original assembly-language code, but
* doesn't it make sense to log misses? XXX
*/
unsigned int
usimple_lock_try(
usimple_lock_t l)
{
pc_t pc;
unsigned int success;
etap_time_t zero_time;
OBTAIN_PC(pc, l);
USLDBG(usld_lock_try_pre(l, pc));
if (success = hw_lock_try(&l->interlock)) {
USLDBG(usld_lock_try_post(l, pc));
ETAP_TIME_CLEAR(zero_time);
ETAPCALL(etap_simplelock_hold(l, pc, zero_time));
}
return success;
}
/*
* Conditionally acquire a usimple_lock.
*
* On success, returns with preemption disabled.
* On failure, returns with preemption in the same state
* as when first invoked. Note that the hw_lock routines
* are responsible for maintaining preemption state.
*
* XXX No stats are gathered on a miss; I preserved this
* behavior from the original assembly-language code, but
* doesn't it make sense to log misses? XXX
*/
unsigned int
usimple_lock_try(
usimple_lock_t l)
{
#ifndef MACHINE_SIMPLE_LOCK
unsigned int success;
DECL_PC(pc);
OBTAIN_PC(pc, l);
USLDBG(usld_lock_try_pre(l, pc));
if ((success = hw_lock_try(&l->interlock))) {
USLDBG(usld_lock_try_post(l, pc));
}
return success;
#else
return(simple_lock_try((simple_lock_t)l));
#endif
}