static void r600_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct r600_context *rctx = (struct r600_context *)ctx; struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; /* fast color clear on AA framebuffers (EG+) */ if ((buffers & PIPE_CLEAR_COLOR) && can_fast_clear_color(ctx)) { int i; for (i = 0; i < fb->nr_cbufs; i++) { struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture; evergreen_set_clear_color(fb->cbufs[i], color); r600_clear_buffer(ctx, fb->cbufs[i]->texture, tex->cmask_offset, tex->cmask_size, 0); tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level; } rctx->framebuffer.atom.dirty = true; buffers &= ~PIPE_CLEAR_COLOR; if (!buffers) return; } /* if hyperz enabled just clear hyperz */ if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) { struct r600_texture *rtex; unsigned level = fb->zsbuf->u.tex.level; rtex = (struct r600_texture*)fb->zsbuf->texture; /* We can't use hyperz fast clear if each slice of a texture * array are clear to different value. To simplify code just * disable fast clear for texture array. */ /* Only use htile for first level */ if (rtex->htile && !level && rtex->surface.array_size == 1) { if (rtex->depth_clear != depth) { rtex->depth_clear = depth; rctx->db_state.atom.dirty = true; } rctx->db_misc_state.htile_clear = true; rctx->db_misc_state.atom.dirty = true; } } r600_blitter_begin(ctx, R600_CLEAR); util_blitter_clear(rctx->blitter, fb->width, fb->height, buffers, color, depth, stencil); r600_blitter_end(ctx); /* disable fast clear */ if (rctx->db_misc_state.htile_clear) { rctx->db_misc_state.htile_clear = false; rctx->db_misc_state.atom.dirty = true; } }
static void r600_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct r600_context *rctx = (struct r600_context *)ctx; struct pipe_framebuffer_state *fb = &rctx->framebuffer; r600_blitter_begin(ctx, R600_CLEAR); util_blitter_clear(rctx->blitter, fb->width, fb->height, buffers, color, depth, stencil); r600_blitter_end(ctx); }
/** * Clear the whole color buffer(s) by drawing a quad. For VGPU10 we use * this when clearing integer render targets. We'll also clear the * depth and/or stencil buffers if the clear_buffers mask specifies them. */ static void clear_buffers_with_quad(struct svga_context *svga, unsigned clear_buffers, const union pipe_color_union *color, double depth, unsigned stencil) { const struct pipe_framebuffer_state *fb = &svga->curr.framebuffer; begin_blit(svga); util_blitter_clear(svga->blitter, fb->width, fb->height, 1, /* num_layers */ clear_buffers, color, depth, stencil); }
bool ilo_blitter_pipe_clear_fb(struct ilo_blitter *blitter, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { /* TODO we should pause/resume some queries */ ilo_blitter_pipe_begin(blitter, ILO_BLITTER_PIPE_CLEAR_FB, false); util_blitter_clear(blitter->pipe_blitter, blitter->ilo->fb.state.width, blitter->ilo->fb.state.height, buffers, color, depth, stencil); ilo_blitter_pipe_end(blitter); return true; }
static void si_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct si_context *sctx = (struct si_context *)ctx; struct pipe_framebuffer_state *fb = &sctx->framebuffer.state; if (buffers & PIPE_CLEAR_COLOR) { evergreen_do_fast_color_clear(&sctx->b, fb, &sctx->framebuffer.atom, &buffers, color); } if (buffers & PIPE_CLEAR_COLOR) { int i; /* These buffers cannot use fast clear, make sure to disable expansion. */ for (i = 0; i < fb->nr_cbufs; i++) { struct r600_texture *tex; /* If not clearing this buffer, skip. */ if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) continue; if (!fb->cbufs[i]) continue; tex = (struct r600_texture *)fb->cbufs[i]->texture; if (tex->fmask.size == 0) tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); } } si_blitter_begin(ctx, SI_CLEAR); util_blitter_clear(sctx->blitter, fb->width, fb->height, util_framebuffer_get_num_layers(fb), buffers, color, depth, stencil); si_blitter_end(ctx); }
/* Clear currently bound buffers. */ static void r300_clear(struct pipe_context* pipe, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { /* My notes about Zbuffer compression: * * 1) The zbuffer must be micro-tiled and whole microtiles must be * written if compression is enabled. If microtiling is disabled, * it locks up. * * 2) There is ZMASK RAM which contains a compressed zbuffer. * Each dword of the Z Mask contains compression information * for 16 4x4 pixel tiles, that is 2 bits for each tile. * On chips with 2 Z pipes, every other dword maps to a different * pipe. On newer chipsets, there is a new compression mode * with 8x8 pixel tiles per 2 bits. * * 3) The FASTFILL bit has nothing to do with filling. It only tells hw * it should look in the ZMASK RAM first before fetching from a real * zbuffer. * * 4) If a pixel is in a cleared state, ZB_DEPTHCLEARVALUE is returned * during zbuffer reads instead of the value that is actually stored * in the zbuffer memory. A pixel is in a cleared state when its ZMASK * is equal to 0. Therefore, if you clear ZMASK with zeros, you may * leave the zbuffer memory uninitialized, but then you must enable * compression, so that the ZMASK RAM is actually used. * * 5) Each 4x4 (or 8x8) tile is automatically decompressed and recompressed * during zbuffer updates. A special decompressing operation should be * used to fully decompress a zbuffer, which basically just stores all * compressed tiles in ZMASK to the zbuffer memory. * * 6) For a 16-bit zbuffer, compression causes a hung with one or * two samples and should not be used. * * 7) FORCE_COMPRESSED_STENCIL_VALUE should be enabled for stencil clears * to avoid needless decompression. * * 8) Fastfill must not be used if reading of compressed Z data is disabled * and writing of compressed Z data is enabled (RD/WR_COMP_ENABLE), * i.e. it cannot be used to compress the zbuffer. * * 9) ZB_CB_CLEAR does not interact with zbuffer compression in any way. * * - Marek */ struct r300_context* r300 = r300_context(pipe); struct pipe_framebuffer_state *fb = (struct pipe_framebuffer_state*)r300->fb_state.state; struct r300_hyperz_state *hyperz = (struct r300_hyperz_state*)r300->hyperz_state.state; uint32_t width = fb->width; uint32_t height = fb->height; uint32_t hyperz_dcv = hyperz->zb_depthclearvalue; /* Enable fast Z clear. * The zbuffer must be in micro-tiled mode, otherwise it locks up. */ if (buffers & PIPE_CLEAR_DEPTHSTENCIL) { boolean zmask_clear, hiz_clear; zmask_clear = r300_fast_zclear_allowed(r300); hiz_clear = r300_hiz_clear_allowed(r300); /* If we need Hyper-Z. */ if (zmask_clear || hiz_clear) { r300->num_z_clears++; /* Try to obtain the access to Hyper-Z buffers if we don't have one. */ if (!r300->hyperz_enabled) { r300->hyperz_enabled = r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, TRUE); if (r300->hyperz_enabled) { /* Need to emit HyperZ buffer regs for the first time. */ r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG); } } /* Setup Hyper-Z clears. */ if (r300->hyperz_enabled) { DBG(r300, DBG_HYPERZ, "r300: Clear memory: %s%s\n", zmask_clear ? "ZMASK " : "", hiz_clear ? "HIZ" : ""); if (zmask_clear) { hyperz_dcv = hyperz->zb_depthclearvalue = r300_depth_clear_value(fb->zsbuf->format, depth, stencil); r300_mark_atom_dirty(r300, &r300->zmask_clear); buffers &= ~PIPE_CLEAR_DEPTHSTENCIL; } if (hiz_clear) { r300->hiz_clear_value = r300_hiz_clear_value(depth); r300_mark_atom_dirty(r300, &r300->hiz_clear); } } } } /* Enable CBZB clear. */ if (r300_cbzb_clear_allowed(r300, buffers)) { struct r300_surface *surf = r300_surface(fb->cbufs[0]); hyperz->zb_depthclearvalue = r300_depth_clear_cb_value(surf->base.format, color->f); width = surf->cbzb_width; height = surf->cbzb_height; r300->cbzb_clear = TRUE; r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG); } /* Clear. */ if (buffers) { enum pipe_format cformat = fb->nr_cbufs ? fb->cbufs[0]->format : PIPE_FORMAT_NONE; /* Clear using the blitter. */ r300_blitter_begin(r300, R300_CLEAR); util_blitter_clear(r300->blitter, width, height, fb->nr_cbufs, buffers, cformat, color, depth, stencil); r300_blitter_end(r300); } else if (r300->zmask_clear.dirty || r300->hiz_clear.dirty) { /* Just clear zmask and hiz now, this does not use the standard draw * procedure. */ /* Calculate zmask_clear and hiz_clear atom sizes. */ unsigned dwords = (r300->zmask_clear.dirty ? r300->zmask_clear.size : 0) + (r300->hiz_clear.dirty ? r300->hiz_clear.size : 0) + r300_get_num_cs_end_dwords(r300); /* Reserve CS space. */ if (dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) { r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); } /* Emit clear packets. */ if (r300->zmask_clear.dirty) { r300_emit_zmask_clear(r300, r300->zmask_clear.size, r300->zmask_clear.state); r300->zmask_clear.dirty = FALSE; } if (r300->hiz_clear.dirty) { r300_emit_hiz_clear(r300, r300->hiz_clear.size, r300->hiz_clear.state); r300->hiz_clear.dirty = FALSE; } } else { assert(0); } /* Disable CBZB clear. */ if (r300->cbzb_clear) { r300->cbzb_clear = FALSE; hyperz->zb_depthclearvalue = hyperz_dcv; r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG); } /* Enable fastfill and/or hiz. * * If we cleared zmask/hiz, it's in use now. The Hyper-Z state update * looks if zmask/hiz is in use and programs hardware accordingly. */ if (r300->zmask_in_use || r300->hiz_in_use) { r300_mark_atom_dirty(r300, &r300->hyperz_state); } }
static void r600_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct r600_context *rctx = (struct r600_context *)ctx; struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) { evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom, &buffers, color); } if (buffers & PIPE_CLEAR_COLOR) { int i; /* These buffers cannot use fast clear, make sure to disable expansion. */ for (i = 0; i < fb->nr_cbufs; i++) { struct r600_texture *tex; /* If not clearing this buffer, skip. */ if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) continue; if (!fb->cbufs[i]) continue; tex = (struct r600_texture *)fb->cbufs[i]->texture; if (tex->fmask.size == 0) tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); } } /* if hyperz enabled just clear hyperz */ if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) { struct r600_texture *rtex; unsigned level = fb->zsbuf->u.tex.level; rtex = (struct r600_texture*)fb->zsbuf->texture; /* We can't use hyperz fast clear if each slice of a texture * array are clear to different value. To simplify code just * disable fast clear for texture array. */ /* Only use htile for first level */ if (rtex->htile_buffer && !level && util_max_layer(&rtex->resource.b.b, level) == 0) { if (rtex->depth_clear_value != depth) { rtex->depth_clear_value = depth; rctx->db_state.atom.dirty = true; } rctx->db_misc_state.htile_clear = true; rctx->db_misc_state.atom.dirty = true; } } r600_blitter_begin(ctx, R600_CLEAR); util_blitter_clear(rctx->blitter, fb->width, fb->height, util_framebuffer_get_num_layers(fb), buffers, color, depth, stencil); r600_blitter_end(ctx); /* disable fast clear */ if (rctx->db_misc_state.htile_clear) { rctx->db_misc_state.htile_clear = false; rctx->db_misc_state.atom.dirty = true; } }
/* Clear currently bound buffers. */ static void r300_clear(struct pipe_context* pipe, unsigned buffers, const float* rgba, double depth, unsigned stencil) { /* My notes about fastfill: * * 1) Only the zbuffer is cleared. * * 2) The zbuffer must be micro-tiled and whole microtiles must be * written. If microtiling is disabled, it locks up. * * 3) There is Z Mask RAM which contains a compressed zbuffer and * it interacts with fastfill. We should figure out how to use it * to get more performance. * This is what we know about the Z Mask: * * Each dword of the Z Mask contains compression information * for 16 4x4 pixel blocks, that is 2 bits for each block. * On chips with 2 Z pipes, every other dword maps to a different * pipe. * * 4) ZB_DEPTHCLEARVALUE is used to clear the zbuffer and the Z Mask must * be equal to 0. (clear the Z Mask RAM with zeros) * * 5) For 16-bit zbuffer, compression causes a hung with one or * two samples and should not be used. * * 6) FORCE_COMPRESSED_STENCIL_VALUE should be enabled for stencil clears * to avoid needless decompression. * * 7) Fastfill must not be used if reading of compressed Z data is disabled * and writing of compressed Z data is enabled (RD/WR_COMP_ENABLE), * i.e. it cannot be used to compress the zbuffer. * * 8) ZB_CB_CLEAR does not interact with fastfill in any way. * * - Marek */ struct r300_context* r300 = r300_context(pipe); struct pipe_framebuffer_state *fb = (struct pipe_framebuffer_state*)r300->fb_state.state; struct r300_hyperz_state *hyperz = (struct r300_hyperz_state*)r300->hyperz_state.state; struct r300_texture *zstex = fb->zsbuf ? r300_texture(fb->zsbuf->texture) : NULL; uint32_t width = fb->width; uint32_t height = fb->height; boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ); uint32_t hyperz_dcv = hyperz->zb_depthclearvalue; /* Enable fast Z clear. * The zbuffer must be in micro-tiled mode, otherwise it locks up. */ if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && can_hyperz) { hyperz_dcv = hyperz->zb_depthclearvalue = r300_depth_clear_value(fb->zsbuf->format, depth, stencil); r300_mark_fb_state_dirty(r300, R300_CHANGED_ZCLEAR_FLAG); if (zstex->zmask_mem[fb->zsbuf->u.tex.level]) { r300_mark_atom_dirty(r300, &r300->zmask_clear); buffers &= ~PIPE_CLEAR_DEPTHSTENCIL; } if (zstex->hiz_mem[fb->zsbuf->u.tex.level]) r300_mark_atom_dirty(r300, &r300->hiz_clear); } /* Enable CBZB clear. */ if (r300_cbzb_clear_allowed(r300, buffers)) { struct r300_surface *surf = r300_surface(fb->cbufs[0]); hyperz->zb_depthclearvalue = r300_depth_clear_cb_value(surf->base.format, rgba); width = surf->cbzb_width; height = surf->cbzb_height; r300->cbzb_clear = TRUE; r300_mark_fb_state_dirty(r300, R300_CHANGED_CBZB_FLAG); } /* Clear. */ if (buffers) { /* Clear using the blitter. */ r300_blitter_begin(r300, R300_CLEAR); util_blitter_clear(r300->blitter, width, height, fb->nr_cbufs, buffers, rgba, depth, stencil); r300_blitter_end(r300); } else if (r300->zmask_clear.dirty) { /* Just clear zmask and hiz now, this does not use a standard draw * procedure. */ unsigned dwords; /* Calculate zmask_clear and hiz_clear atom sizes. */ r300_update_hyperz_state(r300); dwords = r300->zmask_clear.size + (r300->hiz_clear.dirty ? r300->hiz_clear.size : 0) + r300_get_num_cs_end_dwords(r300); /* Reserve CS space. */ if (dwords > (R300_MAX_CMDBUF_DWORDS - r300->cs->cdw)) { r300->context.flush(&r300->context, 0, NULL); } /* Emit clear packets. */ r300_emit_zmask_clear(r300, r300->zmask_clear.size, r300->zmask_clear.state); r300->zmask_clear.dirty = FALSE; if (r300->hiz_clear.dirty) { r300_emit_hiz_clear(r300, r300->hiz_clear.size, r300->hiz_clear.state); r300->hiz_clear.dirty = FALSE; } } else { assert(0); } /* Disable CBZB clear. */ if (r300->cbzb_clear) { r300->cbzb_clear = FALSE; hyperz->zb_depthclearvalue = hyperz_dcv; r300_mark_fb_state_dirty(r300, R300_CHANGED_CBZB_FLAG); } /* Enable fastfill and/or hiz. * * If we cleared zmask/hiz, it's in use now. The Hyper-Z state update * looks if zmask/hiz is in use and enables fastfill accordingly. */ if (zstex && (zstex->zmask_in_use[fb->zsbuf->u.tex.level] || zstex->hiz_in_use[fb->zsbuf->u.tex.level])) { r300_mark_atom_dirty(r300, &r300->hyperz_state); } }
static void si_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct si_context *sctx = (struct si_context *)ctx; struct pipe_framebuffer_state *fb = &sctx->framebuffer.state; struct pipe_surface *zsbuf = fb->zsbuf; struct r600_texture *zstex = zsbuf ? (struct r600_texture*)zsbuf->texture : NULL; if (buffers & PIPE_CLEAR_COLOR) { evergreen_do_fast_color_clear(&sctx->b, fb, &sctx->framebuffer.atom, &buffers, &sctx->framebuffer.dirty_cbufs, color); if (!buffers) return; /* all buffers have been fast cleared */ } if (buffers & PIPE_CLEAR_COLOR) { int i; /* These buffers cannot use fast clear, make sure to disable expansion. */ for (i = 0; i < fb->nr_cbufs; i++) { struct r600_texture *tex; /* If not clearing this buffer, skip. */ if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) continue; if (!fb->cbufs[i]) continue; tex = (struct r600_texture *)fb->cbufs[i]->texture; if (tex->fmask.size == 0) tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); } } if (zstex && zstex->htile_buffer && zsbuf->u.tex.level == 0 && zsbuf->u.tex.first_layer == 0 && zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) { if (buffers & PIPE_CLEAR_DEPTH) { /* Need to disable EXPCLEAR temporarily if clearing * to a new value. */ if (!zstex->depth_cleared || zstex->depth_clear_value != depth) { sctx->db_depth_disable_expclear = true; } zstex->depth_clear_value = depth; sctx->framebuffer.dirty_zsbuf = true; si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */ sctx->db_depth_clear = true; si_mark_atom_dirty(sctx, &sctx->db_render_state); } if (buffers & PIPE_CLEAR_STENCIL) { stencil &= 0xff; /* Need to disable EXPCLEAR temporarily if clearing * to a new value. */ if (!zstex->stencil_cleared || zstex->stencil_clear_value != stencil) { sctx->db_stencil_disable_expclear = true; } zstex->stencil_clear_value = stencil; sctx->framebuffer.dirty_zsbuf = true; si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */ sctx->db_stencil_clear = true; si_mark_atom_dirty(sctx, &sctx->db_render_state); } } si_blitter_begin(ctx, SI_CLEAR); util_blitter_clear(sctx->blitter, fb->width, fb->height, util_framebuffer_get_num_layers(fb), buffers, color, depth, stencil); si_blitter_end(ctx); if (sctx->db_depth_clear) { sctx->db_depth_clear = false; sctx->db_depth_disable_expclear = false; zstex->depth_cleared = true; si_mark_atom_dirty(sctx, &sctx->db_render_state); } if (sctx->db_stencil_clear) { sctx->db_stencil_clear = false; sctx->db_stencil_disable_expclear = false; zstex->stencil_cleared = true; si_mark_atom_dirty(sctx, &sctx->db_render_state); } }
static void vc4_clear(struct pipe_context *pctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct vc4_context *vc4 = vc4_context(pctx); struct vc4_job *job = vc4_get_job_for_fbo(vc4); /* We can't flag new buffers for clearing once we've queued draws. We * could avoid this by using the 3d engine to clear. */ if (job->draw_calls_queued) { perf_debug("Flushing rendering to process new clear.\n"); vc4_job_submit(vc4, job); job = vc4_get_job_for_fbo(vc4); } if (buffers & PIPE_CLEAR_COLOR0) { struct vc4_resource *rsc = vc4_resource(vc4->framebuffer.cbufs[0]->texture); uint32_t clear_color; if (vc4_rt_format_is_565(vc4->framebuffer.cbufs[0]->format)) { /* In 565 mode, the hardware will be packing our color * for us. */ clear_color = pack_rgba(PIPE_FORMAT_R8G8B8A8_UNORM, color->f); } else { /* Otherwise, we need to do this packing because we * support multiple swizzlings of RGBA8888. */ clear_color = pack_rgba(vc4->framebuffer.cbufs[0]->format, color->f); } job->clear_color[0] = job->clear_color[1] = clear_color; rsc->initialized_buffers |= (buffers & PIPE_CLEAR_COLOR0); } if (buffers & PIPE_CLEAR_DEPTHSTENCIL) { struct vc4_resource *rsc = vc4_resource(vc4->framebuffer.zsbuf->texture); unsigned zsclear = buffers & PIPE_CLEAR_DEPTHSTENCIL; /* Clearing ZS will clear both Z and stencil, so if we're * trying to clear just one then we need to draw a quad to do * it instead. */ if ((zsclear == PIPE_CLEAR_DEPTH || zsclear == PIPE_CLEAR_STENCIL) && (rsc->initialized_buffers & ~(zsclear | job->cleared)) && util_format_is_depth_and_stencil(vc4->framebuffer.zsbuf->format)) { perf_debug("Partial clear of Z+stencil buffer, " "drawing a quad instead of fast clearing\n"); vc4_blitter_save(vc4); util_blitter_clear(vc4->blitter, vc4->framebuffer.width, vc4->framebuffer.height, 1, zsclear, NULL, depth, stencil); buffers &= ~zsclear; if (!buffers) return; } /* Though the depth buffer is stored with Z in the high 24, * for this field we just need to store it in the low 24. */ if (buffers & PIPE_CLEAR_DEPTH) { job->clear_depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth); } if (buffers & PIPE_CLEAR_STENCIL) job->clear_stencil = stencil; rsc->initialized_buffers |= zsclear; } job->draw_min_x = 0; job->draw_min_y = 0; job->draw_max_x = vc4->framebuffer.width; job->draw_max_y = vc4->framebuffer.height; job->cleared |= buffers; job->resolve |= buffers; vc4_start_draw(vc4); }
static void si_clear(struct pipe_context *ctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct si_context *sctx = (struct si_context *)ctx; struct pipe_framebuffer_state *fb = &sctx->framebuffer.state; struct pipe_surface *zsbuf = fb->zsbuf; struct si_texture *zstex = zsbuf ? (struct si_texture*)zsbuf->texture : NULL; if (buffers & PIPE_CLEAR_COLOR) { si_do_fast_color_clear(sctx, &buffers, color); if (!buffers) return; /* all buffers have been fast cleared */ /* These buffers cannot use fast clear, make sure to disable expansion. */ for (unsigned i = 0; i < fb->nr_cbufs; i++) { struct si_texture *tex; /* If not clearing this buffer, skip. */ if (!(buffers & (PIPE_CLEAR_COLOR0 << i)) || !fb->cbufs[i]) continue; tex = (struct si_texture *)fb->cbufs[i]->texture; if (tex->surface.fmask_size == 0) tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); } } if (zstex && si_htile_enabled(zstex, zsbuf->u.tex.level) && zsbuf->u.tex.first_layer == 0 && zsbuf->u.tex.last_layer == util_max_layer(&zstex->buffer.b.b, 0)) { /* TC-compatible HTILE only supports depth clears to 0 or 1. */ if (buffers & PIPE_CLEAR_DEPTH && (!zstex->tc_compatible_htile || depth == 0 || depth == 1)) { /* Need to disable EXPCLEAR temporarily if clearing * to a new value. */ if (!zstex->depth_cleared || zstex->depth_clear_value != depth) { sctx->db_depth_disable_expclear = true; } if (zstex->depth_clear_value != (float)depth) { /* Update DB_DEPTH_CLEAR. */ zstex->depth_clear_value = depth; sctx->framebuffer.dirty_zsbuf = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.framebuffer); } sctx->db_depth_clear = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state); } /* TC-compatible HTILE only supports stencil clears to 0. */ if (buffers & PIPE_CLEAR_STENCIL && (!zstex->tc_compatible_htile || stencil == 0)) { stencil &= 0xff; /* Need to disable EXPCLEAR temporarily if clearing * to a new value. */ if (!zstex->stencil_cleared || zstex->stencil_clear_value != stencil) { sctx->db_stencil_disable_expclear = true; } if (zstex->stencil_clear_value != (uint8_t)stencil) { /* Update DB_STENCIL_CLEAR. */ zstex->stencil_clear_value = stencil; sctx->framebuffer.dirty_zsbuf = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.framebuffer); } sctx->db_stencil_clear = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state); } /* TODO: Find out what's wrong here. Fast depth clear leads to * corruption in ARK: Survival Evolved, but that may just be * a coincidence and the root cause is elsewhere. * * The corruption can be fixed by putting the DB flush before * or after the depth clear. (surprisingly) * * https://bugs.freedesktop.org/show_bug.cgi?id=102955 (apitrace) * * This hack decreases back-to-back ClearDepth performance. */ if ((sctx->db_depth_clear || sctx->db_stencil_clear) && sctx->screen->options.clear_db_cache_before_clear) sctx->flags |= SI_CONTEXT_FLUSH_AND_INV_DB; } si_blitter_begin(sctx, SI_CLEAR); util_blitter_clear(sctx->blitter, fb->width, fb->height, util_framebuffer_get_num_layers(fb), buffers, color, depth, stencil); si_blitter_end(sctx); if (sctx->db_depth_clear) { sctx->db_depth_clear = false; sctx->db_depth_disable_expclear = false; zstex->depth_cleared = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state); } if (sctx->db_stencil_clear) { sctx->db_stencil_clear = false; sctx->db_stencil_disable_expclear = false; zstex->stencil_cleared = true; si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state); } }