void test_vextQs64 (void) { int64x2_t out_int64x2_t; int64x2_t arg0_int64x2_t; int64x2_t arg1_int64x2_t; out_int64x2_t = vextq_s64 (arg0_int64x2_t, arg1_int64x2_t, 0); }
int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) { // CHECK-LABEL: test_vextq_s64 return vextq_s64(a, b, 1); // CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{(0x)?8}} }
// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> // CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> // CHECK: [[VEXT:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <2 x i32> <i32 1, i32 2> // CHECK: ret <2 x i64> [[VEXT]] int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) { return vextq_s64(a, b, 1); }