/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
#if NBIOS32 > 0
bios32_init();
#endif
x86_64_proc0_tss_ldt_init();
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
intr_printconfig();
#if NIOAPIC > 0
lapic_set_lvt();
ioapic_enable();
#endif
#ifdef MULTIPROCESSOR
cpu_init_idle_pcbs();
#endif
lcr8(0);
spl0();
cold = 0;
/*
* At this point the RNG is running, and if FSXR is set we can
* use it. Here we setup a periodic timeout to collect the data.
*/
if (viac3_rnd_present) {
timeout_set(&viac3_rnd_tmo, viac3_rnd, &viac3_rnd_tmo);
viac3_rnd(&viac3_rnd_tmo);
}
if (has_rdrand) {
timeout_set(&rdrand_tmo, rdrand, &rdrand_tmo);
rdrand(&rdrand_tmo);
}
#ifdef CRYPTO
/*
* Also, if the chip has crypto available, enable it.
*/
if (amd64_has_xcrypt)
viac3_crypto_setup();
if (amd64_has_aesni)
aesni_setup();
#endif
}
/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
/*
* Note, on i386, configure is not running under splhigh unlike other
* architectures. This fact is used by the pcmcia irq line probing.
*/
gdt_init(); /* XXX - pcibios uses gdt stuff */
/* Set up proc0's TSS and LDT */
i386_proc0_tss_ldt_init();
#ifdef KVM86
kvm86_init();
#endif
if (config_rootfound("mainbus", NULL) == NULL)
panic("cpu_configure: mainbus not configured");
#if NIOAPIC > 0
if (nioapics > 0)
goto nomasks;
#endif
printf("biomask %x netmask %x ttymask %x\n", (u_short)IMASK(IPL_BIO),
(u_short)IMASK(IPL_NET), (u_short)IMASK(IPL_TTY));
#if NIOAPIC > 0
nomasks:
ioapic_enable();
#endif
proc0.p_addr->u_pcb.pcb_cr0 = rcr0();
#ifdef MULTIPROCESSOR
/* propagate TSS and LDT configuration to the idle pcb's. */
cpu_init_idle_pcbs();
#endif
spl0();
/*
* We can not know which is our root disk, defer
* until we can checksum blocks to figure it out.
*/
cold = 0;
/*
* At this point the RNG is running, and if FSXR is set we can
* use it. Here we setup a periodic timeout to collect the data.
*/
if (viac3_rnd_present) {
timeout_set(&viac3_rnd_tmo, viac3_rnd, &viac3_rnd_tmo);
viac3_rnd(&viac3_rnd_tmo);
}
#ifdef CRYPTO
/*
* Also, if the chip has crypto available, enable it.
*/
if (i386_has_xcrypt)
viac3_crypto_setup();
#endif
}
/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
/*
* Note, on i386, configure is not running under splhigh unlike other
* architectures. This fact is used by the pcmcia irq line probing.
*/
gdt_init(); /* XXX - pcibios uses gdt stuff */
/* Set up proc0's TSS */
i386_proc0_tss_init();
#ifdef KVM86
kvm86_init();
#endif
pmap_bootstrap_pae();
#if defined(MULTIPROCESSOR) || \
(NACPI > 0 && !defined(SMALL_KERNEL))
/* install the lowmem ptp after boot args for 1:1 mappings */
pmap_prealloc_lowmem_ptp();
#endif
#ifdef MULTIPROCESSOR
pmap_kenter_pa((vaddr_t)MP_TRAMPOLINE, /* virtual */
(paddr_t)MP_TRAMPOLINE, /* physical */
PROT_READ | PROT_WRITE | PROT_EXEC); /* protection */
pmap_kenter_pa((vaddr_t)MP_TRAMP_DATA, /* virtual */
(paddr_t)MP_TRAMP_DATA, /* physical */
PROT_READ | PROT_WRITE); /* protection */
#endif
if (config_rootfound("mainbus", NULL) == NULL)
panic("cpu_configure: mainbus not configured");
#if NIOAPIC > 0
ioapic_enable();
#endif
proc0.p_addr->u_pcb.pcb_cr0 = rcr0();
#ifdef MULTIPROCESSOR
/* propagate TSS configuration to the idle pcb's. */
cpu_init_idle_pcbs();
#endif
spl0();
/*
* We can not know which is our root disk, defer
* until we can checksum blocks to figure it out.
*/
cold = 0;
/*
* At this point the RNG is running, and if FSXR is set we can
* use it. Here we setup a periodic timeout to collect the data.
*/
if (viac3_rnd_present) {
timeout_set(&viac3_rnd_tmo, viac3_rnd, &viac3_rnd_tmo);
viac3_rnd(&viac3_rnd_tmo);
}
if (has_rdrand || has_rdseed) {
timeout_set(&rdrand_tmo, rdrand, &rdrand_tmo);
rdrand(&rdrand_tmo);
}
#ifdef CRYPTO
/*
* Also, if the chip has crypto available, enable it.
*/
if (i386_has_xcrypt)
viac3_crypto_setup();
#endif
}
