void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags)
{
if (!pmic_data->vdd1) {
omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
pmic_data->vdd1 = &omap4_vdd1;
}
if (!pmic_data->vdd2) {
omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
omap4_vdd2_drvdata.data = voltdm_lookup("iva");
pmic_data->vdd2 = &omap4_vdd2;
}
if (!pmic_data->vdd3) {
omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
omap4_vdd3_drvdata.data = voltdm_lookup("core");
pmic_data->vdd3 = &omap4_vdd3;
}
/* Common platform data configurations */
if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
pmic_data->usb = &omap4_usb_pdata;
/* Common regulator configurations */
if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
pmic_data->vdac = &omap4_vdac_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
pmic_data->vaux2 = &omap4_vaux2_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
pmic_data->vaux3 = &omap4_vaux3_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
pmic_data->vmmc = &omap4_vmmc_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
pmic_data->vpp = &omap4_vpp_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
pmic_data->vana = &omap4_vana_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
pmic_data->vcxio = &omap4_vcxio_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
pmic_data->vusb = &omap4_vusb_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
!pmic_data->clk32kg)
pmic_data->clk32kg = &omap4_clk32kg_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
pmic_data->v1v8 = &omap4_v1v8_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
pmic_data->v2v1 = &omap4_v2v1_idata;
}
int __init omap3_twl_init(void)
{
struct voltagedomain *voltdm;
if (!cpu_is_omap34xx() || cpu_is_am33xx())
return -ENODEV;
if (cpu_is_omap3630()) {
omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
}
/*
* The smartreflex bit on twl4030 specifies if the setting of voltage
* is done over the I2C_SR path. Since this setting is independent of
* the actual usage of smartreflex AVS module, we enable TWL SR bit
* by default irrespective of whether smartreflex AVS module is enabled
* on the OMAP side or not. This is because without this bit enabled,
* the voltage scaling through vp forceupdate/bypass mechanism of
* voltage scaling will not function on TWL over I2C_SR.
*/
if (!twl_sr_enable_autoinit)
omap3_twl_set_sr_bit(true);
voltdm = voltdm_lookup("mpu_iva");
omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
voltdm = voltdm_lookup("core");
omap_voltage_register_pmic(voltdm, &omap3_core_pmic);
return 0;
}
void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags)
{
if (!pmic_data->vdd1) {
omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
pmic_data->vdd1 = &omap3_vdd1;
}
if (!pmic_data->vdd2) {
omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
omap3_vdd2_drvdata.data = voltdm_lookup("core");
pmic_data->vdd2 = &omap3_vdd2;
}
/* Common platform data configurations */
if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
pmic_data->usb = &omap3_usb_pdata;
if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
pmic_data->bci = &omap3_bci_pdata;
if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
pmic_data->madc = &omap3_madc_pdata;
if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
pmic_data->audio = &omap3_audio_pdata;
/* Common regulator configurations */
if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
pmic_data->vdac = &omap3_vdac_idata;
if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
pmic_data->vpll2 = &omap3_vpll2_idata;
}
/*
* This API is to be called during init to set the various voltage
* domains to the voltage as per the opp table. Typically we boot up
* at the nominal voltage. So this function finds out the rate of
* the clock associated with the voltage domain, finds out the correct
* opp entry and sets the voltage domain to the voltage specified
* in the opp entry
*/
static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
const char *oh_name)
{
struct voltagedomain *voltdm;
struct clk *clk;
struct opp *opp;
unsigned long freq, bootup_volt;
struct device *dev;
if (!vdd_name || !clk_name || !oh_name) {
pr_err("%s: invalid parameters\n", __func__);
goto exit;
}
dev = omap_device_get_by_hwmod_name(oh_name);
if (IS_ERR(dev)) {
pr_err("%s: Unable to get dev pointer for hwmod %s\n",
__func__, oh_name);
goto exit;
}
voltdm = voltdm_lookup(vdd_name);
if (IS_ERR(voltdm)) {
pr_err("%s: unable to get vdd pointer for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
clk = clk_get(NULL, clk_name);
if (IS_ERR(clk)) {
pr_err("%s: unable to get clk %s\n", __func__, clk_name);
goto exit;
}
freq = clk->rate;
clk_put(clk);
opp = opp_find_freq_ceil(dev, &freq);
if (IS_ERR(opp)) {
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
bootup_volt = opp_get_voltage(opp);
if (!bootup_volt) {
pr_err("%s: unable to find voltage corresponding "
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
goto exit;
}
voltdm_scale(voltdm, bootup_volt);
return 0;
exit:
pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
return -EINVAL;
}
int __init omap4_twl_init(void)
{
struct voltagedomain *voltdm;
if (!cpu_is_omap44xx())
return -ENODEV;
voltdm = voltdm_lookup("mpu");
omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic);
voltdm = voltdm_lookup("iva");
omap_voltage_register_pmic(voltdm, &omap4_iva_pmic);
voltdm = voltdm_lookup("core");
omap_voltage_register_pmic(voltdm, &omap4_core_pmic);
return 0;
}
static int sr_dev_init(struct omap_hwmod *oh, void *user)
{
struct omap_sr_data *sr_data;
struct omap_device *od;
struct omap_volt_data *volt_data;
struct omap_smartreflex_dev_attr *sr_dev_attr;
char *name = "smartreflex";
static int i;
sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
if (!sr_data) {
pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
__func__, oh->name);
return -ENOMEM;
}
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
pr_err("%s: No voltage domain specified for %s."
"Cannot initialize\n", __func__,
oh->name);
goto exit;
}
sr_data->ip_type = oh->class->rev;
sr_data->senn_mod = 0x1;
sr_data->senp_mod = 0x1;
sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
if (IS_ERR(sr_data->voltdm)) {
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
__func__, sr_dev_attr->sensor_voltdm_name);
goto exit;
}
omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
if (!volt_data) {
pr_warning("%s: No Voltage table registerd fo VDD%d."
"Something really wrong\n\n", __func__, i + 1);
goto exit;
}
sr_set_nvalues(volt_data, sr_data);
sr_data->enable_on_init = sr_enable_on_init;
od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
omap_sr_latency,
ARRAY_SIZE(omap_sr_latency), 0);
if (IS_ERR(od))
pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
__func__, name, oh->name);
exit:
i++;
kfree(sr_data);
return 0;
}
/**
* omap_pmic_register_data() - Register the PMIC information to OMAP mapping
* @omap_pmic_maps: array ending with a empty element representing the maps
* @desc: description for this PMIC.
*/
int __init omap_pmic_register_data(struct omap_pmic_map *omap_pmic_maps,
struct omap_pmic_description *desc)
{
struct voltagedomain *voltdm;
struct omap_pmic_map *map;
int r;
if (!omap_pmic_maps)
return 0;
map = omap_pmic_maps;
while (map->name) {
if (!omap_chip_is(map->omap_chip))
goto next;
/* The base PMIC is the one controlling core voltdm */
if (desc && !strcmp(map->name, "core"))
omap_pm_set_pmic_lp_time(desc->pmic_lp_tstart,
desc->pmic_lp_tshut);
voltdm = voltdm_lookup(map->name);
if (IS_ERR_OR_NULL(voltdm)) {
pr_err("%s: unable to find map %s\n", __func__,
map->name);
goto next;
}
if (IS_ERR_OR_NULL(map->pmic_data)) {
pr_warning("%s: domain[%s] has no pmic data\n",
__func__, map->name);
goto next;
}
r = omap_voltage_register_pmic(voltdm, map->pmic_data);
if (r) {
pr_warning("%s: domain[%s] register returned %d\n",
__func__, map->name, r);
goto next;
}
if (map->special_action) {
r = map->special_action(voltdm);
WARN(r, "%s: domain[%s] action returned %d\n", __func__,
map->name, r);
}
next:
map++;
}
return 0;
}
static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
{
struct omap_sr_data *sr_data;
struct platform_device *pdev;
struct omap_volt_data *volt_data;
struct omap_smartreflex_dev_attr *sr_dev_attr;
char *name = "smartreflex";
static int i;
sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
if (!sr_data) {
pr_err("%s: Unable to allocate memory for %s sr_data\n",
__func__, oh->name);
return -ENOMEM;
}
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
__func__, oh->name);
goto exit;
}
sr_data->name = oh->name;
sr_data->ip_type = oh->class->rev;
sr_data->senn_mod = 0x1;
sr_data->senp_mod = 0x1;
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
} else {
sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
}
}
sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
if (!sr_data->voltdm) {
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
__func__, sr_dev_attr->sensor_voltdm_name);
goto exit;
}
omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
if (!volt_data) {
pr_err("%s: No Voltage table registered for VDD%d\n",
__func__, i + 1);
goto exit;
}
sr_set_nvalues(volt_data, sr_data);
sr_data->enable_on_init = sr_enable_on_init;
pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data));
if (IS_ERR(pdev))
pr_warn("%s: Could not build omap_device for %s: %s\n",
__func__, name, oh->name);
exit:
i++;
kfree(sr_data);
return 0;
}
/*
* This API is to be called during init to set the various voltage
* domains to the voltage as per the opp table. Typically we boot up
* at the nominal voltage. So this function finds out the rate of
* the clock associated with the voltage domain, finds out the correct
* opp entry and sets the voltage domain to the voltage specified
* in the opp entry
*/
static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
const char *oh_name)
{
struct voltagedomain *voltdm;
struct clk *clk;
struct opp *opp;
struct device *dev;
unsigned long freq_cur, freq_valid, bootup_volt;
int ret = -EINVAL;
dev = omap_device_get_by_hwmod_name(oh_name);
if (IS_ERR(dev)) {
pr_err("%s: Unable to get dev pointer for hwmod %s\n",
__func__, oh_name);
goto exit;
}
voltdm = voltdm_lookup(vdd_name);
if (IS_ERR(voltdm)) {
pr_err("%s: unable to get vdd pointer for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
clk = clk_get(NULL, clk_name);
if (IS_ERR(clk)) {
pr_err("%s: unable to get clk %s\n", __func__, clk_name);
goto exit;
}
freq_cur = clk->rate;
freq_valid = freq_cur;
rcu_read_lock();
opp = opp_find_freq_ceil(dev, &freq_valid);
if (IS_ERR(opp)) {
opp = opp_find_freq_floor(dev, &freq_valid);
if (IS_ERR(opp)) {
rcu_read_unlock();
pr_err("%s: no boot OPP match for %ld on vdd_%s\n",
__func__, freq_cur, vdd_name);
ret = -ENOENT;
goto exit_ck;
}
}
bootup_volt = opp_get_voltage(opp);
rcu_read_unlock();
if (!bootup_volt) {
pr_err("%s: unable to find voltage corresponding "
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
ret = -ENOENT;
goto exit_ck;
}
/*
* Frequency and Voltage have to be sequenced: if we move from
* a lower frequency to higher frequency, raise voltage, followed by
* frequency, and vice versa. we assume that the voltage at boot
* is the required voltage for the frequency it was set for.
* NOTE:
* we can check the frequency, but there is numerous ways to set
* voltage. We play the safe path and just set the voltage.
*/
if (freq_cur < freq_valid) {
ret = voltdm_scale(voltdm, bootup_volt);
if (ret) {
pr_err("%s: Fail set voltage-%s(f=%ld v=%ld)on vdd%s\n",
__func__, vdd_name, freq_valid,
bootup_volt, vdd_name);
goto exit_ck;
}
}
/* Set freq only if there is a difference in freq */
if (freq_valid != freq_cur) {
ret = clk_set_rate(clk, freq_valid);
if (ret) {
pr_err("%s: Fail set clk-%s(f=%ld v=%ld)on vdd%s\n",
__func__, clk_name, freq_valid,
bootup_volt, vdd_name);
goto exit_ck;
}
}
if (freq_cur >= freq_valid) {
ret = voltdm_scale(voltdm, bootup_volt);
if (ret) {
pr_err("%s: Fail set voltage-%s(f=%ld v=%ld)on vdd%s\n",
__func__, clk_name, freq_valid,
bootup_volt, vdd_name);
goto exit_ck;
}
}
ret = 0;
exit_ck:
clk_put(clk);
if (!ret)
return 0;
exit:
pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
return -EINVAL;
}
static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
{
struct omap_sr_data *sr_data;
struct platform_device *pdev;
struct omap_volt_data *volt_data;
struct omap_smartreflex_dev_attr *sr_dev_attr;
char *name = "smartreflex";
static int i;
sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
if (!sr_data) {
pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
__func__, oh->name);
return -ENOMEM;
}
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
pr_err("%s: No voltage domain specified for %s."
"Cannot initialize\n", __func__,
oh->name);
goto exit;
}
sr_data->name = oh->name;
sr_data->lvt_sensor = false;
sr_data->ip_type = oh->class->rev;
sr_data->senn_mod = 0x1;
sr_data->senp_mod = 0x1;
sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
if (IS_ERR(sr_data->voltdm)) {
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
__func__, sr_dev_attr->sensor_voltdm_name);
goto exit;
}
if (cpu_is_omap54xx() &&
(!strcmp(sr_data->voltdm->name, "mpu") ||
!strcmp(sr_data->voltdm->name, "mm")))
sr_data->lvt_sensor = true;
omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
if (!volt_data) {
pr_warning("%s: No Voltage table registerd fo VDD%d."
"Something really wrong\n\n", __func__, i + 1);
goto exit;
}
sr_set_nvalues(volt_data, sr_data);
if (sr_data->lvt_sensor)
lvt_sr_set_nvalues(volt_data, sr_data);
sr_data->enable_on_init = sr_enable_on_init;
sr_data->ops = &omap_sr_ops;
pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
NULL, 0, 0);
if (IS_ERR(pdev))
pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
__func__, name, oh->name);
/* DONOT auto-disable me while going to suspend */
omap_device_disable_idle_on_suspend(pdev);
exit:
i++;
kfree(sr_data);
return 0;
}
