Byte ext_read(ADDRESS adr){
Byte d;
Byte si;
Byte m;
int i;
if (!(p1 & 0x08) && !(p1 & 0x40)) {
/* Handle VDC Read */
switch(adr) {
case 0xA1:
d = VDCwrite[0xA0] & 0x02;
if (master_clk > VBLCLK) d = d | 0x08;
if (h_clk < (LINECNT-7)) d = d | 0x01;
if (sound_IRQ) d = d | 0x04;
sound_IRQ=0;
return d;
case 0xA2:
si = VDCwrite[0xA2];
m=0x01;
d=0;
for(i=0; i<8; i++) {
if (si & m) {
if (coltab[1] & m) d = d | (coltab[1] & (m ^ 0xFF));
if (coltab[2] & m) d = d | (coltab[2] & (m ^ 0xFF));
if (coltab[4] & m) d = d | (coltab[4] & (m ^ 0xFF));
if (coltab[8] & m) d = d | (coltab[8] & (m ^ 0xFF));
if (coltab[0x10] & m) d = d | (coltab[0x10] & (m ^ 0xFF));
if (coltab[0x20] & m) d = d | (coltab[0x20] & (m ^ 0xFF));
if (coltab[0x80] & m) d = d | (coltab[0x80] & (m ^ 0xFF));
}
m = m << 1;
}
clear_collision();
return d;
case 0xA5:
if (!(VDCwrite[0xA0] & 0x02)) {
return x_latch;
}
else {
x_latch = h_clk * 12;
return x_latch;
}
case 0xA4:
if (!(VDCwrite[0xA0] & 0x02)) {
return y_latch;
}
else {
y_latch = master_clk/22;
if (y_latch > 241) y_latch=0xFF;
return y_latch;
}
default:
return VDCwrite[adr];
}
} else if (!(p1 & 0x10)) {
/* Handle ext RAM Read */
if (app_data.megaxrom && (adr >= 0x80)) {
/* MegaCART registers are mirrored every 4 bytes */
if ((adr & 0x83) == 0x83) {
/* TODO: emulate EEPROM data in */
return 0xff;
} else return extRAM[adr & 0x83];
} else return extRAM[adr & 0xFF];
} else if (!(p1 & 0x20)) {
/* Read a Videopac+ register */
return vpp_read(adr);
} else if (app_data.exrom && (p1 & 0x02)) {
/* Handle read from exrom */
return extROM[(p2 << 8) | (adr & 0xFF)];
} else if (app_data.megaxrom && !(p1 & 0x02) && !(p1 & 0x40)) {
/* Handle data read from MegaCART */
return megarom[(extRAM[0x81] << 12) | ((p2 & 0x0f) << 8) | (adr & 0xff)];
}
return 0;
}
/* read a value, final destination is base on p1 (controlled by write p1)*/
Byte ext_read(ADDRESS adr) {
Byte d;
Byte si;
Byte m;
int i;
if (!(p1 & 0x08) && !(p1 & 0x40)) {
/* Handle VDC Read */
switch(adr) {
case 0xA1:
d = VDCwrite[0xA0] & 0x02;
if (master_clk > VBLCLK) d = d | 0x08;
if (h_clk < (LINECNT-7)) d = d | 0x01;
if (sound_IRQ) d = d | 0x04;
sound_IRQ=0;
return d;
case 0xA2:/* 0xA2 vdc_collision http://soeren.informationstheater.de/g7000/hardware.html */
si = VDCwrite[0xA2];
m = 0x01;
d = 0;
for(i=0; i<8; i++) {
if (si & m) {
if (coltab[1] & m) d = d | (coltab[1] & (m ^ 0xFF));
if (coltab[2] & m) d = d | (coltab[2] & (m ^ 0xFF));
if (coltab[4] & m) d = d | (coltab[4] & (m ^ 0xFF));
if (coltab[8] & m) d = d | (coltab[8] & (m ^ 0xFF));
if (coltab[0x10] & m) d = d | (coltab[0x10] & (m ^ 0xFF));
if (coltab[0x20] & m) d = d | (coltab[0x20] & (m ^ 0xFF));
if (coltab[0x80] & m) d = d | (coltab[0x80] & (m ^ 0xFF));
}
m = m << 1;
}
clear_collision();
return d;
case 0xA5:
if (!(VDCwrite[0xA0] & 0x02)) {
return x_latch;
}
else {
x_latch = h_clk * 12;
return x_latch;
}
case 0xA4:
if (!(VDCwrite[0xA0] & 0x02)) {
return y_latch;
}
else {
y_latch = master_clk/22;
if (y_latch > 241) y_latch=0xFF;
return y_latch;
}
default:
if (adr==0xA3 || adr==0xA6 || (adr>=0xA7 && adr<=0xA9) ||
(adr>=0xAB && adr<=0xBF) || (adr>=0xC9 && adr<=0xCF) ||
(adr>=0xD9 && adr <=0xDF) || (adr>=0xEA && adr<=0xFF))
return adr; /* simulate write to unused registers */
if ((VDCwrite[0xA0] & 0x20) && (adr<0x80))
return (adr && 0x02)==0?0xFF:0x00; /* simulate returnvalues for 00-7F if VDC Control bit 5 is on */
if ((VDCwrite[0xA0] & 0x08) && (adr>=0xC0) && (adr<=0xE9))
return 0x00; /* simulate returnvalues for 00-7F if VDC Control bit 5 is on */
return VDCwrite[adr];
}
} else if (!(p1 & 0x10)) {
/* Handle ext RAM Read */
if (app_data.megaxrom && (adr >= 0x80)) {
/* MegaCART registers are mirrored every 4 bytes */
if ((adr & 0x83) == 0x83) {
/* TODO: emulate EEPROM data in */
return 0xff;
} else return extRAM[adr & 0x83];
} else return extRAM[adr & 0xFF];
} else if (!(p1 & 0x20)) {
/* Read a Videopac+ register */
return vpp_read(adr);
} else if (app_data.exrom && (p1 & 0x02)) {
/* Handle read from exrom */
return extROM[(p2 << 8) | (adr & 0xFF)];
} else if (app_data.megaxrom && !(p1 & 0x02) && !(p1 & 0x40)) {
/* Handle data read from MegaCART */
printf("WARNING megarom use \n");
return megarom[(extRAM[0x81] << 12) | ((p2 & 0x0f) << 8) | (adr & 0xff)];
}
return 0;
}
