u32 eprom_read(struct net_device *dev, u32 addr)
{
struct r8192_priv *priv = rtllib_priv(dev);
short read_cmd[]={1,1,0};
short addr_str[8];
int i;
int addr_len;
u32 ret;
ret=0;
//enable EPROM programming
write_nic_byte_E(dev, EPROM_CMD,
(EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
force_pci_posting(dev);
udelay(EPROM_DELAY);
if (priv->epromtype==EPROM_93c56){
addr_str[7]=addr & 1;
addr_str[6]=addr & (1<<1);
addr_str[5]=addr & (1<<2);
addr_str[4]=addr & (1<<3);
addr_str[3]=addr & (1<<4);
addr_str[2]=addr & (1<<5);
addr_str[1]=addr & (1<<6);
addr_str[0]=addr & (1<<7);
addr_len=8;
}else{
addr_str[5]=addr & 1;
addr_str[4]=addr & (1<<1);
addr_str[3]=addr & (1<<2);
addr_str[2]=addr & (1<<3);
addr_str[1]=addr & (1<<4);
addr_str[0]=addr & (1<<5);
addr_len=6;
}
eprom_cs(dev, 1);
eprom_ck_cycle(dev);
eprom_send_bits_string(dev, read_cmd, 3);
eprom_send_bits_string(dev, addr_str, addr_len);
//keep chip pin D to low state while reading.
//I'm unsure if it is necessary, but anyway shouldn't hurt
eprom_w(dev, 0);
for(i=0;i<16;i++){
//eeprom needs a clk cycle between writing opcode&adr
//and reading data. (eeprom outs a dummy 0)
eprom_ck_cycle(dev);
ret |= (eprom_r(dev)<<(15-i));
}
eprom_cs(dev, 0);
eprom_ck_cycle(dev);
//disable EPROM programming
write_nic_byte_E(dev, EPROM_CMD,
(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
return ret;
}
void eprom_ck_cycle(struct net_device *dev)
{
write_nic_byte_E(dev, EPROM_CMD,
(1<<EPROM_CK_SHIFT) | read_nic_byte_E(dev,EPROM_CMD));
force_pci_posting(dev);
udelay(EPROM_DELAY);
write_nic_byte_E(dev, EPROM_CMD,
read_nic_byte_E(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
void eprom_w(struct net_device *dev,short bit)
{
if(bit)
write_nic_byte_E(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
read_nic_byte_E(dev,EPROM_CMD));
else
write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev,EPROM_CMD)\
&~(1<<EPROM_W_SHIFT));
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
void eprom_cs(struct net_device *dev, short bit)
{
if(bit)
write_nic_byte_E(dev, EPROM_CMD,
(1<<EPROM_CS_SHIFT) | \
read_nic_byte_E(dev, EPROM_CMD)); //enable EPROM
else
write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev, EPROM_CMD)\
&~(1<<EPROM_CS_SHIFT)); //disable EPROM
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
static void eprom_w(struct net_device *dev, short bit)
{
u8 cmdreg;
read_nic_byte_E(dev, EPROM_CMD, &cmdreg);
if (bit)
write_nic_byte_E(dev, EPROM_CMD, cmdreg | EPROM_W_BIT);
else
write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_W_BIT);
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
static void eprom_ck_cycle(struct net_device *dev)
{
u8 cmdreg;
read_nic_byte_E(dev, EPROM_CMD, &cmdreg);
write_nic_byte_E(dev, EPROM_CMD, cmdreg | EPROM_CK_BIT);
force_pci_posting(dev);
udelay(EPROM_DELAY);
read_nic_byte_E(dev, EPROM_CMD, &cmdreg);
write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_CK_BIT);
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
static void eprom_cs(struct net_device *dev, short bit)
{
u8 cmdreg;
read_nic_byte_E(dev, EPROM_CMD, &cmdreg);
if (bit)
/* enable EPROM */
write_nic_byte_E(dev, EPROM_CMD, cmdreg | EPROM_CS_BIT);
else
/* disable EPROM */
write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_CS_BIT);
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
void rtl8225_host_usb_init(struct net_device *dev)
{
#if 0
write_nic_byte(dev,RFPinsSelect+1,0);
write_nic_byte(dev,GPIO,0);
write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
write_nic_byte(dev,RFPinsSelect+1,4);
write_nic_byte(dev,GPIO,0x20);
write_nic_byte(dev,GP_ENABLE,0);
/* Config BB & RF */
write_nic_word(dev, RFPinsOutput, 0x80);
write_nic_word(dev, RFPinsSelect, 0x80);
write_nic_word(dev, RFPinsEnable, 0x80);
mdelay(100);
mdelay(1000);
#endif
}
