static void clk_block_ctrl_init(void)
{
write_reg16(BLKCON01,0x0FFF);
write_reg16(BLKCON23,0xC1DF);
write_reg16(BLKCON45,0x0603);
}
static void _spi_begin(void)
{
clear_bit(DSIOF0); // BLKCON SPI enable
write_reg8(SF0CTRLL, _spi_ctrl); // SIOF0 control
write_reg16(SF0BRR, _spi_brr);
// set SPI mode
set_bit(SF0MST); // master mode
// clear FIFO
set_bit(SF0FICL);
clear_bit(SF0FICL);
// GPIO setting
set_bit(P45MD1); clear_bit(P45MD0); set_bit(P45DIR); set_bit(P45C0); set_bit(P45C1); // MISO
set_bit(P44MD1); clear_bit(P44MD0); clear_bit(P44DIR); set_bit(P44C0); set_bit(P44C1); // MOSI
set_bit(P36MD1); clear_bit(P36MD0); clear_bit(P36DIR); set_bit(P36C0); set_bit(P36C1); // SCK
// SS setting
// pinMode(SS,OUTPUT);
// digitalWrite(SS,HIGH);
// tx rx start
set_bit(SF0SPE); // start SPI tx rx
}
static inline void set_viewport(GDisplay* g) {
write_reg16(g, 0x30, g->p.x); //HSAW0 & HSAW1
write_reg16(g, 0x34, g->p.x+g->p.cx-1); //HEAW0 & HEAW1
write_reg16(g, 0x32, g->p.y); //VSAW0 & VSAW1
write_reg16(g, 0x36, g->p.y+g->p.cy-1); //VEAW0 & VEAW1
}
static inline void set_cursor(GDisplay *g) {
write_reg16(g, 0x46, g->p.x);
write_reg16(g, 0x48, g->p.y);
write_index(g, 0x02);
}
LLDSPEC bool_t gdisp_lld_init(GDisplay *g) {
// No private area for this controller
g->priv = 0;
// Initialise the board interface
init_board(g);
// Hardware reset
setpin_reset(g, TRUE);
gfxSleepMilliseconds(20);
setpin_reset(g, FALSE);
gfxSleepMilliseconds(20);
// Get the bus for the following initialisation commands
acquire_bus(g);
// Soft reset
write_reg8x2(g, 0x01, 0x01, 0x00); gfxSleepMilliseconds(1);
// PLL config
write_reg8(g, 0x88, 0x08); gfxSleepMilliseconds(1);
write_reg8(g, 0x89, 0x02); gfxSleepMilliseconds(1);
write_reg8(g, 0x10, 0x0F); //SYSR bit[4:3]=00 256 color bit[2:1]= 00 8bit MPU interface
// 0x0F = 16bit MCU interface and 65k color display
write_reg8(g, 0x04, 0x82); gfxSleepMilliseconds(1); //set PCLK inverse
// Horizontal set
write_reg8(g, 0x14, GDISP_SCREEN_WIDTH/8-1); //HDWR: Horizontal Display Width Setting Bit[6:0] - pixels = (HDWR + 1)*8
write_reg8(g, 0x15, 0x00); //Horizontal Non-Display Period Fine Tuning Option Register (HNDFTR) - HNDFT = [3:0]
write_reg8(g, 0x16, 0x01); //HNDR: Horizontal Non-Display Period Bit[4:0] - pixels = (HNDR + 1)*8
write_reg8(g, 0x17, 0x00); //HSTR: HSYNC Start Position[4:0] - Position(PCLK) = (HSTR + 1)*8
write_reg8(g, 0x18, 0x05); //HPWR: HSYNC Polarity, The period width of HSYNC. Width [4:0] width(PCLK) = (HPWR + 1)*8
// Vertical set
write_reg16(g, 0x19, GDISP_SCREEN_HEIGHT-1); //VDHR0,1: Vertical Display Height = VDHR + 1
write_reg16(g, 0x1b, 0x0002); //VNDR0,1: Vertical Non-Display Period Bit = (VSTR + 1)
write_reg16(g, 0x1d, 0x0007); //VSTR0,1: VSYNC Start Position = (VSTR + 1)
write_reg8(g, 0x1f, 0x09); //VPWR: VSYNC Polarity, VSYNC Pulse Width[6:0] - Width(PCLK) = (VPWR + 1)
// Active window set
write_reg16(g, 0x30, 0); //HSAW0 & HSAW1
write_reg16(g, 0x34, GDISP_SCREEN_WIDTH-1); //HEAW0 & HEAW1
write_reg16(g, 0x32, 0); //VSAW0 & VSAW1
write_reg16(g, 0x36, GDISP_SCREEN_HEIGHT-1); //VEAW0 & VEAW1
// Display ON
write_reg8(g, 0x01, 0x80); //PWRR
// GPO0 DISP high
write_reg8(g, 0x13, 0x01); //GPO
// Set initial back-light
set_backlight(g, GDISP_INITIAL_BACKLIGHT);
// Change timings for faster access
post_init_board(g);
// Release the bus
release_bus(g);
/* Initialise the GDISP structure */
g->g.Width = GDISP_SCREEN_WIDTH;
g->g.Height = GDISP_SCREEN_HEIGHT;
g->g.Orientation = GDISP_ROTATE_0;
g->g.Powermode = powerOn;
g->g.Backlight = GDISP_INITIAL_BACKLIGHT;
g->g.Contrast = GDISP_INITIAL_CONTRAST;
return TRUE;
}
void lazurite_gpio_init(void)
{
// please see design note for details.
write_reg8(P0D,0x10);
write_reg8(P1D,0x01);
write_reg8(P2D,0x00);
write_reg8(P3D,0x00);
write_reg8(P4D,0x00);
write_reg8(P5D,0x42);
write_reg8(P0DIR,0x00);
write_reg16(P0CON,0x3535);
write_reg16(P0MOD,0x0500);
write_reg8(P1DIR,0x10);
write_reg16(P1CON,0x0303);
write_reg8(P2DIR,0x00);
write_reg16(P2CON,0x0000);
write_reg16(P2MOD,0x0000);
write_reg8(P3DIR,0x00);
write_reg16(P3CON,0x0000);
write_reg16(P3MOD,0x0000);
write_reg8(P4DIR,0x80);
write_reg16(P4CON,0x0303);
write_reg16(P4MOD,0x0003);
write_reg8(P5DIR,0x00);
write_reg16(P5CON,0x0000);
write_reg16(P5MOD,0x0000);
#ifdef PWR_LED
drv_pinMode(11,OUTPUT); //PWR LED ON
drv_digitalWrite(11,LOW);
#endif
}
void lazurite_gpio_init(void)
{
// please see design note for details.
write_reg8(P0D,0x00);
write_reg8(P1D,0x00);
write_reg8(P2D,0x00);
write_reg8(P3D,0x00);
write_reg8(P4D,0x00);
write_reg8(P5D,0x00);
write_reg8(P0DIR,0x00);
write_reg16(P0CON,0x0000);
write_reg16(P0MOD,0x0000);
write_reg8(P1DIR,0x00);
write_reg16(P1CON,0x0000);
write_reg8(P2DIR,0x00);
write_reg16(P2CON,0x0000);
write_reg16(P2MOD,0x0000);
write_reg8(P3DIR,0x01);
write_reg16(P3CON,0x0202);
write_reg16(P3MOD,0x0303);
write_reg8(P4DIR,0x00);
write_reg16(P4CON,0x0000);
write_reg16(P4MOD,0x0000);
write_reg8(P5DIR,0x00);
write_reg16(P5CON,0x0000);
write_reg16(P5MOD,0x0000);
}
