/*******************************************************************************
* BL31 is responsible for setting up the runtime services for the primary cpu
* before passing control to the bootloader or an Operating System. This
* function calls runtime_svc_init() which initializes all registered runtime
* services. The run time services would setup enough context for the core to
* swtich to the next exception level. When this function returns, the core will
* switch to the programmed exception level via. an ERET.
******************************************************************************/
void bl31_main(void)
{
#if DEBUG
unsigned long mpidr = read_mpidr();
#endif
/* Perform remaining generic architectural setup from EL3 */
bl31_arch_setup();
/* Perform platform setup in BL1 */
bl31_platform_setup();
printf("BL31 %s\n\r", build_message);
/* Initialise helper libraries */
bl31_lib_init();
/* Initialize the runtime services e.g. psci */
runtime_svc_init();
/* Clean caches before re-entering normal world */
dcsw_op_all(DCCSW);
/*
* Use the more complex exception vectors now that context
* management is setup. SP_EL3 should point to a 'cpu_context'
* structure which has an exception stack allocated. The PSCI
* service should have set the context.
*/
assert(cm_get_context(mpidr, NON_SECURE));
cm_set_next_eret_context(NON_SECURE);
cm_init_pcpu_ptr_cache();
write_vbar_el3((uint64_t) runtime_exceptions);
isb();
next_image_type = NON_SECURE;
/*
* All the cold boot actions on the primary cpu are done. We now need to
* decide which is the next image (BL32 or BL33) and how to execute it.
* If the SPD runtime service is present, it would want to pass control
* to BL32 first in S-EL1. In that case, SPD would have registered a
* function to intialize bl32 where it takes responsibility of entering
* S-EL1 and returning control back to bl31_main. Once this is done we
* can prepare entry into BL33 as normal.
*/
/*
* If SPD had registerd an init hook, invoke it. Pass it the information
* about memory extents
*/
if (bl32_init)
(*bl32_init)(bl31_plat_get_bl32_mem_layout());
/*
* We are ready to enter the next EL. Prepare entry into the image
* corresponding to the desired security state after the next ERET.
*/
bl31_prepare_next_image_entry();
}
/*******************************************************************************
* BL31 is responsible for setting up the runtime services for the primary cpu
* before passing control to the bootloader or an Operating System. This
* function calls runtime_svc_init() which initializes all registered runtime
* services. The run time services would setup enough context for the core to
* swtich to the next exception level. When this function returns, the core will
* switch to the programmed exception level via. an ERET.
******************************************************************************/
void bl31_main(void)
{
#if DEBUG
unsigned long mpidr = read_mpidr();
#endif
/* Perform remaining generic architectural setup from EL3 */
bl31_arch_setup();
/* Perform platform setup in BL1 */
bl31_platform_setup();
#if defined (__GNUC__)
printf("BL31 Built : %s, %s\n\r", __TIME__, __DATE__);
#endif
/* Initialise helper libraries */
bl31_lib_init();
/* Initialize the runtime services e.g. psci */
runtime_svc_init();
/* Clean caches before re-entering normal world */
dcsw_op_all(DCCSW);
/*
* Use the more complex exception vectors now that context
* management is setup. SP_EL3 should point to a 'cpu_context'
* structure which has an exception stack allocated. The PSCI
* service should have set the context.
*/
assert(cm_get_context(mpidr, NON_SECURE));
cm_set_next_eret_context(NON_SECURE);
write_vbar_el3((uint64_t) runtime_exceptions);
/*
* All the cold boot actions on the primary cpu are done. We
* now need to decide which is the next image (BL32 or BL33)
* and how to execute it. If the SPD runtime service is
* present, it would want to pass control to BL32 first in
* S-EL1. It will export the bl32_init() routine where it takes
* responsibility of entering S-EL1 and returning control back
* to bl31_main. Once this is done we can prepare entry into
* BL33 as normal.
*/
/* Tell BL32 about it memory extents as well */
if (bl32_init)
bl32_init(bl31_plat_get_bl32_mem_layout());
/*
* We are ready to enter the next EL. Prepare entry into the image
* corresponding to the desired security state after the next ERET.
*/
bl31_prepare_next_image_entry();
}
/*******************************************************************************
* BL31 is responsible for setting up the runtime services for the primary cpu
* before passing control to the bootloader or an Operating System. This
* function calls runtime_svc_init() which initializes all registered runtime
* services. The run time services would setup enough context for the core to
* swtich to the next exception level. When this function returns, the core will
* switch to the programmed exception level via. an ERET.
******************************************************************************/
void bl31_main(void)
{
#if DEBUG
unsigned long mpidr = read_mpidr();
#endif
atf_arg_t_ptr teearg = (atf_arg_t_ptr)(uintptr_t)TEE_BOOT_INFO_ADDR;
if(teearg->atf_log_buf_size != 0)
{
teearg->atf_aee_debug_buf_size = ATF_AEE_BUFFER_SIZE;
teearg->atf_aee_debug_buf_start = teearg->atf_log_buf_start + teearg->atf_log_buf_size - ATF_AEE_BUFFER_SIZE;
mt_log_setup(teearg->atf_log_buf_start, teearg->atf_log_buf_size, teearg->atf_aee_debug_buf_size);
printf("ATF log service is registered (0x%x, aee:0x%x)\n", teearg->atf_log_buf_start, teearg->atf_aee_debug_buf_start);
}
else
{
teearg->atf_aee_debug_buf_size = 0;
teearg->atf_aee_debug_buf_start = 0;
}
/* Perform remaining generic architectural setup from EL3 */
bl31_arch_setup();
/* Perform platform setup in BL1 */
bl31_platform_setup();
printf("BL31 %s\n\r", build_message);
/* Initialise helper libraries */
bl31_lib_init();
/* Initialize the runtime services e.g. psci */
runtime_svc_init();
/* Clean caches before re-entering normal world */
dcsw_op_all(DCCSW);
/*
* Use the more complex exception vectors now that context
* management is setup. SP_EL3 should point to a 'cpu_context'
* structure which has an exception stack allocated. The PSCI
* service should have set the context.
*/
assert(cm_get_context(mpidr, NON_SECURE));
cm_set_next_eret_context(NON_SECURE);
cm_init_pcpu_ptr_cache();
write_vbar_el3((uint64_t) runtime_exceptions);
isb();
next_image_type = NON_SECURE;
/*
* All the cold boot actions on the primary cpu are done. We now need to
* decide which is the next image (BL32 or BL33) and how to execute it.
* If the SPD runtime service is present, it would want to pass control
* to BL32 first in S-EL1. In that case, SPD would have registered a
* function to intialize bl32 where it takes responsibility of entering
* S-EL1 and returning control back to bl31_main. Once this is done we
* can prepare entry into BL33 as normal.
*/
/*
* If SPD had registerd an init hook, invoke it.
*/
if(teearg->tee_support)
{
printf("[BL31] Jump to secure OS for initialization!\n\r");
if (bl32_init)
{
(*bl32_init)(teearg->tee_entry, teearg->tee_boot_arg_addr);
}
else
{
printf("[ERROR] Secure OS is not initialized!\n\r");
//assert(0);
}
}
else
{
printf("[BL31] Jump to FIQD for initialization!\n\r");
if (bl32_init)
{
(*bl32_init)(0, 0);
}
}
/*
* We are ready to enter the next EL. Prepare entry into the image
* corresponding to the desired security state after the next ERET.
*/
bl31_prepare_next_image_entry();
printf("[BL31] Final dump!\n\r");
clear_uart_flag();
printf("[BL31] SHOULD not dump in UART but in log buffer!\n\r");
}