/**
* \brief Configure DMA transfer
*/
static void _setup_dma_transfer(void* buffer, uint32_t size)
{
struct _xdmad_cfg cfg;
cfg.ublock_size = size / 4;
cfg.block_size = 1;
cfg.data_stride = 0;
cfg.src_ublock_stride = 0;
cfg.dest_ublock_stride = 0;
cfg.src_addr = buffer;
cfg.dest_addr = (void*)&CLASSD->CLASSD_THR;
cfg.cfg.uint32_value = XDMAC_CC_TYPE_PER_TRAN
| XDMAC_CC_MBSIZE_SINGLE
| XDMAC_CC_DSYNC_MEM2PER
| XDMAC_CC_CSIZE_CHK_1
| XDMAC_CC_DWIDTH_WORD
| XDMAC_CC_SIF_AHB_IF0
| XDMAC_CC_DIF_AHB_IF1
| XDMAC_CC_SAM_INCREMENTED_AM
| XDMAC_CC_DAM_FIXED_AM;
xdmad_configure_transfer(dma_channel, &cfg, 0, NULL);
}
/**
* \brief Programming DMAC for Multiple Buffer Transfers.
*/
static void _configure_transfer(void)
{
struct _xdmad_cfg xdmad_cfg;
void* xdmad_desc = NULL;
uint32_t desc_size;
if (dma_mode != XDMA_LL) {
xdmad_cfg.ubc = MICROBLOCK_LEN;
xdmad_cfg.sa = src_buf;
xdmad_cfg.da = dest_buf;
xdmad_cfg.cfg = XDMAC_CC_TYPE_MEM_TRAN |
XDMA_GET_CC_MEMSET(dma_memset) |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_CSIZE_CHK_1 |
XDMA_GET_DATASIZE(dma_data_width) |
XDMAC_CC_SIF_AHB_IF0 |
XDMAC_CC_DIF_AHB_IF0 |
XDMA_GET_CC_SAM(dma_src_addr_mode) |
XDMA_GET_CC_DAM(dma_dest_addr_mode);
xdmad_cfg.bc = (dma_mode == XDMA_SINGLE) ? 0 : 1;
xdmad_cfg.ds = 0;
xdmad_cfg.sus = 0;
xdmad_cfg.dus = 0;
xdmad_configure_transfer(xdmad_channel, &xdmad_cfg, 0, 0);
printf("- Microblock length: %u\n\r",
(unsigned int)xdmad_cfg.ubc);
printf("- Block length: %u\n\r",
(unsigned int)xdmad_cfg.bc);
printf("- Data Stride/Pattern: %u\n\r",
(unsigned int)xdmad_cfg.ds);
printf("- Source Microblock Stride: %u\n\r",
(unsigned int)xdmad_cfg.sus);
printf("- Destination Microblock Stride: %u\n\r",
(unsigned int)xdmad_cfg.dus);
} else {
uint32_t desc_cntrl;
xdmad_cfg.bc = 0;
xdmad_cfg.ds = 0;
xdmad_cfg.sus = 0;
xdmad_cfg.dus = 0;
switch (dma_view) {
case 0:
xdmad_cfg.cfg = XDMAC_CC_TYPE_MEM_TRAN |
XDMA_GET_CC_MEMSET(dma_memset) |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_CSIZE_CHK_1 |
XDMA_GET_DATASIZE(dma_data_width) |
XDMAC_CC_SIF_AHB_IF0 |
XDMAC_CC_DIF_AHB_IF0 |
XDMA_GET_CC_SAM(dma_src_addr_mode) |
XDMA_GET_CC_DAM(dma_dest_addr_mode);
break;
case 1:
xdmad_cfg.cfg = XDMAC_CC_TYPE_MEM_TRAN |
XDMA_GET_CC_MEMSET(dma_memset) |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_CSIZE_CHK_1 |
XDMA_GET_DATASIZE(dma_data_width) |
XDMAC_CC_SIF_AHB_IF0 |
XDMAC_CC_DIF_AHB_IF0 |
XDMA_GET_CC_SAM(dma_src_addr_mode) |
XDMA_GET_CC_DAM(dma_dest_addr_mode);
break;
case 2:
case 3:
xdmad_cfg.cfg = XDMAC_CC_TYPE_MEM_TRAN |
XDMA_GET_CC_MEMSET(dma_memset) |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_CSIZE_CHK_1 |
XDMA_GET_DATASIZE(dma_data_width) |
XDMAC_CC_SIF_AHB_IF0 |
XDMAC_CC_DIF_AHB_IF0 |
XDMA_GET_CC_SAM(dma_src_addr_mode) |
XDMA_GET_CC_DAM(dma_dest_addr_mode);
break;
}
desc_size = _configure_view(&xdmad_desc, &desc_cntrl, &xdmad_cfg);
cache_clean_region(xdmad_desc, desc_size);
xdmad_configure_transfer(xdmad_channel, &xdmad_cfg, desc_cntrl,
xdmad_desc);
}
xdmad_set_callback(xdmad_channel, _dma_callback, NULL);
printf("- Press 't' to perform xDMA transfer...\n\r");
}
