BusType StringToBusType(const char *busID, const char **retID) { char *p, *s; BusType ret = BUS_NONE; /* If no type field, Default to PCI */ if (isdigit(busID[0])) { if (retID) *retID = busID; return BUS_PCI; } s = xstrdup(busID); p = strtok(s, ":"); if (p == NULL || *p == 0) { free(s); return BUS_NONE; } if (!xf86NameCmp(p, "pci") || !xf86NameCmp(p, "agp")) ret = BUS_PCI; if (!xf86NameCmp(p, "sbus")) ret = BUS_SBUS; if (!xf86NameCmp(p, "platform")) ret = BUS_PLATFORM; if (ret != BUS_NONE) if (retID) *retID = busID + strlen(p) + 1; free(s); return ret; }
void InitInput(int argc, char **argv) { IDevPtr* pDev; DeviceIntPtr dev; xf86Info.vtRequestsPending = FALSE; mieqInit(); GetEventList(&xf86Events); /* Call the PreInit function for each input device instance. */ for (pDev = xf86ConfigLayout.inputs; pDev && *pDev; pDev++) { /* Replace obsolete keyboard driver with kbd */ if (!xf86NameCmp((*pDev)->driver, "keyboard")) { strcpy((*pDev)->driver, "kbd"); } /* If one fails, the others will too */ if (xf86NewInputDevice(*pDev, &dev, TRUE) == BadAlloc) break; } config_init(); }
InputDriverPtr xf86LookupInputDriver(const char *name) { int i; for (i = 0; i < xf86NumInputDrivers; i++) { if (xf86InputDriverList[i] && xf86InputDriverList[i]->driverName && xf86NameCmp(name, xf86InputDriverList[i]->driverName) == 0) return xf86InputDriverList[i]; } return NULL; }
int xf86StringToToken(SymTabPtr table, const char *string) { int i; if (string == NULL) return -1; for (i = 0; table[i].token >= 0 && xf86NameCmp(string, table[i].name); i++) ; return table[i].token; }
/* * xf86LoadModules iterates over a list that is being passed in. */ Bool xf86LoadModules(char **list, pointer *optlist) { int errmaj, errmin; pointer opt; int i; char *name; Bool failed = FALSE; if (!list) return TRUE; for (i = 0; list[i] != NULL; i++) { /* Normalise the module name */ name = xf86NormalizeName(list[i]); /* Skip empty names */ if (name == NULL || *name == '\0') { free(name); continue; } /* Replace obsolete keyboard driver with kbd */ if (!xf86NameCmp(name, "keyboard")) { strcpy(name, "kbd"); } if (optlist) opt = optlist[i]; else opt = NULL; if (!LoadModule(name, NULL, NULL, NULL, opt, NULL, &errmaj, &errmin)) { LoaderErrorMsg(NULL, name, errmaj, errmin); failed = TRUE; } free(name); } return !failed; }
pointer xf86FindXvOptions(int scrnIndex, int adaptor_index, char *port_name, char **adaptor_name, pointer *adaptor_options) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; confXvAdaptorPtr adaptor; int i; if (adaptor_index >= pScrn->confScreen->numxvadaptors) { if (adaptor_name) *adaptor_name = NULL; if (adaptor_options) *adaptor_options = NULL; return NULL; } adaptor = &pScrn->confScreen->xvadaptors[adaptor_index]; if (adaptor_name) *adaptor_name = adaptor->identifier; if (adaptor_options) *adaptor_options = adaptor->options; for (i = 0; i < adaptor->numports; i++) if (!xf86NameCmp(adaptor->ports[i].identifier, port_name)) return adaptor->ports[i].options; return NULL; }
int xf86SetSerial(int fd, XF86OptionPtr options) { struct termios t; int val; const char *s; int baud, r; if (fd < 0) return -1; /* Don't try to set parameters for non-tty devices. */ if (!isatty(fd)) return 0; SYSCALL(tcgetattr(fd, &t)); if ((val = xf86SetIntOption(options, "BaudRate", 0))) { if ((baud = GetBaud(val))) { cfsetispeed(&t, baud); cfsetospeed(&t, baud); } else { xf86Msg(X_ERROR, "Invalid Option BaudRate value: %d\n", val); return -1; } } if ((val = xf86SetIntOption(options, "StopBits", 0))) { switch (val) { case 1: t.c_cflag &= ~(CSTOPB); break; case 2: t.c_cflag |= CSTOPB; break; default: xf86Msg(X_ERROR, "Invalid Option StopBits value: %d\n", val); return -1; break; } } if ((val = xf86SetIntOption(options, "DataBits", 0))) { switch (val) { case 5: t.c_cflag &= ~(CSIZE); t.c_cflag |= CS5; break; case 6: t.c_cflag &= ~(CSIZE); t.c_cflag |= CS6; break; case 7: t.c_cflag &= ~(CSIZE); t.c_cflag |= CS7; break; case 8: t.c_cflag &= ~(CSIZE); t.c_cflag |= CS8; break; default: xf86Msg(X_ERROR, "Invalid Option DataBits value: %d\n", val); return -1; break; } } if ((s = xf86SetStrOption(options, "Parity", NULL))) { if (xf86NameCmp(s, "Odd") == 0) { t.c_cflag |= PARENB | PARODD; } else if (xf86NameCmp(s, "Even") == 0) { t.c_cflag |= PARENB; t.c_cflag &= ~(PARODD); } else if (xf86NameCmp(s, "None") == 0) { t.c_cflag &= ~(PARENB); } else { xf86Msg(X_ERROR, "Invalid Option Parity value: %s\n", s); return -1; } } if ((val = xf86SetIntOption(options, "Vmin", -1)) != -1) { t.c_cc[VMIN] = val; } if ((val = xf86SetIntOption(options, "Vtime", -1)) != -1) { t.c_cc[VTIME] = val; } if ((s = xf86SetStrOption(options, "FlowControl", NULL))) { xf86MarkOptionUsedByName(options, "FlowControl"); if (xf86NameCmp(s, "Xoff") == 0) { t.c_iflag |= IXOFF; } else if (xf86NameCmp(s, "Xon") == 0) { t.c_iflag |= IXON; } else if (xf86NameCmp(s, "XonXoff") == 0) { t.c_iflag |= IXON | IXOFF; } else if (xf86NameCmp(s, "None") == 0) { t.c_iflag &= ~(IXON | IXOFF); } else { xf86Msg(X_ERROR, "Invalid Option FlowControl value: %s\n", s); return -1; } } if ((xf86SetBoolOption(options, "ClearDTR", FALSE))) { #ifdef CLEARDTR_SUPPORT #if defined(TIOCMBIC) val = TIOCM_DTR; SYSCALL(ioctl(fd, TIOCMBIC, &val)); #else SYSCALL(ioctl(fd, TIOCCDTR, NULL)); #endif #else xf86Msg(X_WARNING, "Option ClearDTR not supported on this OS\n"); return -1; #endif xf86MarkOptionUsedByName(options, "ClearDTR"); } if ((xf86SetBoolOption(options, "ClearRTS", FALSE))) { xf86Msg(X_WARNING, "Option ClearRTS not supported on this OS\n"); return -1; xf86MarkOptionUsedByName(options, "ClearRTS"); } SYSCALL(r = tcsetattr(fd, TCSANOW, &t)); return r; }
void xgiOptions(ScrnInfoPtr pScrn) { XGIPtr pXGI = XGIPTR(pScrn); MessageType from; char *strptr; static const char *mybadparm = "\"%s\" is is not a valid parameter for option \"%s\"\n"; static const char *disabledstr = "disabled"; static const char *enabledstr = "enabled"; static const char *ilrangestr = "Illegal %s parameter. Valid range is %d through %d\n"; /* Collect all of the relevant option flags (fill in pScrn->options) */ xf86CollectOptions(pScrn, NULL); /* Process the options */ if(!(pXGI->Options = malloc(sizeof(XGIOptions)))) return; memcpy(pXGI->Options, XGIOptions, sizeof(XGIOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pXGI->Options); /* Set defaults */ /* #ifdef __powerpc__ pXGI->NoAccel = TRUE; #endif */ pXGI->TurboQueue = TRUE; #ifdef XGIVRAMQ /* TODO: Option (315 series VRAM command queue) */ /* But beware: xgifb does not know about this!!! */ pXGI->cmdQueueSize = 512*1024; #endif pXGI->doRender = TRUE; pXGI->HWCursor = TRUE; pXGI->Rotate = FALSE; pXGI->ShadowFB = FALSE; /* Jong 01/22/2009; only XG40 has 3-d feature */ if(pXGI->Chipset == PCI_CHIP_XGIXG40) pXGI->loadDRI = TRUE; else pXGI->loadDRI = FALSE; pXGI->agpWantedPages = AGP_PAGES; pXGI->NoXvideo = FALSE; pXGI->maxxfbmem = 0; pXGI->OptROMUsage = -1; pXGI->noInternalModes = FALSE; pXGI->NonDefaultPAL = pXGI->NonDefaultNTSC = -1; pXGI->restorebyset = TRUE; pXGI->nocrt2ddcdetection = FALSE; pXGI->forcecrt2redetection = TRUE; /* default changed since 13/09/2003 */ pXGI->SenseYPbPr = TRUE; pXGI->ForceCRT1Type = CRT1_VGA; pXGI->ForceCRT2Type = CRT2_DEFAULT; pXGI->ForceYPbPrAR = TV_YPBPR169; pXGI->ForceTVType = -1; pXGI->CRT1gamma = TRUE; pXGI->CRT1gammaGiven = FALSE; pXGI->CRT2gamma = TRUE; pXGI->XvGamma = FALSE; pXGI->XvGammaGiven = FALSE; pXGI->enablexgictrl = FALSE; pXGI->XvDefBri = 0; pXGI->XvDefCon = 4; pXGI->XvDefHue = 0; pXGI->XvDefSat = 0; pXGI->XvDefDisableGfx = FALSE; pXGI->XvDefDisableGfxLR = FALSE; pXGI->XvUseMemcpy = TRUE; pXGI->XvGammaRed = pXGI->XvGammaGreen = pXGI->XvGammaBlue = 1000; #ifdef XGIMERGED pXGI->MergedFB = pXGI->MergedFBAuto = FALSE; pXGI->CRT2Position = xgiRightOf; pXGI->CRT2HSync = NULL; pXGI->CRT2VRefresh = NULL; pXGI->MetaModes = NULL; pXGI->MergedFBXDPI = pXGI->MergedFBYDPI = 0; #ifdef XGIXINERAMA pXGI->UsexgiXinerama = TRUE; pXGI->CRT2IsScrn0 = FALSE; #endif #endif #ifdef XGI_CP XGI_CP_OPT_DEFAULT #endif /* Collect the options */ int TargetRefreshRate = 0; if(xf86GetOptValInteger(pXGI->Options /* pScrn->monitor->options */, OPTION_TARGET_RATE, &TargetRefreshRate)) { xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Monitor (Option) : Set target refresh rate at %d for all modes...\n", TargetRefreshRate); } pXGI->TargetRefreshRate = TargetRefreshRate; pXGI->IgnoreDDC = FALSE; if(xf86GetOptValBool(pXGI->Options, OPTION_IGNORE_DDC, &pXGI->IgnoreDDC)) { if(pXGI->IgnoreDDC == TRUE) xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Monitor (Option) : IgnoreDDC \n"); } #if 0 /* can support 1280x768 but not being applied */ else { pXGI->IgnoreDDC = TRUE; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Monitor (Option) : set IgnoreDDC as default\n"); } #endif pXGI->Non_DDC_DefaultMode = FALSE; pXGI->Non_DDC_DefaultResolutionX = 1024; pXGI->Non_DDC_DefaultResolutionY = 768; pXGI->Non_DDC_DefaultRefreshRate = 60; char ModeStringFormat[32] = "%[^x]x%[^@]@%[^\n]" /* "%[^x]+%[^@]+%[^H^z]" */; char* Non_DDCDefaultMode = ""; char Non_DDCDefaultResolutionX[8] = ""; char Non_DDCDefaultResolutionY[8] = ""; char Non_DDCDefaultRefreshRate[8] = ""; /* strcpy(ModeStringFormat, "%[^+]x%[^+]@%[^\n]"); */ if((Non_DDCDefaultMode = (char *)xf86GetOptValString(pXGI->Options, OPTION_NONDDC_DEFAULT_MODE))) { sscanf(Non_DDCDefaultMode, ModeStringFormat, Non_DDCDefaultResolutionX , Non_DDCDefaultResolutionY , Non_DDCDefaultRefreshRate ); if( (xf86NameCmp(Non_DDCDefaultResolutionX,"") == NULL) || (xf86NameCmp(Non_DDCDefaultResolutionY,"") == NULL) ) { strcpy(Non_DDCDefaultResolutionX, "1024"); strcpy(Non_DDCDefaultResolutionY, "768"); } if( (xf86NameCmp(Non_DDCDefaultRefreshRate,"") == NULL) || (xf86NameCmp(Non_DDCDefaultRefreshRate,"auto") == NULL) ) strcpy(Non_DDCDefaultRefreshRate, "60"); ErrorF("Non-DDC default mode is (%s x %s @ %s Hz)...\n", Non_DDCDefaultResolutionX , Non_DDCDefaultResolutionY , Non_DDCDefaultRefreshRate ); pXGI->Non_DDC_DefaultMode = TRUE; pXGI->Non_DDC_DefaultResolutionX = atoi(Non_DDCDefaultResolutionX); pXGI->Non_DDC_DefaultResolutionY = atoi(Non_DDCDefaultResolutionY); pXGI->Non_DDC_DefaultRefreshRate = atoi(Non_DDCDefaultRefreshRate); ErrorF("Non-DDC default mode is (%d x %d @ %d Hz)...\n", pXGI->Non_DDC_DefaultResolutionX , pXGI->Non_DDC_DefaultResolutionY , pXGI->Non_DDC_DefaultRefreshRate ); } /* Jong@09092009; gamma value */ g_GammaRed = g_GammaGreen = g_GammaBlue = 1000; char GammaStringFormat[32] = "%[^,],%[^,],%[^\n]"; char* GammaRGB = ""; char GammaRed[8] = ""; char GammaGreen[8] = ""; char GammaBlue[8] = ""; if((GammaRGB = (char *)xf86GetOptValString(pXGI->Options, OPTION_GAMMA_RGB))) { ErrorF("GammaRGB is (%s) from xorg.conf\n", GammaRGB); sscanf(GammaRGB, GammaStringFormat, GammaRed , GammaGreen , GammaBlue ); ErrorF("GammaRGB is (%s, %s, %s) after parsing\n", GammaRed, GammaGreen, GammaBlue); g_GammaRed = atoi(GammaRed); g_GammaGreen = atoi(GammaGreen); g_GammaBlue = atoi(GammaBlue); ErrorF("GammaRGB is (%d, %d, %d) after atoi()\n", g_GammaRed, g_GammaGreen, g_GammaBlue); } /* MaxXFBMem * This options limits the amount of video memory X uses for screen * and off-screen buffers. This option should be used if using DRI * is intended. The kernel framebuffer driver required for DRM will * start its memory heap at 12MB if it detects more than 16MB, at 8MB if * between 8 and 16MB are available, otherwise at 4MB. So, if the amount * of memory X uses, a clash between the framebuffer's memory heap * and X is avoided. The amount is to be specified in KB. */ if(xf86GetOptValULong(pXGI->Options, OPTION_MAXXFBMEM, &pXGI->maxxfbmem)) { xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "MaxXFBMem: Framebuffer memory shall be limited to %ld KB\n", pXGI->maxxfbmem); pXGI->maxxfbmem *= 1024; } /* NoAccel * Turns off 2D acceleration */ if(xf86ReturnOptValBool(pXGI->Options, OPTION_NOACCEL, FALSE)) { pXGI->NoAccel = TRUE; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "2D Acceleration disabled\n"); } /* Jong@10022009; for xvinfo */ if ((pXGI->Chipset== PCI_CHIP_XGIXG20)||(pXGI->Chipset== PCI_CHIP_XGIXG21)||(pXGI->Chipset== PCI_CHIP_XGIXG27)) pXGI->NoXvideo = TRUE; pXGI->useEXA = FALSE; /* default : XAA */ if(!pXGI->NoAccel) { from = X_DEFAULT; if((strptr = (char *)xf86GetOptValString(pXGI->Options, OPTION_ACCELMETHOD))) { if(!xf86NameCmp(strptr,"XAA")) { from = X_CONFIG; pXGI->useEXA = FALSE; } else if(!xf86NameCmp(strptr,"EXA")) { from = X_CONFIG; pXGI->useEXA = TRUE; } } xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration architecture\n", pXGI->useEXA ? "EXA" : "XAA"); } /* SWCursor * HWCursor * Chooses whether to use the hardware or software cursor */ from = X_DEFAULT; if(xf86GetOptValBool(pXGI->Options, OPTION_HW_CURSOR, &pXGI->HWCursor)) { from = X_CONFIG; } if(xf86ReturnOptValBool(pXGI->Options, OPTION_SW_CURSOR, FALSE)) { from = X_CONFIG; pXGI->HWCursor = FALSE; } xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", pXGI->HWCursor ? "HW" : "SW"); /* * MergedFB * * Enable/disable and configure merged framebuffer mode * */ #ifdef XGIMERGED if (IS_DUAL_HEAD(pXGI)) { Bool val; if(xf86GetOptValBool(pXGI->Options, OPTION_MERGEDFB, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Option \"MergedFB\" cannot be used in Dual Head mode\n"); } } else #endif /* Some options can only be specified in the Master Head's Device * section. Here we give the user a hint in the log. */ if (IS_DUAL_HEAD(pXGI) && IS_SECOND_HEAD(pXGI)) { static const char *mystring = "Option \"%s\" is only accepted in Master Head's device section\n"; Bool val; if(xf86GetOptValBool(pXGI->Options, OPTION_TURBOQUEUE, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "TurboQueue"); } if(xf86GetOptValBool(pXGI->Options, OPTION_RESTOREBYSET, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "RestoreBySetMode"); } if(xf86GetOptValBool(pXGI->Options, OPTION_ENABLEHOTKEY, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "EnableHotKey"); } if(xf86GetOptValBool(pXGI->Options, OPTION_ENABLEXGICTRL, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "EnableXGICtrl"); } if(xf86GetOptValBool(pXGI->Options, OPTION_USEROMDATA, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "UseROMData"); } if(xf86GetOptValBool(pXGI->Options, OPTION_NODDCFORCRT2, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "NoCRT2Detection"); } if(xf86GetOptValBool(pXGI->Options, OPTION_FORCECRT2REDETECTION, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT2ReDetection"); } if(xf86GetOptValBool(pXGI->Options, OPTION_SENSEYPBPR, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "SenseYPbPr"); } if(xf86GetOptValString(pXGI->Options, OPTION_FORCE_CRT1TYPE)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT1Type"); } if(xf86GetOptValString(pXGI->Options, OPTION_FORCE_CRT2TYPE)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT2Type"); } if(xf86GetOptValString(pXGI->Options, OPTION_YPBPRAR)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "YPbPrAspectRatio"); } if(xf86GetOptValString(pXGI->Options, OPTION_SPECIALTIMING)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "SpecialTiming"); } if(xf86GetOptValBool(pXGI->Options, OPTION_CRT2GAMMA, &val)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CRT2Gamma"); } #ifdef XGI_CP XGI_CP_OPT_DH_WARN #endif } else {
/* * ATIProcessOptions -- * * This function extracts options from what was parsed out of the XF86Config * file. */ void ATIProcessOptions ( ScrnInfoPtr pScreenInfo, ATIPtr pATI ) { OptionInfoPtr PublicOption = xnfalloc(ATIPublicOptionSize); OptionInfoRec PrivateOption[] = { { /* ON: Let BIOS change display(s) */ ATI_OPTION_BIOS_DISPLAY, /* OFF: Don't */ "biosdisplay", OPTV_BOOLEAN, {0, }, FALSE }, { /* Negation of "PanelDisplay" public option */ ATI_OPTION_CRT_SCREEN, "crtscreen", OPTV_BOOLEAN, {0, }, FALSE }, { /* ON: Ease exploration of loose ends */ ATI_OPTION_DEVEL, /* OFF: Fit for public consumption */ "tsi", OPTV_BOOLEAN, {0, }, FALSE }, { /* ON: Horizontally blend most modes */ ATI_OPTION_BLEND, /* OFF: Use pixel replication more often */ "lcdblend", OPTV_BOOLEAN, {0, }, FALSE }, { /* ON: Use XF86Config porch timings */ ATI_OPTION_LCDSYNC, /* OFF: Use porches from mode on entry */ "lcdsync", OPTV_BOOLEAN, {0, }, FALSE }, { -1, NULL, OPTV_NONE, {0, }, FALSE } }; (void)memcpy(PublicOption, ATIPublicOptions, ATIPublicOptionSize); # define ProbeSparse PublicOption[ATI_OPTION_PROBE_SPARSE].value.bool # define Accel PublicOption[ATI_OPTION_ACCEL].value.bool # define BIOSDisplay PrivateOption[ATI_OPTION_BIOS_DISPLAY].value.bool # define Blend PrivateOption[ATI_OPTION_BLEND].value.bool # define CRTDisplay PublicOption[ATI_OPTION_CRT_DISPLAY].value.bool # define CRTScreen PrivateOption[ATI_OPTION_CRT_SCREEN].value.bool # define CSync PublicOption[ATI_OPTION_CSYNC].value.bool # define Devel PrivateOption[ATI_OPTION_DEVEL].value.bool # define HWCursor PublicOption[ATI_OPTION_HWCURSOR].value.bool #ifdef XF86DRI_DEVEL # define IsPCI PublicOption[ATI_OPTION_IS_PCI].value.bool # define DMAMode PublicOption[ATI_OPTION_DMA_MODE].value.str # define AGPMode PublicOption[ATI_OPTION_AGP_MODE].value.num # define AGPSize PublicOption[ATI_OPTION_AGP_SIZE].value.num # define LocalTex PublicOption[ATI_OPTION_LOCAL_TEXTURES].value.bool # define BufferSize PublicOption[ATI_OPTION_BUFFER_SIZE].value.num #endif /* XF86DRI_DEVEL */ #ifdef TV_OUT # define TvOut PublicOption[ATI_OPTION_TV_OUT].value.bool # define TvStd PublicOption[ATI_OPTION_TV_STD].value.str #endif /* TV_OUT */ # define CacheMMIO PublicOption[ATI_OPTION_MMIO_CACHE].value.bool # define TestCacheMMIO PublicOption[ATI_OPTION_TEST_MMIO_CACHE].value.bool # define PanelDisplay PublicOption[ATI_OPTION_PANEL_DISPLAY].value.bool # define ShadowFB PublicOption[ATI_OPTION_SHADOW_FB].value.bool # define SWCursor PublicOption[ATI_OPTION_SWCURSOR].value.bool # define AccelMethod PublicOption[ATI_OPTION_ACCELMETHOD].value.str # define RenderAccel PublicOption[ATI_OPTION_RENDER_ACCEL].value.bool # define LCDSync PrivateOption[ATI_OPTION_LCDSYNC].value.bool # define ReferenceClock \ PublicOption[ATI_OPTION_REFERENCE_CLOCK].value.freq.freq /* Pick up XF86Config options */ xf86CollectOptions(pScreenInfo, NULL); /* Set non-zero defaults */ Accel = CacheMMIO = HWCursor = TRUE; ReferenceClock = ((double)157500000.0) / ((double)11.0); ShadowFB = TRUE; Blend = PanelDisplay = TRUE; #ifdef USE_EXA RenderAccel = TRUE; #endif #ifdef XF86DRI_DEVEL DMAMode = "async"; #endif #ifdef TV_OUT TvStd = "None"; /* No tv standard change requested */ #endif xf86ProcessOptions(pScreenInfo->scrnIndex, pScreenInfo->options, PublicOption); xf86ProcessOptions(pScreenInfo->scrnIndex, pScreenInfo->options, PrivateOption); /* Move option values into driver private structure */ pATI->OptionProbeSparse = ProbeSparse; pATI->OptionAccel = Accel; pATI->OptionBIOSDisplay = BIOSDisplay; pATI->OptionBlend = Blend; pATI->OptionCRTDisplay = CRTDisplay; pATI->OptionCSync = CSync; pATI->OptionDevel = Devel; #ifdef TV_OUT if (TvOut && pATI->Chip < ATI_CHIP_264GT) { /* Only allow this for 3D Rage (I) or greater chip ID * AFAIK, no chips before this supported TV-Out * mach64VT has support for TV tuner, but no TV-Out */ xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "TV Out not supported for this chip.\n"); } else { ATITVStandard std; pATI->OptionTvOut = TvOut; pATI->OptionTvStd = ATI_TV_STD_INVALID; for (std = 0; std < ATI_TV_STDS_MAX_VALID; std++) { if (std != ATI_TV_STD_RESERVED1 && std != ATI_TV_STD_RESERVED2) { if (strncasecmp(TvStd, ATITVStandardNames[std], ATI_TV_STDS_NAME_MAXLEN)==0) { pATI->OptionTvStd = std; break; } } } } #endif /* TV_OUT */ pATI->OptionMMIOCache = CacheMMIO; pATI->OptionTestMMIOCache = TestCacheMMIO; pATI->OptionShadowFB = ShadowFB; pATI->OptionLCDSync = LCDSync; /* "CRTScreen" is now "NoPanelDisplay" */ if ((PanelDisplay != CRTScreen) || PublicOption[ATI_OPTION_PANEL_DISPLAY].found) pATI->OptionPanelDisplay = PanelDisplay; else pATI->OptionPanelDisplay = !CRTScreen; #ifdef XF86DRI_DEVEL pATI->OptionIsPCI = IsPCI; pATI->OptionAGPMode = AGPMode; pATI->OptionAGPSize = AGPSize; pATI->OptionLocalTextures = LocalTex; pATI->OptionBufferSize = BufferSize; if (strcasecmp(DMAMode, "async")==0) pATI->OptionDMAMode = MACH64_MODE_DMA_ASYNC; else if (strcasecmp(DMAMode, "sync")==0) pATI->OptionDMAMode = MACH64_MODE_DMA_SYNC; else if (strcasecmp(DMAMode, "mmio")==0 ) pATI->OptionDMAMode = MACH64_MODE_MMIO; else { xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Unkown dma_mode: '%s'\n", DMAMode); xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Valid dma_mode options are: 'async','sync','mmio'\n"); xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Defaulting to async DMA mode\n"); pATI->OptionDMAMode = MACH64_MODE_DMA_ASYNC; } #endif /* XF86DRI_DEVEL */ /* Validate and set cursor options */ pATI->Cursor = ATI_CURSOR_SOFTWARE; if (SWCursor || !HWCursor) { if (HWCursor && PublicOption[ATI_OPTION_HWCURSOR].found) xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Option \"sw_cursor\" overrides Option \"hw_cursor\".\n"); } else if (pATI->Chip < ATI_CHIP_264CT) { if (HWCursor && PublicOption[ATI_OPTION_HWCURSOR].found) xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Option \"hw_cursor\" not supported in this configuration.\n"); } else { pATI->Cursor = ATI_CURSOR_HARDWARE; } pATI->refclk = (int)ReferenceClock; pATI->useEXA = FALSE; if (pATI->OptionAccel) { MessageType from = X_DEFAULT; #if defined(USE_EXA) #if defined(USE_XAA) if (AccelMethod != NULL) { from = X_CONFIG; if (xf86NameCmp(AccelMethod, "EXA") == 0) pATI->useEXA = TRUE; } #else /* USE_XAA */ pATI->useEXA = TRUE; #endif /* !USE_XAA */ #endif /* USE_EXA */ xf86DrvMsg(pScreenInfo->scrnIndex, from, "Using %s acceleration architecture\n", pATI->useEXA ? "EXA" : "XAA"); #if defined(USE_EXA) if (pATI->useEXA && pATI->Chip >= ATI_CHIP_264GTPRO) pATI->RenderAccelEnabled = TRUE; if (pATI->useEXA && !RenderAccel) pATI->RenderAccelEnabled = FALSE; #endif } free(PublicOption); }
int xf86SetSerial (int fd, pointer options) { APIRET rc; USHORT baud; ULONG plen,dlen; char *s; GLINECTL linectl; DCBINFO dcb; if ((s = xf86FindOptionValue (options, "BaudRate"))) { xf86MarkOptionUsedByName (options, "BaudRate"); if ((rc = _set_baudrate(fd, atoi(s)))) { xf86Msg (X_ERROR,"Set Baudrate: %s, rc=%d\n", s, rc); return -1; } } /* get line parameters */ if (DosDevIOCtl((HFILE)fd,IOCTL_ASYNC, ASYNC_GETLINECTRL, NULL,0,NULL, (PULONG)&linectl,sizeof(GLINECTL),&dlen)) return -1; if ((s = xf86FindOptionValue (options, "StopBits"))) { xf86MarkOptionUsedByName (options, "StopBits"); switch (atoi (s)) { case 1: linectl.stopbits = 0; break; case 2: linectl.stopbits = 2; break; default: xf86Msg (X_ERROR, "Invalid Option StopBits value: %s\n", s); return -1; } } if ((s = xf86FindOptionValue (options, "DataBits"))) { int db; xf86MarkOptionUsedByName (options, "DataBits"); switch (db = atoi (s)) { case 5: case 6: case 7: case 8: linectl.databits = db; break; default: xf86Msg (X_ERROR, "Invalid Option DataBits value: %s\n", s); return -1; } } if ((s = xf86FindOptionValue (options, "Parity"))) { xf86MarkOptionUsedByName (options, "Parity"); if (xf86NameCmp (s, "Odd") == 0) linectl.parity = 1; /* odd */ else if (xf86NameCmp (s, "Even") == 0) linectl.parity = 2; /* even */ else if (xf86NameCmp (s, "None") == 0) linectl.parity = 0; /* none */ else { xf86Msg (X_ERROR, "Invalid Option Parity value: %s\n", s); return -1; } } /* set line parameters */ if (_set_linectl(fd,&linectl)) return -1; if (xf86FindOptionValue (options, "Vmin")) xf86Msg (X_ERROR, "Vmin unsupported on this OS\n"); if (xf86FindOptionValue (options, "Vtime")) xf86Msg (X_ERROR, "Vtime unsupported on this OS\n"); /* get device parameters */ if (_get_dcb(fd,&dcb)) return -1; if ((s = xf86FindOptionValue (options, "FlowControl"))) { xf86MarkOptionUsedByName (options, "FlowControl"); if (xf86NameCmp (s, "XonXoff") == 0) dcb.fbFlowReplace |= 0x03; else if (xf86NameCmp (s, "None") == 0) dcb.fbFlowReplace &= ~0x03; else { xf86Msg (X_ERROR, "Invalid Option FlowControl value: %s\n", s); return -1; } } if ((s = xf86FindOptionValue (options, "ClearDTR"))) { dcb.fbCtlHndShake &= ~0x03; /* DTR=0 */ xf86MarkOptionUsedByName (options, "ClearDTR"); } if ((s = xf86FindOptionValue (options, "ClearRTS"))) { dcb.fbFlowReplace &= ~0xc0; /* RTS=0 */ xf86MarkOptionUsedByName (options, "ClearRTS"); } /* set device parameters */ return _set_dcb(fd,&dcb) ? -1 : 0; }
/* Mandatory */ Bool LgPreInit(ScrnInfoPtr pScrn, int flags) { CirPtr pCir; vgaHWPtr hwp; MessageType from; int i; ClockRangePtr clockRanges; int fbPCIReg, ioPCIReg; char *s; if (flags & PROBE_DETECT) { cirProbeDDC( pScrn, xf86GetEntityInfo(pScrn->entityList[0])->index ); return TRUE; } #ifdef LG_DEBUG ErrorF("LgPreInit\n"); #endif /* Check the number of entities, and fail if it isn't one. */ if (pScrn->numEntities != 1) return FALSE; /* The vgahw module should be loaded here when needed */ if (!xf86LoadSubModule(pScrn, "vgahw")) return FALSE; xf86LoaderReqSymLists(vgahwSymbols, NULL); /* * Allocate a vgaHWRec */ if (!vgaHWGetHWRec(pScrn)) return FALSE; hwp = VGAHWPTR(pScrn); vgaHWGetIOBase(hwp); /* Allocate the LgRec driverPrivate */ if (!LgGetRec(pScrn)) return FALSE; pCir = CIRPTR(pScrn); pCir->pScrn = pScrn; pCir->PIOReg = hwp->PIOOffset + 0x3CE; /* Get the entity, and make sure it is PCI. */ pCir->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); if (pCir->pEnt->location.type != BUS_PCI) return FALSE; pCir->Chipset = pCir->pEnt->chipset; /* Find the PCI info for this screen */ pCir->PciInfo = xf86GetPciInfoForEntity(pCir->pEnt->index); pCir->PciTag = pciTag(pCir->PciInfo->bus, pCir->PciInfo->device, pCir->PciInfo->func); if (xf86LoadSubModule(pScrn, "int10")) { xf86Int10InfoPtr int10InfoPtr; xf86LoaderReqSymLists(int10Symbols, NULL); int10InfoPtr = xf86InitInt10(pCir->pEnt->index); if (int10InfoPtr) xf86FreeInt10(int10InfoPtr); } /* Set pScrn->monitor */ pScrn->monitor = pScrn->confScreen->monitor; /* * The first thing we should figure out is the depth, bpp, etc. * We support both 24bpp and 32bpp layouts, so indicate that. */ if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support24bppFb | Support32bppFb | SupportConvert32to24 | PreferConvert32to24)) { return FALSE; } /* Check that the returned depth is one we support */ switch (pScrn->depth) { case 8: case 15: case 16: case 24: case 32: /* OK */ break; default: xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given depth (%d) is not supported by this driver\n", pScrn->depth); return FALSE; } xf86PrintDepthBpp(pScrn); /* Get the depth24 pixmap format */ if (pScrn->depth == 24 && pix24bpp == 0) pix24bpp = xf86GetBppFromDepth(pScrn, 24); /* * This must happen after pScrn->display has been set because * xf86SetWeight references it. */ if (pScrn->depth > 8) { /* The defaults are OK for us */ rgb zeros = {0, 0, 0}; /* !!! I think we can force 5-6-5 weight for 16bpp here for the 5462. */ if (!xf86SetWeight(pScrn, zeros, zeros)) { return FALSE; } else { /* XXX check that weight returned is supported */ ; } } if (!xf86SetDefaultVisual(pScrn, -1)) return FALSE; /* Collect all of the relevant option flags (fill in pScrn->options) */ xf86CollectOptions(pScrn, NULL); /* Process the options */ if (!(pCir->Options = xalloc(sizeof(LgOptions)))) return FALSE; memcpy(pCir->Options, LgOptions, sizeof(LgOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pCir->Options); pScrn->rgbBits = 6; from = X_DEFAULT; pCir->HWCursor = FALSE; if (xf86GetOptValBool(pCir->Options, OPTION_HW_CURSOR, &pCir->HWCursor)) from = X_CONFIG; xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", pCir->HWCursor ? "HW" : "SW"); if (xf86ReturnOptValBool(pCir->Options, OPTION_NOACCEL, FALSE)) { pCir->NoAccel = TRUE; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); } if (pScrn->bitsPerPixel < 8) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot use in less than 8 bpp\n"); return FALSE; } /* * Set the ChipRev, allowing config file entries to * override. */ if (pCir->pEnt->device->chipRev >= 0) { pCir->ChipRev = pCir->pEnt->device->chipRev; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", pCir->ChipRev); } else { pCir->ChipRev = pCir->PciInfo->chipRev; } /* Cirrus swapped the FB and IO registers in the 5465 (by design). */ if (PCI_CHIP_GD5465 == pCir->Chipset) { fbPCIReg = 0; ioPCIReg = 1; } else { fbPCIReg = 1; ioPCIReg = 0; } /* Find the frame buffer base address */ if (pCir->pEnt->device->MemBase != 0) { /* Require that the config file value matches one of the PCI values. */ if (!xf86CheckPciMemBase(pCir->PciInfo, pCir->pEnt->device->MemBase)) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "MemBase 0x%08lX doesn't match any PCI base register.\n", pCir->pEnt->device->MemBase); return FALSE; } pCir->FbAddress = pCir->pEnt->device->MemBase; from = X_CONFIG; } else { if (pCir->PciInfo->memBase[fbPCIReg] != 0) { pCir->FbAddress = pCir->PciInfo->memBase[fbPCIReg] & 0xff000000; from = X_PROBED; } else { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid FB address in PCI config space\n"); LgFreeRec(pScrn); return FALSE; } } xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", (unsigned long)pCir->FbAddress); /* Find the MMIO base address */ if (pCir->pEnt->device->IOBase != 0) { /* Require that the config file value matches one of the PCI values. */ if (!xf86CheckPciMemBase(pCir->PciInfo, pCir->pEnt->device->IOBase)) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "IOBase 0x%08lX doesn't match any PCI base register.\n", pCir->pEnt->device->IOBase); return FALSE; } pCir->IOAddress = pCir->pEnt->device->IOBase; from = X_CONFIG; } else { if (pCir->PciInfo->memBase[ioPCIReg] != 0) { pCir->IOAddress = pCir->PciInfo->memBase[ioPCIReg] & 0xfffff000; from = X_PROBED; } else { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid MMIO address in PCI config space\n"); } } xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", (unsigned long)pCir->IOAddress); /* * If the user has specified the amount of memory in the XF86Config * file, we respect that setting. */ if (pCir->pEnt->device->videoRam != 0) { pScrn->videoRam = pCir->pEnt->device->videoRam; from = X_CONFIG; } else { pScrn->videoRam = LgCountRam(pScrn); from = X_PROBED; } if (2048 == pScrn->videoRam) { /* Two-way interleaving */ pCir->chip.lg->memInterleave = 0x40; } else if (4096 == pScrn->videoRam || 8192 == pScrn->videoRam) { /* Four-way interleaving */ pCir->chip.lg->memInterleave = 0x80; } else { /* One-way interleaving */ pCir->chip.lg->memInterleave = 0x00; } xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n", pScrn->videoRam); pCir->FbMapSize = pScrn->videoRam * 1024; pCir->IoMapSize = 0x4000; /* 16K for moment, will increase */ pScrn->racIoFlags = RAC_COLORMAP #ifndef EXPERIMENTAL | RAC_VIEWPORT #endif ; xf86SetOperatingState(resVgaMem, pCir->pEnt->index, ResUnusedOpr); /* Register the PCI-assigned resources. */ if (xf86RegisterResources(pCir->pEnt->index, NULL, ResExclusive)) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86RegisterResources() found resource conflicts\n"); return FALSE; } if (!xf86LoadSubModule(pScrn, "ddc")) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(ddcSymbols, NULL); #if LGuseI2C if (!xf86LoadSubModule(pScrn, "i2c")) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(i2cSymbols, NULL); #endif /* Read and print the monitor DDC information */ pScrn->monitor->DDC = LgDoDDC(pScrn); /* The gamma fields must be initialised when using the new cmap code */ if (pScrn->depth > 1) { Gamma zeros = {0.0, 0.0, 0.0}; if (!xf86SetGamma(pScrn, zeros)) return FALSE; } if (xf86GetOptValBool(pCir->Options, OPTION_SHADOW_FB,&pCir->shadowFB)) xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShadowFB %s.\n", pCir->shadowFB ? "enabled" : "disabled"); if ((s = xf86GetOptValString(pCir->Options, OPTION_ROTATE))) { if(!xf86NameCmp(s, "CW")) { /* accel is disabled below for shadowFB */ pCir->shadowFB = TRUE; pCir->rotate = 1; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Rotating screen clockwise - acceleration disabled\n"); } else if(!xf86NameCmp(s, "CCW")) { pCir->shadowFB = TRUE; pCir->rotate = -1; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Rotating screen" "counter clockwise - acceleration disabled\n"); } else { xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "\"%s\" is not a valid" "value for Option \"Rotate\"\n", s); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Valid options are \"CW\" or \"CCW\"\n"); } } if (pCir->shadowFB && !pCir->NoAccel) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "HW acceleration not supported with \"shadowFB\".\n"); pCir->NoAccel = TRUE; } if (pCir->rotate && pCir->HWCursor) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "HW cursor not supported with \"rotate\".\n"); pCir->HWCursor = FALSE; } /* We use a programmable clock */ pScrn->progClock = TRUE; /* XXX Set HW cursor use */ /* Set the min pixel clock */ pCir->MinClock = 12000; /* XXX Guess, need to check this */ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n", pCir->MinClock / 1000); /* * If the user has specified ramdac speed in the XF86Config * file, we respect that setting. */ if (pCir->pEnt->device->dacSpeeds[0]) { ErrorF("Do not specify a Clocks line for Cirrus chips\n"); return FALSE; } else { int speed; int *p; switch (pCir->Chipset) { case PCI_CHIP_GD5462: p = gd5462_MaxClocks; break; case PCI_CHIP_GD5464: case PCI_CHIP_GD5464BD: p = gd5464_MaxClocks; break; case PCI_CHIP_GD5465: p = gd5465_MaxClocks; break; default: ErrorF("???\n"); return FALSE; } switch (pScrn->bitsPerPixel) { case 8: speed = p[1]; break; case 15: case 16: speed = p[2]; break; case 24: speed = p[3]; break; case 32: speed = p[4]; break; default: /* Should not get here */ speed = 0; break; } pCir->MaxClock = speed; from = X_PROBED; } xf86DrvMsg(pScrn->scrnIndex, from, "Max pixel clock is %d MHz\n", pCir->MaxClock / 1000); /* * Setup the ClockRanges, which describe what clock ranges are available, * and what sort of modes they can be used for. */ clockRanges = xnfcalloc(sizeof(ClockRange), 1); clockRanges->next = NULL; clockRanges->minClock = pCir->MinClock; clockRanges->maxClock = pCir->MaxClock; clockRanges->clockIndex = -1; /* programmable */ clockRanges->interlaceAllowed = FALSE; /* XXX check this */ clockRanges->doubleScanAllowed = FALSE; /* XXX check this */ clockRanges->doubleScanAllowed = FALSE; /* XXX check this */ clockRanges->doubleScanAllowed = FALSE; /* XXX check this */ clockRanges->ClockMulFactor = 1; clockRanges->ClockDivFactor = 1; clockRanges->PrivFlags = 0; /* Depending upon what sized tiles used, either 128 or 256. */ /* Aw, heck. Just say 128. */ pCir->Rounding = 128 >> pCir->BppShift; /* * xf86ValidateModes will check that the mode HTotal and VTotal values * don't exceed the chipset's limit if pScrn->maxHValue and * pScrn->maxVValue are set. Since our CIRValidMode() already takes * care of this, we don't worry about setting them here. */ i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, pScrn->display->modes, clockRanges, LgLinePitches[pScrn->bitsPerPixel / 8 - 1], 0, 0, 128 * 8, 0, 0, /* Any virtual height is allowed. */ pScrn->display->virtualX, pScrn->display->virtualY, pCir->FbMapSize, LOOKUP_BEST_REFRESH); pCir->chip.lg->lineDataIndex = LgFindLineData(pScrn->displayWidth, pScrn->bitsPerPixel); if (i == -1) { LgFreeRec(pScrn); return FALSE; } /* Prune the modes marked as invalid */ xf86PruneDriverModes(pScrn); if (i == 0 || pScrn->modes == NULL) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); LgFreeRec(pScrn); return FALSE; } /* * Set the CRTC parameters for all of the modes based on the type * of mode, and the chipset's interlace requirements. * * Calling this is required if the mode->Crtc* values are used by the * driver and if the driver doesn't provide code to set them. They * are not pre-initialised at all. */ xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V); /* Set the current mode to the first in the list */ pScrn->currentMode = pScrn->modes; /* Print the list of modes being used */ xf86PrintModes(pScrn); /* Set display resolution */ xf86SetDpi(pScrn, 0, 0); /* Load bpp-specific modules */ switch (pScrn->bitsPerPixel) { case 8: case 16: case 24: case 32: if (xf86LoadSubModule(pScrn, "fb") == NULL) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(fbSymbols, NULL); break; } /* Load XAA if needed */ if (!pCir->NoAccel) { if (!xf86LoadSubModule(pScrn, "xaa")) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(xaaSymbols, NULL); } /* Load ramdac if needed */ if (pCir->HWCursor) { if (!xf86LoadSubModule(pScrn, "ramdac")) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(ramdacSymbols, NULL); } if (pCir->shadowFB) { if (!xf86LoadSubModule(pScrn, "shadowfb")) { LgFreeRec(pScrn); return FALSE; } xf86LoaderReqSymLists(shadowSymbols, NULL); } return TRUE; }
int xf86MatchDevice(const char *drivername, GDevPtr **sectlist) { GDevPtr gdp, *pgdp = NULL; confScreenPtr screensecptr; int i,j; if (sectlist) *sectlist = NULL; /* * This can happen when running Xorg -showopts and a module like ati * or vmware tries to load its submodules when xf86ConfigLayout is empty */ if (!xf86ConfigLayout.screens) return 0; /* * This is a very important function that matches the device sections * as they show up in the config file with the drivers that the server * loads at run time. * * ChipProbe can call * int xf86MatchDevice(char * drivername, GDevPtr ** sectlist) * with its driver name. The function allocates an array of GDevPtr and * returns this via sectlist and returns the number of elements in * this list as return value. 0 means none found, -1 means fatal error. * * It can figure out which of the Device sections to use for which card * (using things like the Card statement, etc). For single headed servers * there will of course be just one such Device section. */ i = 0; /* * first we need to loop over all the Screens sections to get to all * 'active' device sections */ for (j=0; xf86ConfigLayout.screens[j].screen != NULL; j++) { screensecptr = xf86ConfigLayout.screens[j].screen; if ((screensecptr->device->driver != NULL) && (xf86NameCmp( screensecptr->device->driver,drivername) == 0) && (! screensecptr->device->claimed)) { /* * we have a matching driver that wasn't claimed, yet */ pgdp = xnfrealloc(pgdp, (i + 2) * sizeof(GDevPtr)); pgdp[i++] = screensecptr->device; } } /* Then handle the inactive devices */ j = 0; while (xf86ConfigLayout.inactives[j].identifier) { gdp = &xf86ConfigLayout.inactives[j]; if (gdp->driver && !gdp->claimed && !xf86NameCmp(gdp->driver,drivername)) { /* we have a matching driver that wasn't claimed yet */ pgdp = xnfrealloc(pgdp, (i + 2) * sizeof(GDevPtr)); pgdp[i++] = gdp; } j++; } /* * make the array NULL terminated and return its address */ if (i) pgdp[i] = NULL; if (sectlist) *sectlist = pgdp; else free(pgdp); return i; }