Пример #1
0
 void insert(const QStringList &path, BranchNode *n)
 {
     BranchNode *current = this;
     for (int i = 0; i < path.count(); ++i) {
         BranchNode *c = current->childOfName(path.at(i));
         if (c)
             current = c;
         else
             current = current->append(new BranchNode(path.at(i)));
     }
     current->append(n);
 }
Пример #2
0
Expr* PrimInliner::genCall(bool canFail) {
  // standard primitive call
  //
  // Note: If a primitive fails, it will return a marked symbol. One has to make sure that
  //       this marked symbol is *never* stored on the stack but only kept in registers
  //       (otherwise GC won't work correctly). Here this is established by using the dst()
  //       of a pcall only which is pre-allocated to the result_reg.
  MergeNode*		nlrTestPoint	= _pdesc->can_perform_NLR() ? _scope->nlrTestPoint() : NULL;
  GrowableArray<PReg*>*	args		= _gen->pass_arguments(NULL, _pdesc->number_of_parameters());
  GrowableArray<PReg*>*	exprStack	= _pdesc->can_walk_stack() ? _gen->copyCurrentExprStack() : NULL;
  PrimNode*		pcall		= NodeFactory::new_PrimNode(_pdesc, nlrTestPoint, args, exprStack);

  _gen->append(pcall);

  BranchNode* branch = NULL;
  if (_failure_block != NULL && canFail) {
    // primitive with failure block; failed if Mark_Tag_Bit is set in result -> add a branch node here
    _gen->append(NodeFactory::new_ArithRCNode(new NoPReg(_scope), pcall->dest(), TestArithOp, Mark_Tag_Bit)); 
    branch = NodeFactory::new_BranchNode(NEBranchOp);
    _gen->append(branch);
  }

  // primitive didn't fail (with or without failure block) -> assign to resPReg & determine its expression
  SAPReg* resPReg = new SAPReg(_scope);
  _gen->append(NodeFactory::new_AssignNode(pcall->dst(), resPReg));
  Node* ok_exit = _gen->_current;
  Expr* resExpr = _pdesc->return_klass(resPReg, ok_exit);
  if (resExpr == NULL) resExpr = new UnknownExpr(resPReg, ok_exit);

  if (branch != NULL) {
    // add failure block if primitive can fail -> reset Mark_Tag_Bit first
    SAPReg* errPReg = new SAPReg(_scope);
    ArithRCNode* failure_exit = NodeFactory::new_ArithRCNode(errPReg, pcall->dst(), AndArithOp, ~Mark_Tag_Bit);
    branch->append(1, failure_exit);
    resExpr = merge_failure_block(ok_exit, resExpr, failure_exit, new KlassExpr(Universe::symbolKlassObj(), errPReg, failure_exit), false);
  }

  return resExpr;
}
Пример #3
0
void CompiledLoop::removeLoopVarOverflow() {
  // bug: should remove overflow only if increment is constant and not too large -- fix this
  Node* n = _incNode->next();
  assert(n->isBranchNode(), "must be branch");
  BranchNode* overflowCheck = (BranchNode*)n;
  assert(overflowCheck->op() == VSBranchOp, "should be overflow check");
  if (CompilerDebug || PrintLoopOpts) {
    cout(PrintLoopOpts)->print("*removing overflow check at node N%d\n", overflowCheck->id());
  }
  Node* taken = overflowCheck->next(1);	  // overflow handling code
  taken->removeUpToMerge();
  overflowCheck->removeNext(taken);	  // so overflowCheck can be eliminated
  overflowCheck->eliminate(overflowCheck->bb(), NULL, true, false);

  // since increment cannot fail anymore, directly increment loop counter if possible
  // need to search for assignment of incremented value to loop var
  Node* a = overflowCheck->next();
  while (1) {
    if (a->nPredecessors() > 1) break;	  // can't search beyond merge
    if (a->nSuccessors()   > 1) break;	  // can't search beyond branches
    if (a->isAssignNode()) {
      if (!a->deleted) {
	AssignNode* assign = (AssignNode*)a;
	if (assign->src() == _incNode->dest() && assign->dest() == _loopVar) {
	  if (CompilerDebug || PrintLoopOpts) {
	    cout(PrintLoopOpts)->print("*optimizing loopVar increment at N%d\n", _incNode->id());
	  }
	  _incNode->setDest(_incNode->bb(), _loopVar);
	  assign->eliminate(assign->bb(), NULL, true, false);
	}
      }
    } else if (!a->isTrivial()) {
      compiler_warning("unexpected nontrivial node N%d after loopVar increment\n", a->id());
    }
    a = a->next();
  }
}
Пример #4
0
int main(int argc, char* argv[])
{
    QCoreApplication app(argc, argv);

    using namespace domain;

    BranchNode scheduler;

    scheduler.addNode(new SensorAltimeterNode());
    scheduler.addNode(new SensorInsNode());
    scheduler.addNode(new SensorSnsNode());
    scheduler.addNode(new ServoDrivesNode());

    scheduler.addNode(new FlightRecorderNode());

    scheduler.addNode(new FlightNavigatorNode());
    scheduler.addNode(new FlightPilotNode());
    scheduler.addNode(new FlightDynamicsNode());

    scheduler.addNode(new BoardTransceiverNode());

    scheduler.init();
    scheduler.start();

    return app.exec();
}