TEST(Cpu, SBC_NoUnderflowNoCarryFlag) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.A.write(0x02);
cpu.i_sbc(0x01);
ASSERT_EQ(0, cpu.A.read());
// No underflow, so the carry bit gets set
ASSERT_TRUE(cpu.P.has_carry());
ASSERT_TRUE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_overflow());
}
TEST(Cpu, SBC_NoUnderflow) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.i_sec(); // set carry instruction
cpu.A.write(0x01);
cpu.i_sbc(0x01);
ASSERT_EQ(0, cpu.A.read());
ASSERT_TRUE(cpu.P.has_carry());
ASSERT_TRUE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_overflow());
}
TEST(Cpu, SBC_UnderflowNoCarryFlag) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
// since carry flag is cleared, SBC will subtract 1 more
// and, in this case, wrap around
cpu.A.write(0x01);
cpu.i_sbc(0x01);
ASSERT_EQ(0xff, cpu.A.read());
ASSERT_FALSE(cpu.P.has_carry());
ASSERT_FALSE(cpu.P.has_zero());
ASSERT_TRUE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_overflow());
}
TEST(Cpu, SBC_OverflowFlag_Negative) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.i_sec();
cpu.A.write(0x01);
cpu.i_sbc(0x02);
// 1 - 2 = -1 is allowed to be negative, so
// the overflow flag should be cleared
ASSERT_EQ(0xff, cpu.A.read());
ASSERT_FALSE(cpu.P.has_overflow());
ASSERT_TRUE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_carry());
}
TEST(Cpu, SBC_OverflowFlag_Positive) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.i_sec();
cpu.A.write(0x01); // 1
cpu.i_sbc(0x80); // -128
// 1 - (-128) = 1 + 128 = 129
// But this overflows in two's complement math:
// 0x01 - 0x80 = 0x81 = -127
ASSERT_EQ(0x81, cpu.A.read());
ASSERT_TRUE(cpu.P.has_overflow());
ASSERT_TRUE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_carry());
}