//------------------------------------------------------------------------
// DecomposeInd: Decompose GT_IND.
//
// Arguments:
// tree - the tree to decompose
//
// Return Value:
// None.
//
void DecomposeLongs::DecomposeInd(GenTree** ppTree, Compiler::fgWalkData* data)
{
GenTreePtr indLow = *ppTree;
GenTreeStmt* addrStmt = CreateTemporary(&indLow->gtOp.gtOp1);
JITDUMP("[DecomposeInd]: Saving addr tree to a temp var:\n");
DISPTREE(addrStmt);
// Change the type of lower ind.
indLow->gtType = TYP_INT;
// Create tree of ind(addr+4)
GenTreePtr addrBase = indLow->gtGetOp1();
GenTreePtr addrBaseHigh = new(m_compiler, GT_LCL_VAR) GenTreeLclVar(GT_LCL_VAR,
addrBase->TypeGet(), addrBase->AsLclVarCommon()->GetLclNum(), BAD_IL_OFFSET);
GenTreePtr addrHigh = new(m_compiler, GT_LEA) GenTreeAddrMode(TYP_REF, addrBaseHigh, nullptr, 0, genTypeSize(TYP_INT));
GenTreePtr indHigh = new (m_compiler, GT_IND) GenTreeIndir(GT_IND, TYP_INT, addrHigh, nullptr);
// Connect linear links
SimpleLinkNodeAfter(addrBaseHigh, addrHigh);
SimpleLinkNodeAfter(addrHigh, indHigh);
FinalizeDecomposition(ppTree, data, indLow, indHigh);
}
//------------------------------------------------------------------------
// TreeNodeInfoInitBlockStore: Set the NodeInfo for a block store.
//
// Arguments:
// blkNode - The block store node of interest
//
// Return Value:
// None.
//
void Lowering::TreeNodeInfoInitBlockStore(GenTreeBlk* blkNode)
{
GenTree* dstAddr = blkNode->Addr();
unsigned size = blkNode->gtBlkSize;
GenTree* source = blkNode->Data();
LinearScan* l = m_lsra;
Compiler* compiler = comp;
// Sources are dest address and initVal or source.
// We may require an additional source or temp register for the size.
blkNode->gtLsraInfo.srcCount = 2;
blkNode->gtLsraInfo.dstCount = 0;
GenTreePtr srcAddrOrFill = nullptr;
bool isInitBlk = blkNode->OperIsInitBlkOp();
if (!isInitBlk)
{
// CopyObj or CopyBlk
if (source->gtOper == GT_IND)
{
srcAddrOrFill = blkNode->Data()->gtGetOp1();
// We're effectively setting source as contained, but can't call MakeSrcContained, because the
// "inheritance" of the srcCount is to a child not a parent - it would "just work" but could be misleading.
// If srcAddr is already non-contained, we don't need to change it.
if (srcAddrOrFill->gtLsraInfo.getDstCount() == 0)
{
srcAddrOrFill->gtLsraInfo.setDstCount(1);
srcAddrOrFill->gtLsraInfo.setSrcCount(source->gtLsraInfo.srcCount);
}
m_lsra->clearOperandCounts(source);
source->SetContained();
source->AsIndir()->Addr()->ClearContained();
}
else if (!source->IsMultiRegCall() && !source->OperIsSIMD())
{
assert(source->IsLocal());
MakeSrcContained(blkNode, source);
blkNode->gtLsraInfo.srcCount--;
}
}
if (isInitBlk)
{
GenTreePtr initVal = source;
if (initVal->OperIsInitVal())
{
initVal->SetContained();
initVal = initVal->gtGetOp1();
}
srcAddrOrFill = initVal;
if (blkNode->gtBlkOpKind == GenTreeBlk::BlkOpKindUnroll)
{
// TODO-ARM-CQ: Currently we generate a helper call for every
// initblk we encounter. Later on we should implement loop unrolling
// code sequences to improve CQ.
// For reference see the code in lsraxarch.cpp.
NYI_ARM("initblk loop unrolling is currently not implemented.");
#ifdef _TARGET_ARM64_
// No additional temporaries required
ssize_t fill = initVal->gtIntCon.gtIconVal & 0xFF;
if (fill == 0)
{
MakeSrcContained(blkNode, source);
blkNode->gtLsraInfo.srcCount--;
}
#endif // _TARGET_ARM64_
}
else
{
assert(blkNode->gtBlkOpKind == GenTreeBlk::BlkOpKindHelper);
// The helper follows the regular ABI.
dstAddr->gtLsraInfo.setSrcCandidates(l, RBM_ARG_0);
initVal->gtLsraInfo.setSrcCandidates(l, RBM_ARG_1);
if (size != 0)
{
// Reserve a temp register for the block size argument.
blkNode->gtLsraInfo.setInternalCandidates(l, RBM_ARG_2);
blkNode->gtLsraInfo.internalIntCount = 1;
}
else
{
// The block size argument is a third argument to GT_STORE_DYN_BLK
noway_assert(blkNode->gtOper == GT_STORE_DYN_BLK);
blkNode->gtLsraInfo.setSrcCount(3);
GenTree* sizeNode = blkNode->AsDynBlk()->gtDynamicSize;
sizeNode->gtLsraInfo.setSrcCandidates(l, RBM_ARG_2);
}
}
}
else
{
// CopyObj or CopyBlk
// Sources are src and dest and size if not constant.
if (blkNode->OperGet() == GT_STORE_OBJ)
{
// CopyObj
// We don't need to materialize the struct size but we still need
// a temporary register to perform the sequence of loads and stores.
blkNode->gtLsraInfo.internalIntCount = 1;
if (size >= 2 * REGSIZE_BYTES)
{
// We will use ldp/stp to reduce code size and improve performance
// so we need to reserve an extra internal register
blkNode->gtLsraInfo.internalIntCount++;
}
// We can't use the special Write Barrier registers, so exclude them from the mask
regMaskTP internalIntCandidates = RBM_ALLINT & ~(RBM_WRITE_BARRIER_DST_BYREF | RBM_WRITE_BARRIER_SRC_BYREF);
blkNode->gtLsraInfo.setInternalCandidates(l, internalIntCandidates);
// If we have a dest address we want it in RBM_WRITE_BARRIER_DST_BYREF.
dstAddr->gtLsraInfo.setSrcCandidates(l, RBM_WRITE_BARRIER_DST_BYREF);
// If we have a source address we want it in REG_WRITE_BARRIER_SRC_BYREF.
// Otherwise, if it is a local, codegen will put its address in REG_WRITE_BARRIER_SRC_BYREF,
// which is killed by a StoreObj (and thus needn't be reserved).
if (srcAddrOrFill != nullptr)
{
srcAddrOrFill->gtLsraInfo.setSrcCandidates(l, RBM_WRITE_BARRIER_SRC_BYREF);
}
}
else
{
// CopyBlk
short internalIntCount = 0;
regMaskTP internalIntCandidates = RBM_NONE;
if (blkNode->gtBlkOpKind == GenTreeBlk::BlkOpKindUnroll)
{
// TODO-ARM-CQ: cpblk loop unrolling is currently not implemented.
// In case of a CpBlk with a constant size and less than CPBLK_UNROLL_LIMIT size
// we should unroll the loop to improve CQ.
// For reference see the code in lsraxarch.cpp.
NYI_ARM("cpblk loop unrolling is currently not implemented.");
#ifdef _TARGET_ARM64_
internalIntCount = 1;
internalIntCandidates = RBM_ALLINT;
if (size >= 2 * REGSIZE_BYTES)
{
// We will use ldp/stp to reduce code size and improve performance
// so we need to reserve an extra internal register
internalIntCount++;
}
#endif // _TARGET_ARM64_
}
else
{
assert(blkNode->gtBlkOpKind == GenTreeBlk::BlkOpKindHelper);
dstAddr->gtLsraInfo.setSrcCandidates(l, RBM_ARG_0);
// The srcAddr goes in arg1.
if (srcAddrOrFill != nullptr)
{
srcAddrOrFill->gtLsraInfo.setSrcCandidates(l, RBM_ARG_1);
}
if (size != 0)
{
// Reserve a temp register for the block size argument.
internalIntCandidates |= RBM_ARG_2;
internalIntCount++;
}
else
{
// The block size argument is a third argument to GT_STORE_DYN_BLK
noway_assert(blkNode->gtOper == GT_STORE_DYN_BLK);
blkNode->gtLsraInfo.setSrcCount(3);
GenTree* blockSize = blkNode->AsDynBlk()->gtDynamicSize;
blockSize->gtLsraInfo.setSrcCandidates(l, RBM_ARG_2);
}
}
if (internalIntCount != 0)
{
blkNode->gtLsraInfo.internalIntCount = internalIntCount;
blkNode->gtLsraInfo.setInternalCandidates(l, internalIntCandidates);
}
}
}
}
bool RangeCheck::IsMonotonicallyIncreasing(GenTreePtr expr, SearchPath* path)
{
JITDUMP("[RangeCheck::IsMonotonicallyIncreasing] %p\n", dspPtr(expr));
if (path->Lookup(expr))
{
return true;
}
// Add hashtable entry for expr.
path->Set(expr, NULL);
// Remove hashtable entry for expr when we exit the present scope.
auto code = [&] { path->Remove(expr); };
jitstd::utility::scoped_code<decltype(code)> finally(code);
// If the rhs expr is constant, then it is not part of the dependency
// loop which has to increase monotonically.
ValueNum vn = expr->gtVNPair.GetConservative();
if (m_pCompiler->vnStore->IsVNConstant(vn))
{
return true;
}
// If the rhs expr is local, then try to find the def of the local.
else if (expr->IsLocal())
{
Location* loc = GetDef(expr);
if (loc == nullptr)
{
return false;
}
GenTreePtr asg = loc->parent;
assert(asg->OperKind() & GTK_ASGOP);
switch (asg->OperGet())
{
case GT_ASG:
return IsMonotonicallyIncreasing(asg->gtGetOp2(), path);
case GT_ASG_ADD:
return IsBinOpMonotonicallyIncreasing(asg->gtGetOp1(), asg->gtGetOp2(), GT_ADD, path);
}
JITDUMP("Unknown local definition type\n");
return false;
}
else if (expr->OperGet() == GT_ADD)
{
return IsBinOpMonotonicallyIncreasing(expr->gtGetOp1(), expr->gtGetOp2(), GT_ADD, path);
}
else if (expr->OperGet() == GT_PHI)
{
for (GenTreeArgList* args = expr->gtOp.gtOp1->AsArgList();
args != nullptr; args = args->Rest())
{
// If the arg is already in the path, skip.
if (path->Lookup(args->Current()))
{
continue;
}
if (!IsMonotonicallyIncreasing(args->Current(), path))
{
JITDUMP("Phi argument not monotonic\n");
return false;
}
}
return true;
}
JITDUMP("Unknown tree type\n");
return false;
}
//------------------------------------------------------------------------
// TreeNodeInfoInitIndir: Specify register requirements for address expression
// of an indirection operation.
//
// Arguments:
// indirTree - GT_IND, GT_STOREIND, block node or GT_NULLCHECK gentree node
//
void Lowering::TreeNodeInfoInitIndir(GenTreePtr indirTree)
{
assert(indirTree->OperIsIndir());
// If this is the rhs of a block copy (i.e. non-enregisterable struct),
// it has no register requirements.
if (indirTree->TypeGet() == TYP_STRUCT)
{
return;
}
GenTreePtr addr = indirTree->gtGetOp1();
TreeNodeInfo* info = &(indirTree->gtLsraInfo);
GenTreePtr base = nullptr;
GenTreePtr index = nullptr;
unsigned cns = 0;
unsigned mul;
bool rev;
bool modifiedSources = false;
bool makeContained = true;
if ((addr->OperGet() == GT_LEA) && IsSafeToContainMem(indirTree, addr))
{
GenTreeAddrMode* lea = addr->AsAddrMode();
base = lea->Base();
index = lea->Index();
cns = lea->gtOffset;
#ifdef _TARGET_ARM_
// ARM floating-point load/store doesn't support a form similar to integer
// ldr Rdst, [Rbase + Roffset] with offset in a register. The only supported
// form is vldr Rdst, [Rbase + imm] with a more limited constraint on the imm.
if (lea->HasIndex() || !emitter::emitIns_valid_imm_for_vldst_offset(cns))
{
if (indirTree->OperGet() == GT_STOREIND)
{
if (varTypeIsFloating(indirTree->AsStoreInd()->Data()))
{
makeContained = false;
}
}
else if (indirTree->OperGet() == GT_IND)
{
if (varTypeIsFloating(indirTree))
{
makeContained = false;
}
}
}
#endif
if (makeContained)
{
m_lsra->clearOperandCounts(addr);
addr->SetContained();
// The srcCount is decremented because addr is now "contained",
// then we account for the base and index below, if they are non-null.
info->srcCount--;
}
}
else if (comp->codeGen->genCreateAddrMode(addr, -1, true, 0, &rev, &base, &index, &mul, &cns, true /*nogen*/) &&
!(modifiedSources = AreSourcesPossiblyModifiedLocals(indirTree, base, index)))
{
// An addressing mode will be constructed that may cause some
// nodes to not need a register, and cause others' lifetimes to be extended
// to the GT_IND or even its parent if it's an assignment
assert(base != addr);
m_lsra->clearOperandCounts(addr);
addr->SetContained();
// Traverse the computation below GT_IND to find the operands
// for the addressing mode, marking the various constants and
// intermediate results as not consuming/producing.
// If the traversal were more complex, we might consider using
// a traversal function, but the addressing mode is only made
// up of simple arithmetic operators, and the code generator
// only traverses one leg of each node.
bool foundBase = (base == nullptr);
bool foundIndex = (index == nullptr);
GenTreePtr nextChild = nullptr;
for (GenTreePtr child = addr; child != nullptr && !child->OperIsLeaf(); child = nextChild)
{
nextChild = nullptr;
GenTreePtr op1 = child->gtOp.gtOp1;
GenTreePtr op2 = (child->OperIsBinary()) ? child->gtOp.gtOp2 : nullptr;
if (op1 == base)
{
foundBase = true;
}
else if (op1 == index)
{
foundIndex = true;
}
else
{
m_lsra->clearOperandCounts(op1);
op1->SetContained();
if (!op1->OperIsLeaf())
{
nextChild = op1;
}
}
if (op2 != nullptr)
{
if (op2 == base)
{
foundBase = true;
}
else if (op2 == index)
{
foundIndex = true;
}
else
{
m_lsra->clearOperandCounts(op2);
op2->SetContained();
if (!op2->OperIsLeaf())
{
assert(nextChild == nullptr);
nextChild = op2;
}
}
}
}
assert(foundBase && foundIndex);
info->srcCount--; // it gets incremented below.
}
else if (addr->gtOper == GT_ARR_ELEM)
{
// The GT_ARR_ELEM consumes all the indices and produces the offset.
// The array object lives until the mem access.
// We also consume the target register to which the address is
// computed
info->srcCount++;
assert(addr->gtLsraInfo.srcCount >= 2);
addr->gtLsraInfo.srcCount -= 1;
}
else
{
// it is nothing but a plain indir
info->srcCount--; // base gets added in below
base = addr;
}
if (!makeContained)
{
return;
}
if (base != nullptr)
{
info->srcCount++;
}
if (index != nullptr && !modifiedSources)
{
info->srcCount++;
}
// On ARM we may need a single internal register
// (when both conditions are true then we still only need a single internal register)
if ((index != nullptr) && (cns != 0))
{
// ARM does not support both Index and offset so we need an internal register
info->internalIntCount = 1;
}
else if (!emitter::emitIns_valid_imm_for_ldst_offset(cns, emitTypeSize(indirTree)))
{
// This offset can't be contained in the ldr/str instruction, so we need an internal register
info->internalIntCount = 1;
}
}
void CodeGen::genFloatArith (GenTreePtr tree,
RegSet::RegisterPreference *tgtPref)
{
var_types type = tree->TypeGet();
genTreeOps oper = tree->OperGet();
GenTreePtr op1 = tree->gtGetOp1();
GenTreePtr op2 = tree->gtGetOp2();
regNumber tgtReg;
unsigned varNum;
LclVarDsc * varDsc;
VARSET_TP varBit;
assert(oper == GT_ADD ||
oper == GT_SUB ||
oper == GT_MUL ||
oper == GT_DIV);
RegSet::RegisterPreference defaultPref(RBM_ALLFLOAT, RBM_NONE);
if (tgtPref == NULL)
{
tgtPref = &defaultPref;
}
// Is the op2 (RHS)more complex than op1 (LHS)?
//
if (tree->gtFlags & GTF_REVERSE_OPS)
{
regMaskTP bestRegs = regSet.rsNarrowHint(RBM_ALLFLOAT, ~op1->gtRsvdRegs);
RegSet::RegisterPreference pref(RBM_ALLFLOAT, bestRegs);
// Evaluate op2 into a floating point register
//
genCodeForTreeFloat(op2, &pref);
regSet.SetUsedRegFloat(op2, true);
// Evaluate op1 into any floating point register
//
genCodeForTreeFloat(op1);
regSet.SetUsedRegFloat(op1, true);
regNumber op1Reg = op1->gtRegNum;
regMaskTP op1Mask = genRegMaskFloat(op1Reg, type);
// Fix 388445 ARM JitStress WP7
regSet.rsLockUsedReg(op1Mask);
genRecoverReg(op2, RBM_ALLFLOAT, RegSet::KEEP_REG);
noway_assert(op2->gtFlags & GTF_REG_VAL);
regSet.rsUnlockUsedReg(op1Mask);
regSet.SetUsedRegFloat(op1, false);
regSet.SetUsedRegFloat(op2, false);
}
else
{
regMaskTP bestRegs = regSet.rsNarrowHint(RBM_ALLFLOAT, ~op2->gtRsvdRegs);
RegSet::RegisterPreference pref(RBM_ALLFLOAT, bestRegs);
// Evaluate op1 into a floating point register
//
genCodeForTreeFloat(op1, &pref);
regSet.SetUsedRegFloat(op1, true);
// Evaluate op2 into any floating point register
//
genCodeForTreeFloat(op2);
regSet.SetUsedRegFloat(op2, true);
regNumber op2Reg = op2->gtRegNum;
regMaskTP op2Mask = genRegMaskFloat(op2Reg, type);
// Fix 388445 ARM JitStress WP7
regSet.rsLockUsedReg(op2Mask);
genRecoverReg(op1, RBM_ALLFLOAT, RegSet::KEEP_REG);
noway_assert(op1->gtFlags & GTF_REG_VAL);
regSet.rsUnlockUsedReg(op2Mask);
regSet.SetUsedRegFloat(op2, false);
regSet.SetUsedRegFloat(op1, false);
}
tgtReg = regSet.PickRegFloat(type, tgtPref, true);
noway_assert(op1->gtFlags & GTF_REG_VAL);
noway_assert(op2->gtFlags & GTF_REG_VAL);
inst_RV_RV_RV(ins_MathOp(oper, type), tgtReg, op1->gtRegNum, op2->gtRegNum, emitActualTypeSize(type));
genCodeForTreeFloat_DONE(tree, tgtReg);
}
//------------------------------------------------------------------------
// LowerBlockStore: Set block store type
//
// Arguments:
// blkNode - The block store node of interest
//
// Return Value:
// None.
//
void Lowering::LowerBlockStore(GenTreeBlk* blkNode)
{
GenTree* dstAddr = blkNode->Addr();
unsigned size = blkNode->gtBlkSize;
GenTree* source = blkNode->Data();
Compiler* compiler = comp;
// Sources are dest address and initVal or source.
GenTreePtr srcAddrOrFill = nullptr;
bool isInitBlk = blkNode->OperIsInitBlkOp();
if (!isInitBlk)
{
// CopyObj or CopyBlk
if ((blkNode->OperGet() == GT_STORE_OBJ) && ((blkNode->AsObj()->gtGcPtrCount == 0) || blkNode->gtBlkOpGcUnsafe))
{
blkNode->SetOper(GT_STORE_BLK);
}
if (source->gtOper == GT_IND)
{
srcAddrOrFill = blkNode->Data()->gtGetOp1();
}
}
if (isInitBlk)
{
GenTreePtr initVal = source;
if (initVal->OperIsInitVal())
{
initVal->SetContained();
initVal = initVal->gtGetOp1();
}
srcAddrOrFill = initVal;
#ifdef _TARGET_ARM64_
if ((size != 0) && (size <= INITBLK_UNROLL_LIMIT) && initVal->IsCnsIntOrI())
{
// TODO-ARM-CQ: Currently we generate a helper call for every
// initblk we encounter. Later on we should implement loop unrolling
// code sequences to improve CQ.
// For reference see the code in LowerXArch.cpp.
NYI_ARM("initblk loop unrolling is currently not implemented.");
// The fill value of an initblk is interpreted to hold a
// value of (unsigned int8) however a constant of any size
// may practically reside on the evaluation stack. So extract
// the lower byte out of the initVal constant and replicate
// it to a larger constant whose size is sufficient to support
// the largest width store of the desired inline expansion.
ssize_t fill = initVal->gtIntCon.gtIconVal & 0xFF;
if (fill == 0)
{
MakeSrcContained(blkNode, source);
}
else if (size < REGSIZE_BYTES)
{
initVal->gtIntCon.gtIconVal = 0x01010101 * fill;
}
else
{
initVal->gtIntCon.gtIconVal = 0x0101010101010101LL * fill;
initVal->gtType = TYP_LONG;
}
blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindUnroll;
}
else
#endif // _TARGET_ARM64_
{
blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindHelper;
}
}
else
{
// CopyObj or CopyBlk
// Sources are src and dest and size if not constant.
if (blkNode->OperGet() == GT_STORE_OBJ)
{
// CopyObj
GenTreeObj* objNode = blkNode->AsObj();
unsigned slots = objNode->gtSlots;
#ifdef DEBUG
// CpObj must always have at least one GC-Pointer as a member.
assert(objNode->gtGcPtrCount > 0);
assert(dstAddr->gtType == TYP_BYREF || dstAddr->gtType == TYP_I_IMPL);
CORINFO_CLASS_HANDLE clsHnd = objNode->gtClass;
size_t classSize = compiler->info.compCompHnd->getClassSize(clsHnd);
size_t blkSize = roundUp(classSize, TARGET_POINTER_SIZE);
// Currently, the EE always round up a class data structure so
// we are not handling the case where we have a non multiple of pointer sized
// struct. This behavior may change in the future so in order to keeps things correct
// let's assert it just to be safe. Going forward we should simply
// handle this case.
assert(classSize == blkSize);
assert((blkSize / TARGET_POINTER_SIZE) == slots);
assert(objNode->HasGCPtr());
#endif
blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindUnroll;
}
else // CopyBlk
{
// In case of a CpBlk with a constant size and less than CPBLK_UNROLL_LIMIT size
// we should unroll the loop to improve CQ.
// For reference see the code in lowerxarch.cpp.
if ((size != 0) && (size <= INITBLK_UNROLL_LIMIT))
{
blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindUnroll;
}
else
{
// In case we have a constant integer this means we went beyond
// CPBLK_UNROLL_LIMIT bytes of size, still we should never have the case of
// any GC-Pointers in the src struct.
blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindHelper;
}
}
// CopyObj or CopyBlk
if (source->gtOper == GT_IND)
{
MakeSrcContained(blkNode, source);
}
else if (!source->IsMultiRegCall() && !source->OperIsSIMD())
{
assert(source->IsLocal());
MakeSrcContained(blkNode, source);
}
}
}
