BitMatrix<dim> subquotientMap
(const Subquotient<dim>& source,
const Subquotient<dim>& dest,
const BitMatrix<dim>& m)
{
assert(m.numColumns()==source.rank());
assert(m.numRows()==dest.rank());
BitMatrix<dim> result(dest.dimension(),0);
// restrict m to source.space()
for (RankFlags::iterator it=source.support().begin(); it(); ++it)
{
SmallBitVector v = m*source.space().basis(*it);
assert(v.size()==dest.rank());
/*
// go to canonical representative modulo destination subspace
dest.denominator().mod_reduce(v);
assert(v.size()==dest.rank());
// get coordinates in canonical basis
v.slice(dest.space().support()); // express |v| in basis of |d_space|
assert(v.size()==dest.space().dimension());
v.slice(dest.support());
*/
v=dest.toBasis(v);
assert(v.size()==dest.dimension()); // dimension of the subquotient
result.addColumn(v);
}
return result;
}
// evaluation giving rational number modulo 2
Rational TorusElement::evaluate_at (const SmallBitVector& alpha) const
{
assert(alpha.size()==rank());
arithmetic::Denom_t d = repr.denominator();
arithmetic::Numer_t s = 0;
for (auto it=alpha.data().begin(); it(); ++it)
s += repr.numerator()[*it];
return Rational(arithmetic::remainder(s,d+d),d);
}
static void
collectRefinements(const Specialization* spec, SmallBitVector wrt,
SpecializationTable::ConstSpecScheme scheme, std::vector<
const Specialization*>& result)
{
assert (spec != NULL);
if (Specialization::refinesExt(wrt, spec->args, scheme)) {
result.push_back(spec);
SmallBitVector wrt2 = wrt;
for (int lp = 0, rp = 0; (unsigned) lp < wrt.size(); lp++) {
if (!wrt[rp]) {
rp++;
continue;
}
if (spec->args[rp] != NULL) {
wrt2.set(rp);
}
}
for (std::vector<Specialization*>::const_iterator b =
spec->children.begin(), e = spec->children.end(); b != e; ++b) {
collectRefinements(*b, wrt2, scheme, result);
}
}
}
bool
AggressiveSpecPolicy::specializeOn(Function* F,
std::vector<PrevirtType>::const_iterator begin,
std::vector<PrevirtType>::const_iterator end, SmallBitVector& slice) const
{
bool specialize = false;
for (int i = 0; begin != end; ++begin, ++i) {
if (begin->isConcrete()) {
specialize = true;
slice.set(i);
}
}
return specialize;
}
bool
Specialization::refinesExt(const SmallBitVector &wrt, ConstSpecScheme l,
ConstSpecScheme r)
{
// wrt is the set of indicies included in r, e.g.
// wrt = [1,0,1,0,0] means:
// args 0,1,3 are NOT included in r
// args 2,3 are included in r
const int len = wrt.size();
for (int lp = 0, rp = 0; lp < len; lp++) {
if (wrt[lp]) {
if (r[rp] == NULL || l[lp] == r[rp])
rp++;
else
return false;
}
}
return true;
}
static LLT getTypeToPrint(const MachineInstr &MI, unsigned OpIdx,
SmallBitVector &PrintedTypes,
const MachineRegisterInfo &MRI) {
const MachineOperand &Op = MI.getOperand(OpIdx);
if (!Op.isReg())
return LLT{};
if (MI.isVariadic() || OpIdx >= MI.getNumExplicitOperands())
return MRI.getType(Op.getReg());
auto &OpInfo = MI.getDesc().OpInfo[OpIdx];
if (!OpInfo.isGenericType())
return MRI.getType(Op.getReg());
if (PrintedTypes[OpInfo.getGenericTypeIndex()])
return LLT{};
PrintedTypes.set(OpInfo.getGenericTypeIndex());
return MRI.getType(Op.getReg());
}
bool BlockState::isTrackingLocation(SmallBitVector &BV, unsigned i) {
return BV.test(i);
}
void BlockState::stopTrackingLocation(SmallBitVector &BV, unsigned i) {
BV.reset(i);
}
