const char *set_idp_options(const char *keyword,int value_type,const void *value)
{
ushort trans;
if ( keyword == NULL )
{
trans = macro11.XlatAsciiOutput != NULL;
if ( !AskUsingForm_c(form, &trans) ) return IDPOPT_OK;
}
else
{
if ( strcmp(keyword, "XlatAsciiOutput") == 0 )
{
if ( value_type != IDPOPT_STR ) return IDPOPT_BADTYPE;
memcpy(trans_dec_pc1, value, 256);
return IDPOPT_OK;
}
if ( strcmp(keyword, "PDP_XLAT_ASCII") != 0 ) return IDPOPT_BADKEY;
if ( value_type != IDPOPT_BIT ) return IDPOPT_BADTYPE;
trans = *(ushort*)value;
}
ovrtrans.altset(n_asciiX, !trans); // it is strange but it is like this
ash.XlatAsciiOutput = macro11.XlatAsciiOutput = trans ? trans_dec_pc1 : NULL;
msg("Character Translation is %s\n", trans ? "enabled" : "disabled");
return IDPOPT_OK;
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch ( msgid )
{
case processor_t::init:
helper.create("$ tms320c54");
{
char buf[MAXSTR];
if ( helper.supval(0, buf, sizeof(buf)) > 0 )
set_device_name(buf);
}
inf.mf = 1; // MSB first
break;
case processor_t::term:
free_ioports(ports, numports);
default:
break;
case processor_t::newfile: // new file loaded
{
{
SetDefaultRegisterValue(NULL, ARMS, 0);
SetDefaultRegisterValue(NULL, CPL, 1);
for (int i = DP; i <= rVds; i++)
SetDefaultRegisterValue(NULL, i, 0);
}
static const char informations[] =
{
"AUTOHIDE REGISTRY\n"
"Default values of flags and registers:\n"
"\n"
"ARMS bit = 0 (DSP mode operands).\n"
"CPL bit = 1 (SP direct addressing mode).\n"
"DP register = 0 (Data Page register)\n"
"DPH register = 0 (High part of EXTENDED Data Page Register)\n"
"PDP register = 0 (Peripheral Data Page register)\n"
"\n"
"You can change the register values by pressing Alt-G\n"
"(Edit, Segments, Change segment register value)\n"
};
info(informations);
break;
}
case processor_t::oldfile: // old file loaded
idpflags = (ushort)helper.altval(-1);
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(-1, idpflags);
helper.supset(0, device);
break;
case processor_t::newprc: // new processor type
{
ptype = ptypes[va_arg(va, int)];
switch ( ptype )
{
case TMS320C55:
break;
default:
error("interr: setprc");
break;
}
device[0] = '\0';
load_symbols();
}
break;
case processor_t::newasm: // new assembler type
break;
case processor_t::newseg: // new segment
break;
case processor_t::get_stkvar_scale_factor:
return 2;
}
va_end(va);
return 1;
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch ( msgid )
{
case processor_t::init:
// __emit__(0xCC); // debugger trap
helper.create("$ h8/500");
inf.mf = 1;
default:
break;
case processor_t::term:
free_syms();
break;
case processor_t::oldfile: // old file loaded
idpflags = ushort(helper.altval(-1) + 1);
create_segment_registers();
// no break
case processor_t::newfile: // new file loaded
load_symbols("h8500.cfg");
inf.mf = 1;
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(-1, idpflags - 1);
break;
case processor_t::newseg: // new segment
{
segment_t *sptr = va_arg(va, segment_t *);
sptr->defsr[BR-ph.regFirstSreg] = 0;
sptr->defsr[DP-ph.regFirstSreg] = 0;
}
break;
case processor_t::is_jump_func:
{
const func_t *pfn = va_arg(va, const func_t *);
ea_t *jump_target = va_arg(va, ea_t *);
return is_jump_func(pfn, jump_target);
}
case processor_t::is_sane_insn:
return is_sane_insn(va_arg(va, int));
case processor_t::may_be_func:
// can a function start here?
// arg: none, the instruction is in 'cmd'
// returns: probability 0..100
// 'cmd' structure is filled upon the entrace
// the idp module is allowed to modify 'cmd'
return may_be_func();
}
va_end(va);
return 1;
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch ( msgid )
{
case processor_t::init:
helper.create("$ tms320c3x");
inf.mf = 1; // MSB first
inf.wide_high_byte_first = 1;
init_analyzer();
break;
case processor_t::term:
free_ioports(ports, numports);
default:
break;
case processor_t::newfile: // new file loaded
inf.wide_high_byte_first = 0;
{
segment_t *s0 = get_first_seg();
if ( s0 != NULL )
{
set_segm_name(s0, "CODE");
segment_t *s1 = get_next_seg(s0->startEA);
for (int i = dp; i <= rVds; i++)
{
SetDefaultRegisterValue(s0, i, BADSEL);
SetDefaultRegisterValue(s1, i, BADSEL);
}
}
}
select_device(IORESP_ALL);
break;
case processor_t::oldfile: // old file loaded
inf.wide_high_byte_first = 0;
idpflags = (ushort)helper.altval(-1);
{
char buf[MAXSTR];
if ( helper.supval(-1, buf, sizeof(buf)) > 0 )
set_device_name(buf, IORESP_NONE);
}
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(-1, idpflags);
break;
case processor_t::is_basic_block_end:
return is_basic_block_end() ? 2 : 0;
}
va_end(va);
return 1;
}
// The kernel event notifications
// Here you may take desired actions upon some kernel events
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behavior processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch ( msgid ) {
case processor_t::init:
// this processor is big endian
inf.mf = 1;
default:
break;
case processor_t::term:
free_ioports(ports, numports);
break;
case processor_t::newfile:
if ( choose_ioport_device(cfgname, device, sizeof(device), NULL) )
set_device_name(device, IORESP_ALL);
// default configuration
if ( refresh_idpflags() == 0 ) {
idpflags = 0;
idpflags |= NETNODE_USE_INSN_SYNTHETIC;
idpflags |= NETNODE_USE_REG_ALIASES;
}
// patch register names according to idpflags
patch_regnames();
break;
case processor_t::newprc:
ptype = processor_subtype_t(va_arg(va, int));
// msg("ptype = %s\n", ptype == prc_m32r ? "m32r" : ptype == prc_m32rx ? "m32rx" : "???");
break;
case processor_t::oldfile:
refresh_idpflags();
{
char buf[MAXSTR];
if ( helper.supval(-1, buf, sizeof(buf)) > 0 )
set_device_name(buf, IORESP_NONE);
}
// patch register names according to idpflags
patch_regnames();
break;
case processor_t::savebase:
case processor_t::closebase:
// synchronize the database long variable with the current configuration settings
#ifdef DEBUG
msg("Saving configuration: synthetic insn %s, aliases registers %s\n",
use_synthetic_insn() ? "true " : "false",
use_reg_aliases() ? "true" : "false"
);
#endif
helper.altset(-1, idpflags);
helper.supset(-1, device);
break;
}
va_end(va);
return(1);
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch(msgid)
{
case processor_t::init:
helper.create("$ pic");
helper.supval(0, device, sizeof(device));
default:
break;
case processor_t::term:
free_mappings();
free_ioports(ports, numports);
break;
case processor_t::newfile: // new file loaded
{
segment_t *s0 = get_first_seg();
if ( s0 != NULL )
{
set_segm_name(s0, "CODE");
dataseg = AdditionalSegment(0x200, 0, "DATA");
segment_t *s1 = get_next_seg(s0->startEA);
SetDefaultRegisterValue(s0, BANK, 0);
SetDefaultRegisterValue(s1, BANK, 0);
SetDefaultRegisterValue(s0, PCLATH, 0);
SetDefaultRegisterValue(s1, PCLATH, 0);
SetDefaultRegisterValue(s0, PCLATU, 0);
SetDefaultRegisterValue(s1, PCLATU, 0);
setup_device(IORESP_INT);
apply_symbols();
}
}
break;
case processor_t::oldfile: // old file loaded
idpflags = (ushort)helper.altval(-1);
dataseg = helper.altval(0);
create_mappings();
for ( segment_t *s=get_first_seg(); s != NULL; s=get_next_seg(s->startEA) )
{
if ( s->defsr[PCLATH-ph.regFirstSreg] == BADSEL )
s->defsr[PCLATH-ph.regFirstSreg] = 0;
}
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(0, dataseg);
helper.altset(-1, idpflags);
helper.supset(0, device);
break;
case processor_t::newprc: // new processor type
{
int n = va_arg(va, int);
static bool set = false;
if ( set )
return 0;
set = true;
if ( ptypes[n] != ptype )
{
ptype = ptypes[n];
ph.cnbits = 12 + 2*n;
}
switch ( ptype )
{
case PIC12:
register_names[PCLATH] = "status";
cfgname = "pic12.cfg";
break;
case PIC14:
cfgname = "pic14.cfg";
break;
case PIC16:
register_names[BANK] = "bsr";
cfgname = "pic16.cfg";
idpflags = 0;
ph.cnbits = 8;
ph.regLastSreg = PCLATU;
break;
default:
error("interr in setprc");
break;
}
}
break;
case processor_t::newasm: // new assembler type
break;
case processor_t::newseg: // new segment
break;
}
va_end(va);
return 1;
}
// The kernel event notifications
// Here you may take desired actions upon some kernel events
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behavior processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch ( msgid ) {
case processor_t::init:
// this processor is big endian
inf.mf = 1;
refresh_idpflags();
{
char buf[MAXSTR];
if ( helper.supval(-1, buf, sizeof(buf)) > 0 )
set_device_name(buf, IORESP_ALL);
}
break;
case processor_t::term:
free_reg_names();
default:
break;
case processor_t::newfile:
// default configuration
idpflags = CONF_GR_DEC;
// patch general registers names
patch_general_registers(true);
break;
case processor_t::newseg:
{
segment_t *s = va_arg(va, segment_t *);
// set RW/RP segment registers initial values
s->defsr[rRW-ph.regFirstSreg] = 0;
s->defsr[rRP-ph.regFirstSreg] = BADSEL;
}
break;
case processor_t::oldfile:
patch_general_registers();
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(-1, idpflags);
helper.supset(-1, device);
break;
}
va_end(va);
return(1);
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch(msgid)
{
case processor_t::init:
// __emit__(0xCC); // debugger trap
helper.create("$ f2mc");
{
char buf[MAXSTR];
if ( helper.supval(0, buf, sizeof(buf)) > 0 )
f2mc_set_device_name(buf, IORESP_NONE);
}
inf.wide_high_byte_first = 1;
break;
case processor_t::term:
free_ioports(ports, numports);
default:
break;
case processor_t::newfile: // new file loaded
set_segm_name(get_first_seg(), "CODE");
if ( choose_ioport_device(cfgname, device, sizeof(device), parse_area_line0) )
f2mc_set_device_name(device, IORESP_ALL);
for ( int i = DTB; i <= rVds; i++ )
{
for ( segment_t *s=get_first_seg(); s != NULL; s=get_next_seg(s->startEA) )
SetDefaultRegisterValue(s, i, 0);
}
break;
case processor_t::oldfile: // old file loaded
idpflags = (ushort)helper.altval(-1);
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(-1, idpflags);
break;
case processor_t::newprc: // new processor type
{
ptype = ptypes[va_arg(va, int)];
switch ( ptype )
{
case F2MC16L:
cfgname = "f2mc16l.cfg";
break;
case F2MC16LX:
cfgname = "f2mc16lx.cfg";
break;
default:
error("interr: setprc");
break;
}
device[0] = '\0';
if ( get_first_seg() != NULL )
choose_device(NULL, 0);
}
break;
case processor_t::newasm: // new assembler type
break;
case processor_t::newseg: // new segment
break;
}
va_end(va);
return 1;
}
//--------------------------------------------------------------------------
const char *set_idp_options(const char *keyword,int value_type,const void *value)
{
static char form[] =
"HELP\n"
"HP PA-RISC specific options Ü\n"
" ßßßßßßßßßßßßßßßßßßßßßßßßßßßß\n"
"\n"
" Simplify instructions\n"
"\n"
" If this option is on, IDA will simplify instructions and replace\n"
" them by clearer pseudo-instructions\n"
" For example,\n"
"\n"
" or 0, 0, 0\n"
"\n"
" will be replaced by\n"
"\n"
" nop\n"
"\n"
" PSW bit W is on\n"
"\n"
" If this option is on, IDA will disassemble instructions as if\n"
" PSW W bit is on, i.e. addresses are treated as 64bit. In fact,\n"
" IDA still will truncate them to 32 bit, but this option changes\n"
" disassembly of load/store instructions.\n"
"\n"
" Use mnemonic register names\n"
"\n"
" If checked, IDA will use mnemonic names of the registers:\n"
" %r26: %arg0\n"
" %r25: %arg1\n"
" %r24: %arg2\n"
" %r23: %arg3\n"
" %r28: %ret0\n"
"\n"
"\n"
"ENDHELP\n"
"HPPA specific options\n"
"\n"
" <~S~implify instructions:C>\n"
" <PSW bit W is on (for 64-bit):C>\n"
" <Use ~m~nemonic register names:C>>\n"
"\n"
"\n";
if ( keyword == NULL )
{
AskUsingForm_c(form, &idpflags);
OK:
helper.altset(-1, idpflags);
handle_new_flags();
return IDPOPT_OK;
}
else
{
if ( value_type != IDPOPT_BIT ) return IDPOPT_BADTYPE;
if ( strcmp(keyword, "HPPA_SIMPLIFY") == 0 )
{
setflag(idpflags, IDP_SIMPLIFY, *(int*)value);
goto OK;
}
if ( strcmp(keyword, "HPPA_MNEMONIC") == 0 )
{
setflag(idpflags, IDP_MNEMONIC, *(int*)value);
goto OK;
}
if ( strcmp(keyword, "HPPA_PSW_W") == 0 )
{
setflag(idpflags,IDP_PSW_W,*(int*)value);
goto OK;
}
return IDPOPT_BADKEY;
}
}
//----------------------------------------------------------------------
static int idaapi nec850_notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code )
return code;
switch(msgid)
{
case processor_t::init:
inf.mf = 0;
prog_pointers.create("$ prog pointers");
break;
case processor_t::is_sane_insn:
{
int no_crefs = va_arg(va, int);
return nec850_is_sane_insn(no_crefs);
}
case processor_t::newprc:
{
int procnum = va_arg(va, int);
is_v850e = procnum == 0;
break;
}
case processor_t::term:
break;
// save database
case processor_t::closebase:
case processor_t::savebase:
prog_pointers.altset(GP_EA_IDX, g_gp_ea);
break;
// old file loaded
case processor_t::oldfile:
g_gp_ea = prog_pointers.altval(GP_EA_IDX);
break;
case processor_t::newseg:
{
segment_t *s = va_arg(va, segment_t *);
// Set default value of DS register for all segments
set_default_dataseg(s->sel);
}
// A segment is moved
//case processor_t::move_segm:
// // Fix processor dependent address sensitive information
// // args: ea_t from - old segment address
// // segment_t - moved segment
// {
// ea_t from = va_arg(va, ea_t);
// segment_t *s = va_arg(va, segment_t *);
// // adjust gp_ea
// }
// break;
default:
break;
}
va_end(va);
return 1;
}
//----------------------------------------------------------------------
int upgrade_db_format(int ver, netnode constnode)
{
if(askyn_c(1, "AUTOHIDE REGISTRY\nHIDECANCEL\n"
"The database has an old java data format.\n"
"Do you want to upgrade it?") <= 0) qexit(1);
switch ( ver ) {
default:
INTERNAL("upgrade::ver");
case IDP_JDK12:
break;
}
// change format: jdk-version
if ( curClass.MinVers > 0x8000u ) {
badbase:
return(0);
}
curClass.MajVers = JDK_MIN_MAJOR;
if ( curClass.MinVers >= 0x8000 ) {
curClass.MinVers &= ~0;
++curClass.MajVers;
curClass.JDKsubver = 2;
} else if ( curClass.MinVers >= JDK_1_1_MINOR ) ++curClass.JDKsubver;
// change format: This
#ifdef __BORLANDC__
#if offsetof(ClassInfo, This.Ref) != offsetof(ClassInfo, This.Name) || \
offsetof(ClassInfo, This.Dscr) != offsetof(ClassInfo, This.Name) + 2
#error
#endif
#endif
curClass.This.Ref = (curClass.This.Ref << 16) | curClass.This.Dscr;
if ( !curClass.This.Name ) goto badbase;
// change format: Super
#ifdef __BORLANDC__
#if offsetof(ClassInfo, super.Ref) != offsetof(ClassInfo, super.Name) || \
offsetof(ClassInfo, super.Dscr) != offsetof(ClassInfo, super.Name) + 2
#error
#endif
#endif
switch ( curClass.super.Name ) {
case 0: // absent
curClass.super.Ref &= 0;
break;
case 0xFFFF: // bad index
++curClass.super.Name;
break;
default: // reverse order
curClass.super.Ref = (curClass.super.Ref << 16) | curClass.super.Dscr;
break;
}
// validate: impNode
if ( curClass.impNode && !netnode(curClass.impNode).altval(0) ) goto badbase;
// change variable 'errload' in previous version
if ( curClass.maxSMsize ) {
curClass.extflg |= XFL_C_ERRLOAD;
curClass.maxSMsize &= 0;
}
// set segments type type for special segments
segment_t *S;
if ( (S = getseg(curClass.startEA)) == NULL ) goto badbase;
S->set_hidden_segtype(true);
S->update();
if ( curClass.xtrnCnt ) {
if ( (S = getseg(curClass.xtrnEA)) == NULL ) goto badbase;
S->set_hidden_segtype(true);
S->update();
}
curClass.extflg |= XFL_C_DONE; // do not repeat datalabel destroyer :)
// change: method/fields format
#define SGEXPSZ (sizeof(SegInfo) - offsetof(SegInfo, varNode))
#define FMEXPSZ (sizeof(_FMid_) - offsetof(_FMid_, _UNUSED_ALING))
#define FLEXPSZ (sizeof(FieldInfo) - offsetof(FieldInfo, annNodes))
uval_t oldsize = sizeof(SegInfo) - FMEXPSZ - SGEXPSZ;
for(int pos=-(int)curClass.MethodCnt; pos<=(int)curClass.FieldCnt; pos++) {
union {
SegInfo s;
FieldInfo f;
_FMid_ id;
uchar _space[qmax(sizeof(SegInfo), sizeof(FieldInfo)) + 1];
}u;
if ( !pos ) { // class node
oldsize += (sizeof(FieldInfo) - FLEXPSZ) - (sizeof(SegInfo) - SGEXPSZ);
continue;
}
if ( ClassNode.supval(pos, &u, sizeof(u)) != oldsize ) goto badbase;
memmove((uchar *)&u.id + sizeof(u.id), &u.id._UNUSED_ALING,
(size_t)oldsize - offsetof(_FMid_, _UNUSED_ALING));
u.id._UNUSED_ALING = 0;
u.id.utsign = 0;
if ( u.id.extflg & ~EFL__MASK ) goto badbase;
u.id.extflg &= (EFL_NAMETYPE);
if ( pos > 0 ) { // fields
memset(&u.f.annNodes, 0, sizeof(u.f)-offsetof(FieldInfo, annNodes));
ClassNode.supset(pos, &u.f, sizeof(u.f));
continue;
}
// segments
memset(&u.s.varNode, 0, sizeof(u.s) - offsetof(SegInfo, varNode));
if ( u.s.thrNode && !netnode(u.s.thrNode).altval(0) ) {
netnode(u.s.thrNode).kill(); // empty node (old format)
u.s.thrNode = 0;
}
// have locvars?
if ( u.s.DataSize ) {
if ( (S = getseg(u.s.DataBase)) == NULL ) goto badbase;
S->type = SEG_BSS;
S->set_hidden_segtype(true);
S->update();
}
// change: Exception format
if ( u.s.excNode ) {
register ushort i, j;
netnode enode(u.s.excNode);
if ( (j = (ushort)enode.altval(0)) == 0 ) goto badbase;
ea_t ea = u.s.startEA + u.s.CodeSize;
i = 1;
do {
Exception exc;
if ( enode.supval(i, &exc, sizeof(exc)) != sizeof(exc) ) goto badbase;
#ifdef __BORLANDC__
#if offsetof(Exception, filter.Ref) != offsetof(Exception, filter.Name) || \
offsetof(Exception, filter.Dscr) != offsetof(Exception, filter.Name) + 2
#error
#endif
#endif
if ( !exc.filter.Name != !exc.filter.Dscr ) goto badbase;
exc.filter.Ref = (exc.filter.Ref << 16) | exc.filter.Dscr; // was reverse order
if ( exc.filter.Name == 0xFFFF ) ++exc.filter.Name;
enode.supset(i, &exc, sizeof(exc));
set_exception_xref(&u.s, exc, ea);
}while ( ++i <= j );
}
ClassNode.supset(pos, &u.s, sizeof(u.s));
//rename local variables (for references)
if ( u.s.DataSize ) {
int i = u.s.DataSize;
ea_t ea = u.s.DataBase + i;
do {
char str[MAXNAMELEN];
qsnprintf(str, sizeof(str), "met%03u_slot%03u", u.s.id.Number, --i);
--ea;
if ( do_name_anyway(ea, str)) make_name_auto(ea );
else hide_name(ea);
}while ( i );
coagulate_unused_data(&u.s);
}
} // for
//change format of string presentation in constant pool
for(int pos = 0; (ushort)pos <= curClass.maxCPindex; pos++) {
ConstOpis co;
if ( constnode.supval(pos, &co, sizeof(co)) != sizeof(co) ) goto badbase;
switch ( co.type ) {
default:
continue;
case CONSTANT_Unicode:
error("Base contain CONSTANT_Unicode, but it is removed from "
"the standard in 1996 year and never normal loaded in IDA");
case CONSTANT_Utf8:
break;
}
uint32 v, n, i = pos << 16;
if( ((n = (uint32)constnode.altval(i)) & UPG12_BADMASK)
|| (v = n & ~UPG12_CLRMASK) == 0) goto badbase;
if ( n & UPG12_EXTMASK ) v |= UPG12_EXTSET;
if ( (n = (ushort)v) != 0 ) {
register uchar *po = (uchar*)append_tmp_buffer(v);
n *= sizeof(ushort);
uint32 pos = 0;
do {
uint32 sz = n - pos;
if ( sz > MAXSPECSIZE ) sz = MAXSPECSIZE;
if ( constnode.supval(++i, &po[pos], sz) != sz ) goto badbase;
constnode.supdel(i);
pos += sz;
}while ( pos < n );
constnode.setblob(po, n, i & ~0xFFFF, BLOB_TAG);
if ( !(v & UPG12_EXTSET) ) do {
#ifdef __BORLANDC__
#if ( sizeof(ushort) % 2) || (MAXSPECSIZE % 2 )
#error
#endif
#endif
ushort cw = *(ushort *)&po[pos];
if ( cw >= CHP_MAX ) {
if ( !javaIdent(cw) ) goto extchar;
} else if ( (uchar)cw <= CHP_MIN ) {
extchar:
v |= UPG12_EXTSET;
break;
}
}while ( (pos -= sizeof(ushort)) != 0 );
v = upgrade_ResW(v);
}
constnode.altset(i, v);
co._Sopstr = v; // my be not needed? (next also)
constnode.supset(pos, &co, sizeof(co));
}
// rename 'import' variables for refernces
for(unsigned ip = 1; (ushort)ip <= curClass.xtrnCnt; ip++) {
ConstOpis co;
{
register unsigned j;
if( (j = (unsigned)XtrnNode.altval(ip)) == 0
|| !LoadOpis((ushort)j, 0, &co)) goto badbase;
}
switch ( co.type ) {
default:
goto badbase;
case CONSTANT_Class:
if ( !(co.flag & HAS_CLSNAME) ) continue;
break;
case CONSTANT_InterfaceMethodref:
case CONSTANT_Methodref:
if ( (co.flag & NORM_METOD) != NORM_METOD ) continue;
break;
case CONSTANT_Fieldref:
if ( (co.flag & NORM_FIELD) != NORM_FIELD ) continue;
break;
}
make_new_name(co._name, co._subnam, co.type != CONSTANT_Class, ip);
}
if ( curClass.This.Dscr )
make_new_name(curClass.This.Name, 0, (uchar)-1, (unsigned)curClass.startEA);
return(_TO_VERSION);
}
