unsigned BitLevelInfo::getBitWidth(unsigned R) const {
unsigned Size = 0;
for (MachineRegisterInfo::def_iterator I = MRI->def_begin(R),
E = MRI->def_end(); I != E; ++I) {
unsigned S = VInstrInfo::getBitWidthOrZero(I.getOperand());
if (S == 0) { // Get the bit width from source operand.
assert(I->isCopy() && "Can not get register bit width!");
S = getBitWidth(I->getOperand(1).getReg());
}
Size = std::max(Size, S);
}
return Size;
}
void LiveRangeCalc::createDeadDefs(LiveInterval *LI, unsigned Reg) {
assert(MRI && Indexes && "call reset() first");
// Visit all def operands. If the same instruction has multiple defs of Reg,
// LI->createDeadDef() will deduplicate.
for (MachineRegisterInfo::def_iterator
I = MRI->def_begin(Reg), E = MRI->def_end(); I != E; ++I) {
const MachineInstr *MI = &*I;
// Find the corresponding slot index.
SlotIndex Idx;
if (MI->isPHI())
// PHI defs begin at the basic block start index.
Idx = Indexes->getMBBStartIdx(MI->getParent());
else
// Instructions are either normal 'r', or early clobber 'e'.
Idx = Indexes->getInstructionIndex(MI)
.getRegSlot(I.getOperand().isEarlyClobber());
// Create the def in LI. This may find an existing def.
LI->createDeadDef(Idx, *Alloc);
}
}
