static void dc_callvm_argFloat_mips_o32(DCCallVM* in_self, DCfloat x)
{
DCCallVM_mips_o32* self = (DCCallVM_mips_o32*)in_self;
dcVecAppend(&self->mVecHead, &x, sizeof(DCfloat) );
if (self->mArgCount < 2) {
#if defined(DC__Endian_LITTLE)
self->mRegData.u[self->mArgCount].f[0] = x;
#else
self->mRegData.u[self->mArgCount].f[1] = x;
#endif
#if 0
self->mRegData.u[self->mArgCount].f[1] = x;
call kernel
mips:
lwc1 $f12, 4($5) <--- byte offset 4
lwc1 $f13, 0($5)
lwc1 $f14, 12($5) <--- byte offset 12
lwc1 $f15, 8($5)
mipsel:
lwc1 $f12, 0($5) <--- byte offset 4
lwc1 $f13, 4($5)
lwc1 $f14, 8($5) <--- byte offset 12
lwc1 $f15, 12($5)
#if defined(DC__Endian_LITTLE)
/* index 0 and 2 */
self->mRegData.floats[self->mArgCount*2] = x;
#else
/* index 1 and 3 */
self->mRegData.floats[self->mArgCount*2+1] = x;
#endif
#endif
}
/*
* set envelope period and shape,
*
* EP = R12 * 256 + R11
*
* T = (256 * EP) / fc
* = (256 * EP) / 1.787725 [MHz]
* = 143.03493 * EP [micro second]
*
* shape is 4 bit and corresponds to:
*
* -------------------------------------------------
* R13 | x x x x | B3 | B2 | B1 | B0 |
* -------------------------------------------------
* |
* ------------------------------------+
* |
* V
* ---------------------------------------------------------
* | | :\ |
* | 0 0 x x | __: \______________________ |
* | | |
* | | /: |
* | 0 1 x x | __/ :______________________ |
* | | |
* | | :\ :\ :\ :\ :\ :\ :\ |
* | 1 0 0 0 | __: \: \: \: \: \: \:_ |
* | | |
* | | :\ |
* | 1 0 0 1 | __: \______________________ |
* | | |
* | | :\ / \ / \ / \ |
* | 1 0 1 0 | __: \ / \ / \ / |
* | | _____________________ |
* | | :\ : |
* | 1 0 1 1 | __: \: |
* | | |
* | | /: /: /: /: /: /: |
* | 1 1 0 0 | __/ :/ :/ :/ :/ :/ :/ |
* | | ______________________ |
* | | / |
* | 1 1 0 1 | __/ |
* | | |
* | | / \ / \ / \ |
* | 1 1 1 0 | __/ \ / \ / \ / |
* | | |
* | | /: |
* | 1 1 1 1 | __/ :______________________ |
* | | |
* ---------------------------------------------------------
* | |
* +---+
* T
*
*/
void psg_set_envelope(unsigned int period, byte shape)
{
period;
shape;
__asm
ld l,4(ix)
ld h,5(ix)
ld b,6(ix)
ld c,psg_set
ld a,#11
out (c),a
inc c
out (c),l
dec c
inc a
out (c),a
inc c
out (c),h
dec c
inc a
out (c),a
inc c
out (c),b
__endasm;
}
asm void
bsp_flash_init( void )
{
extern uint32_t _internal_ram_end;
enum { BIUCR = 0xC3F8801Cul };
nofralloc
mflr r7 /**< no stack available here */
lis r5, __set_value@h /**< __set_value fcall - source */
ori r5, r5, __set_value@l
/**< __set_value fcall - dest */
lis r6, _internal_ram_end@h
ori r6, r6, (_internal_ram_end-sizeof(__set_value))@l
/**< unrolled copy */
lwz r4, 0(r5) /**< __set_value[0] */
stw r4, 0(r6)
lwz r4, 4(r5) /**< __set_value[1] */
stw r4, 4(r6)
lwz r4, 8(r5) /**< __set_value[2] */
stw r4, 8(r6)
lwz r4, 12(r5) /**< __set_value[3] */
stw r4, 12(r6)
lis r4, BIUCR@h /**< BIUCR (base) */
ori r4, r4, BIUCR@l /* */
lis r3, 0x0001 /**< 82MHz operation, I+D prefetch*/
ori r3, r3, 0x6B55 /* enabled */
xor r5, r5, r5 /**< BIUCR+0=BIUCR */
mtlr r6 /**< addr of __set_value() */
blrl
lis r3, (3<<14) /**< 3 buf inst, 1 buf data */
li r5, 8 /**< BIUCR+8=BIUCR2 */
mtlr r6 /**< addr of __set_value() */
blrl
xor r3, r3, r3 /**< NO prefetching on Bank1 */
li r5, 12 /**< BIUCR+12=PFCR3 */
mtlr r6 /**< addr of __set_value() */
blrl
mtlr r7
blr
}
void outp(char p, char c)
{
__asm
ld c, 4(ix) ; port
ld a, 5(ix) ; value
out (c), a
__endasm;
}
void outp(char p, char c)
{
ASM
ld c, 4(ix) ; port
ld a, 5(ix) ; value
out (c), a
ENDASM;
}
u8 GetKeyMatrixLine(u8 n)
{
n;
__asm
ld a,4(ix)
call SNSMAT
ld l,a
__endasm;
}
char Joystick(char n)
{
n;
__asm
ld a,4(ix)
call GTSTCK
ld l,a
__endasm;
}
char Joytrig(char n)
{
n;
__asm
ld a,4(ix)
call GTTRIG
ld h,#0x00
ld l,a
__endasm;
}
// ************************************************
// * Plot black pixel *
// * *
// * x: pixel coord - bounds 0 to 255 *
// * y: pixel coord - bounds 0 tp 191 *
// * *
// ************************************************
void ezPlot(unsigned char x, unsigned char y)
{
x;
y;
_asm
ld hl,(#23563)
ld bc, #4
add hl,bc
ld d,4(ix)
ld c, #8
add hl,bc
ld e,5(ix)
ld a,#0xaf
sub e
ret c
ld e,a
and a
rra
scf
rra
and a
rra
xor e
and #0xf8
xor e
ld h,a
ld a,d
rlca
rlca
rlca
xor e
and #0xc7
xor e
rlca
rlca
ld l,a
ld a,d
and #7
ld b,a
inc b
ld a,#0xfe
loopidge: rrca
djnz loopidge
ld b,#0xff
xor b
ld b,a
ld a,(hl)
or b
ld (hl),a
//ret
_endasm;
}
void SetScreenColor(u8 text, u8 back, u8 border)
{
text; back; border;
__asm
ld a,4(ix)
ld (FORCLR),a
ld a,5(ix)
ld (BAKCLR),a
ld a,6(ix)
ld (BDRCLR),a
call CHGCLR
__endasm;
}
void psg_set_noise(byte period)
{
period;
__asm
ld b,4(ix)
ld c,psg_set
ld a,#6
out (c),a
inc c
out (c),b
__endasm;
}
char cksum_up (char *buf, char len) {
// pointer should be in 4(ix) and 5(ix), length in 6(ix)
cksum_value = 0;
_asm
ld l, 4(ix)
ld h, 5(ix)
ld b, 6(ix)
ld c, #_cksum_accum
otir
in a, (_cksum_value)
ld l, a
_endasm;
}
static void dc_callvm_argFloat_mips_o32(DCCallVM* in_self, DCfloat x)
{
DCCallVM_mips_o32* self = (DCCallVM_mips_o32*)in_self;
dcVecAppend(&self->mVecHead, &x, sizeof(DCfloat));
#if defined(DC__ABI_HARDFLOAT)
if (self->mArgCount < 2) {
/* @@@ unsure if we should zero init, here; seems to work as-is */
# if defined(DC__Endian_LITTLE)
self->mRegData.u[self->mArgCount].f[0] = x;
# else
self->mRegData.u[self->mArgCount].f[1] = x; // floats in regs always right justified
# endif
# if 0
self->mRegData.u[self->mArgCount].f[1] = x;
call kernel
mips:
lwc1 $f12, 4($5) <--- byte offset 4
lwc1 $f13, 0($5)
lwc1 $f14, 12($5) <--- byte offset 12
lwc1 $f15, 8($5)
mipsel:
lwc1 $f12, 0($5) <--- byte offset 4
lwc1 $f13, 4($5)
lwc1 $f14, 8($5) <--- byte offset 12
lwc1 $f15, 12($5)
# if defined(DC__Endian_LITTLE)
/* index 0 and 2 */
self->mRegData.floats[self->mArgCount*2] = x;
# else
/* index 1 and 3 */
self->mRegData.floats[self->mArgCount*2+1] = x;
# endif
# endif
}
void psg_set_vol(byte chan, byte vol)
{
chan;
vol;
__asm
ld a,4(ix)
ld b,5(ix)
ld c,psg_set
add a,#8
out (c),a
inc c
out (c),b
__endasm;
}
asm void asm_exception_handler(void)
{
loop: bra loop
#if 0
link a6,#0
lea -20(sp), sp
movem.l d0-d2/a0-a1, (sp)
pea 24(sp) /* push exception frame address */
jsr mcf_exception_handler
movem.l 4(sp), d0-d2/a0-a1
lea 24(sp), sp
unlk a6
rte
#endif
}
char cksum_dn (char *buf, char len) {
// pointer should be in 4(ix) and 5(ix), length in 6(ix)
cksum_value = 0;
//buf += BUF_SIZE-1;
_asm
ld de, #127
ld l, 4(ix)
ld h, 5(ix)
add hl, de
ld b, 6(ix)
ld c, #_cksum_accum
otdr
in a, (_cksum_value)
ld l, a
_endasm;
}
// Files
void LoadToVRAM(const char* filename, u16 x, u16 y)
{
filename; x; y;
//subRom.SX = (u16)filename;
//subRom.SY = 0;
//subRom.DX = x;
//subRom.DY = y;
//subRom.NX = 0;
//subRom.NY = 0;
//subRom.CLR = 0;
//subRom.ARG = 0;
//subRom.CMD = 0;
#define EXTROM #0x015F
#define BLTVD #0x019D
#define SX #0xF562 // X-coordinate of the source
#define SY #0xF564 // Y-coordinate of the source
#define DX #0xF566 // X-coordinate of the destination
#define DY #0xF568 // Y-coordinate of the destination
#define NX #0xF56A // number of dots in the X direction
#define NY #0xF56C // number of dots in the Y direction
#define CDUMMY #0xF56E // dummy (not required to be set)
#define ARG #0xF56F // selects the direction and expansion RAM (same as VDP R#45)
#define LOGOP #0xF570 // logical operation code (same as the logical operation code of VDP)
__asm
;// Init data
ld l,4(ix)
ld h,5(ix)
ld (SX), hl
ld l,6(ix)
ld h,7(ix)
ld (DX), hl
ld l,8(ix)
ld h,9(ix)
ld (DY), hl
xor a
ld (ARG), a ;// ARG doit toujours être mis à zéro !!!
ld (LOGOP), a ;// Idem LOGOP
;// Call BLTVD function
di
ld hl, #0xF562
ld ix, BLTVD
call EXTROM
ei
__endasm;
}
void psg_set_all(struct ay_reg_map *regs)
{
regs;
__asm
ld l,4(ix)
ld h,5(ix)
ld c,psg_set
xor a
psg_loop:
out (c),a
inc c
outi
dec c
inc a
cp #13
jr nz, psg_loop
__endasm;
}
char cksum_up_sn (char *buf, char len) {
// pointer should be in 4(ix) and 5(ix), length in 6(ix)
cksum_value = 0;
_asm
ld l, 4(ix)
ld h, 5(ix)
ld b, 6(ix)
ld c, #_cksum_accum
ld a, #0
cksum_up_sn_loop:
outi
cp b
jp nz, cksum_up_sn_loop
in a, (_cksum_value)
ld l, a
_endasm;
}
/* bits 6,7 must be left unchanged
* as wrong values might break some
* hardware
*/
void psg_set_mixer(byte mixval)
{
mixval;
__asm
ld h,4(ix)
ld a,h
and #0x3F
ld h,a
ld c,psg_set
ld a,#7
out (c),a
inc c
inc c
in a,(c)
or h
dec c
out (c),a
__endasm;
}
void trdosWriteSectors(unsigned char *src, unsigned char trck, unsigned char sec, unsigned char num)
{ src; trck; sec; num;
__asm
ld hl,#6 ;+6 (num)
add hl,sp
ld b,(hl)
dec hl ; + 5 (sector)
ld e,(hl)
dec hl ; + 4 (track)
ld d,(hl)
dec hl ; + 3
ld a,(hl)
dec hl ; + 2 (destination)
ld h,(hl)
ld l,a
ld c,#6
di
call #0x3d13
ei
__endasm;
}
void psg_set_tone(unsigned int period, byte chan)
{
period;
chan;
__asm
ld l,4(ix)
ld h,5(ix)
ld c,psg_set
ld a,6(ix)
sla a
ld b,a
out (c),a
inc c
out (c),l
dec c
ld a,b
inc a
out (c),a
inc c
out (c),h
__endasm;
}
lea 24(sp),a0 /* A0 point to exception stack frame on the stack */
jsr mcf_exception_handler
movem.l (sp), d0-d2/a0-a1
lea 20(sp), sp
unlk a6
rte
}
#else
asm void asm_exception_handler(void)
{
link a6,#0
lea -20(sp), sp
movem.l d0-d2/a0-a1, (sp)
pea 24(sp) /* push exception frame address */
jsr mcf_exception_handler
movem.l 4(sp), d0-d2/a0-a1
lea 24(sp), sp
unlk a6
rte
}
#endif
typedef void (* vectorTableEntryType)(void);
#pragma define_section vectortable ".vectortable" far_absolute R
/* CF have 255 vector + SP_INIT in the vector table (256 entries)
*/
__declspec(vectortable) vectorTableEntryType _vect[256] = { /* Interrupt vector table */
(vectorTableEntryType)__SP_AFTER_RESET, /* 0 (0x000) Initial supervisor SP */
_startup, /* 1 (0x004) Initial PC */
void ezPrintChar(unsigned char ch, unsigned char x, unsigned char y)
{
ch;
x;
y;
_asm
jp vlaa
mult:
ld hl,#0
ld a,b
or a
ret z
ld d,#0
ld e,c
clappa:
add hl,de
djnz clappa
ret
vlaa:
ld b, #8
ld c, 4(ix)//char
call mult
ld b, h
ld c, l
ld hl, #0x3c00
add hl,bc
ld d,h
ld e,l
// Work out first byte 40, 48, 50
ld a, 6(ix)
and #24
ld b, #64 //Never changes form #64
add a,b
ld h,a
// **** first byte in h ***
// Third nybble
ld a, 6(ix)
and #7
add a,a
ld b,a
ld a, 5(ix)
//and #16
rrc a
rrc a
rrc a
rrc a
add a,b
rlc a
rlc a
rlc a
rlc a
ld b,a
// answer in b
// Fourth nybble
ld a,5(ix)
and #15
// answer in a
or b
// second byte in a
ld l,a
// *** second byte in l ***
ld b, #8
loop:
ld a, (de)
ld (hl),a
inc h
inc de
djnz loop
_endasm;
}
blr
}
// -----------------------------------------------------------------------
// This function handles IRQ's for the P6502 by jumping to the address
// at 0xFFFE.
asm void N6502::_IRQ()
{
lbz r5,_F(r3)
andi. r7,r5,I_FLAG
bnelr
// save regs
stw r24,-4(SP)
stw r25,-8(SP)
stw r27,-12(SP)
lwz r8,_MEM_X(r3)
lbz r6,_SP(r3) // setup regs for _PUSHB macro
lwz r27,RAMSeg1_Ind(r8)
addi r25,r6,0x100
lhz r24,_PC(r3)
li r9,D_FLAG
srwi r7,r24,8 // push pc,flags
li r8,B_FLAG
_pushb (r7)
not r8,r8
not r9,r9
addi $sp, $sp, 4\n\
beq $t8, $zero, label%d\n",q);
}
void transHL(FILE *f)
{
fprintf(f,"\
move $sp, $s7\n\
li $v0, 10\n\
syscall\n");
}
void transST(FILE *f)
{
fprintf(f,"\
lw $t8, 4($sp)\n\
lw $t9, 0($sp)\n\
sw $t9, 0($t8)\n\
addi $sp, $sp, 8\n");
}
void transENTER(FILE *f)
{
fprintf(f,"\
addi $sp, $sp, -12\n\
sw $ra, 0($sp)\n\
addi $sp, $sp, 12\n");
}
void transCALL(FILE *f, WORD p, WORD q)
{
void AsmCall( void ) {
asm ("
// pop off the destination instruction
lwz r12,0(r4) // RG_TOP, 0(RG_OPSTACK)
addi r4,r4,-4 // RG_OPSTACK, RG_OPSTACK, -4
// see if it is a system trap
cmpwi r12,0 // RG_TOP, 0
bc 12,0, systemTrap
// calling another VM function, so lookup in instructionPointers
slwi r12,r12,2 // RG_TOP,RG_TOP,2
// FIXME: range check
lwzx r12, r8, r12 // RG_TOP, RG_INSTRUCTIONS(RG_TOP)
mtctr r12 // RG_TOP
");
#if defined(MACOS_X) && defined(__OPTIMIZE__)
// On Mac OS X, gcc doesn't push a frame when we are optimized, so trying to tear it down results in grave disorder.
#warning Mac OS X optimization on, not popping GCC AsmCall frame
#else
// Mac OS X Server and unoptimized compiles include a GCC AsmCall frame
asm ("
lwz r1,0(r1) // pop off the GCC AsmCall frame
lmw r30,-8(r1)
");
#endif
asm ("
bcctr 20,0 // when it hits a leave, it will branch to the current link register
// calling a system trap
systemTrap:
// convert to positive system call number
subfic r12,r12,-1
// save all our registers, including the current link register
mflr r13 // RG_SECOND // copy off our link register
addi r1,r1,-92 // required 24 byets of linkage, 32 bytes of parameter, plus our saves
stw r3,56(r1) // RG_STACK, -36(REAL_STACK)
stw r4,60(r1) // RG_OPSTACK, 4(RG_REAL_STACK)
stw r5,64(r1) // RG_MEMBASE, 8(RG_REAL_STACK)
stw r6,68(r1) // RG_MEMMASK, 12(RG_REAL_STACK)
stw r7,72(r1) // RG_ASMCALL, 16(RG_REAL_STACK)
stw r8,76(r1) // RG_INSTRUCTIONS, 20(RG_REAL_STACK)
stw r9,80(r1) // RG_NUM_INSTRUCTIONS, 24(RG_REAL_STACK)
stw r10,84(r1) // RG_VM, 28(RG_REAL_STACK)
stw r13,88(r1) // RG_SECOND, 32(RG_REAL_STACK) // link register
// save the vm stack position to allow recursive VM entry
addi r13,r3,-4 // RG_TOP, RG_STACK, -4
stw r13,0(r10) //RG_TOP, VM_OFFSET_PROGRAM_STACK(RG_VM)
// save the system call number as the 0th parameter
add r3,r3,r5 // r3, RG_STACK, RG_MEMBASE // r3 is the first parameter to vm->systemCalls
stwu r12,4(r3) // RG_TOP, 4(r3)
// make the system call with the address of all the VM parms as a parameter
// vm->systemCalls( &parms )
lwz r12,4(r10) // RG_TOP, VM_OFFSET_SYSTEM_CALL(RG_VM)
mtctr r12 // RG_TOP
bcctrl 20,0
mr r12,r3 // RG_TOP, r3
// pop our saved registers
lwz r3,56(r1) // RG_STACK, 0(RG_REAL_STACK)
lwz r4,60(r1) // RG_OPSTACK, 4(RG_REAL_STACK)
lwz r5,64(r1) // RG_MEMBASE, 8(RG_REAL_STACK)
lwz r6,68(r1) // RG_MEMMASK, 12(RG_REAL_STACK)
lwz r7,72(r1) // RG_ASMCALL, 16(RG_REAL_STACK)
lwz r8,76(r1) // RG_INSTRUCTIONS, 20(RG_REAL_STACK)
lwz r9,80(r1) // RG_NUM_INSTRUCTIONS, 24(RG_REAL_STACK)
lwz r10,84(r1) // RG_VM, 28(RG_REAL_STACK)
lwz r13,88(r1) // RG_SECOND, 32(RG_REAL_STACK)
addi r1,r1,92 // RG_REAL_STACK, RG_REAL_STACK, 36
// restore the old link register
mtlr r13 // RG_SECOND
// save off the return value
stwu r12,4(r4) // RG_TOP, 0(RG_OPSTACK)
// GCC adds its own prolog / epliog code
" );
}
else
return ULONG_MAX;
}
else if (t1.hi < t2.hi)
return 0;
else
return ULONG_MAX;
}
#if TARGET_CPU_PPC
/* Sample the timebase register */
static asm void GetClock(register timetype *t)
{
mftb r7, 268
stw r7, 4(t)
mftb r7, 269
stw r7, 0(t)
blr
}
#else
static void GetClock(register timetype *t)
{
Microseconds( t );
}
#endif
/*
lea 24(sp),a0 /* A0 point to exception stack frame on the stack */
jsr mcf_exception_handler
movem.l (sp), d0-d2/a0-a1
lea 20(sp), sp
unlk a6
rte
}
#else
asm void asm_exception_handler(void)
{
link a6,#0
lea -20(sp), sp
movem.l d0-d2/a0-a1, (sp)
pea 24(sp) /* push exception frame address */
jsr mcf_exception_handler
movem.l 4(sp), d0-d2/a0-a1
lea 24(sp), sp
unlk a6
rte
}
#endif
typedef void (* vectorTableEntryType)(void);
#if CONSOLE_IO_SUPPORT
vectorTableEntryType vector_printf @Vtrap14 = TrapHandler_printf;
#endif
/*
* MCF51QE family vector table
* CF V1 has 102 vector + SP_INIT in the vector table (103 entries)
},
{ 2, "_TRUNC\n",
" movd (sp)+,r0\n\
cvtdl r0,r0\n"
},
{ 1, "_ACTFILE\n",
" movl (sp)+,r1\n\
movl 12(r1),r0\n"
},
{ 2, "_FCALL\n",
" movl (sp)+,r5\n\
movl (sp),r0\n\
movc3 4(r0),__disply+8,(r5)\n\
movl (sp)+,r0\n\
movc3 4(r0),8(r0),__disply+8\n"
},
{ 2, "_FRTN\n",
" movl (sp)+,r0\n\
movl (sp)+,r5\n\
movc3 4(r0),(r5),__disply+8\n"
},
{ 3, "_FSAV\n",
" movl (sp)+,r3\n\
movl (sp)+,r4\n\
movl (sp),r5\n\
movl r3,(r5)\n\
