static void
AcpiTbConvertFadt1 (
FADT_DESCRIPTOR_REV2 *LocalFadt,
FADT_DESCRIPTOR_REV1 *OriginalFadt)
{
/* ACPI 1.0 FACS */
/* The BIOS stored FADT should agree with Revision 1.0 */
/*
* Copy the table header and the common part of the tables.
*
* The 2.0 table is an extension of the 1.0 table, so the entire 1.0
* table can be copied first, then expand some fields to 64 bits.
*/
ACPI_MEMCPY (LocalFadt, OriginalFadt, sizeof (FADT_DESCRIPTOR_REV1));
/* Convert table pointers to 64-bit fields */
ACPI_STORE_ADDRESS (LocalFadt->XFirmwareCtrl, LocalFadt->V1_FirmwareCtrl);
ACPI_STORE_ADDRESS (LocalFadt->XDsdt, LocalFadt->V1_Dsdt);
/*
* System Interrupt Model isn't used in ACPI 2.0 (LocalFadt->Reserved1 = 0;)
*/
/*
* This field is set by the OEM to convey the preferred power management
* profile to OSPM. It doesn't have any 1.0 equivalence. Since we don't
* know what kind of 32-bit system this is, we will use "unspecified".
*/
LocalFadt->Prefer_PM_Profile = PM_UNSPECIFIED;
/*
* Processor Performance State Control. This is the value OSPM writes to
* the SMI_CMD register to assume processor performance state control
* responsibility. There isn't any equivalence in 1.0, leave it zeroed.
*/
LocalFadt->PstateCnt = 0;
/*
* Support for the _CST object and C States change notification.
* This data item hasn't any 1.0 equivalence so leave it zero.
*/
LocalFadt->CstCnt = 0;
/*
* Since there isn't any equivalence in 1.0 and since it highly likely
* that a 1.0 system has legacy support.
*/
LocalFadt->IapcBootArch = BAF_LEGACY_DEVICES;
/*
* Convert the V1.0 block addresses to V2.0 GAS structures
*/
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1aEvtBlk, LocalFadt->Pm1EvtLen, LocalFadt->V1_Pm1aEvtBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1bEvtBlk, LocalFadt->Pm1EvtLen, LocalFadt->V1_Pm1bEvtBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1aCntBlk, LocalFadt->Pm1CntLen, LocalFadt->V1_Pm1aCntBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1bCntBlk, LocalFadt->Pm1CntLen, LocalFadt->V1_Pm1bCntBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm2CntBlk, LocalFadt->Pm2CntLen, LocalFadt->V1_Pm2CntBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPmTmrBlk, LocalFadt->PmTmLen, LocalFadt->V1_PmTmrBlk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XGpe0Blk, 0, LocalFadt->V1_Gpe0Blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XGpe1Blk, 0, LocalFadt->V1_Gpe1Blk);
}
static void
AcpiTbConvertFadt2 (
FADT_DESCRIPTOR_REV2 *LocalFadt,
FADT_DESCRIPTOR_REV2 *OriginalFadt)
{
/* We have an ACPI 2.0 FADT but we must copy it to our local buffer */
ACPI_MEMCPY (LocalFadt, OriginalFadt, sizeof (FADT_DESCRIPTOR_REV2));
/*
* "X" fields are optional extensions to the original V1.0 fields, so
* we must selectively expand V1.0 fields if the corresponding X field
* is zero.
*/
if (!(ACPI_GET_ADDRESS (LocalFadt->XFirmwareCtrl)))
{
ACPI_STORE_ADDRESS (LocalFadt->XFirmwareCtrl, LocalFadt->V1_FirmwareCtrl);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XDsdt)))
{
ACPI_STORE_ADDRESS (LocalFadt->XDsdt, LocalFadt->V1_Dsdt);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPm1aEvtBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1aEvtBlk,
LocalFadt->Pm1EvtLen, LocalFadt->V1_Pm1aEvtBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPm1bEvtBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1bEvtBlk,
LocalFadt->Pm1EvtLen, LocalFadt->V1_Pm1bEvtBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPm1aCntBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1aCntBlk,
LocalFadt->Pm1CntLen, LocalFadt->V1_Pm1aCntBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPm1bCntBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm1bCntBlk,
LocalFadt->Pm1CntLen, LocalFadt->V1_Pm1bCntBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPm2CntBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPm2CntBlk,
LocalFadt->Pm2CntLen, LocalFadt->V1_Pm2CntBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XPmTmrBlk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XPmTmrBlk,
LocalFadt->PmTmLen, LocalFadt->V1_PmTmrBlk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XGpe0Blk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XGpe0Blk,
0, LocalFadt->V1_Gpe0Blk);
}
if (!(ACPI_GET_ADDRESS (LocalFadt->XGpe1Blk.Address)))
{
ASL_BUILD_GAS_FROM_V1_ENTRY (LocalFadt->XGpe1Blk,
0, LocalFadt->V1_Gpe1Blk);
}
}
acpi_status
acpi_tb_convert_table_fadt (void)
{
#ifdef _IA64
fadt_descriptor_rev071 *FADT71;
u8 pm1_address_space;
u8 pm2_address_space;
u8 pm_timer_address_space;
u8 gpe0address_space;
u8 gpe1_address_space;
#else
fadt_descriptor_rev1 *FADT1;
#endif
fadt_descriptor_rev2 *FADT2;
acpi_table_desc *table_desc;
FUNCTION_TRACE ("Tb_convert_table_fadt");
/* Acpi_gbl_FADT is valid */
/* Allocate and zero the 2.0 buffer */
FADT2 = ACPI_MEM_CALLOCATE (sizeof (fadt_descriptor_rev2));
if (FADT2 == NULL) {
return_ACPI_STATUS (AE_NO_MEMORY);
}
/* The ACPI FADT revision number is FADT2_REVISION_ID=3 */
/* So, if the current table revision is less than 3 it is type 1.0 or 0.71 */
if (acpi_gbl_FADT->header.revision >= FADT2_REVISION_ID) {
/* We have an ACPI 2.0 FADT but we must copy it to our local buffer */
*FADT2 = *((fadt_descriptor_rev2*) acpi_gbl_FADT);
}
else {
#ifdef _IA64
/*
* For the 64-bit case only, a revision ID less than V2.0 means the
* tables are the 0.71 extensions
*/
/* The BIOS stored FADT should agree with Revision 0.71 */
FADT71 = (fadt_descriptor_rev071 *) acpi_gbl_FADT;
/* Copy the table header*/
FADT2->header = FADT71->header;
/* Copy the common fields */
FADT2->sci_int = FADT71->sci_int;
FADT2->acpi_enable = FADT71->acpi_enable;
FADT2->acpi_disable = FADT71->acpi_disable;
FADT2->S4bios_req = FADT71->S4bios_req;
FADT2->plvl2_lat = FADT71->plvl2_lat;
FADT2->plvl3_lat = FADT71->plvl3_lat;
FADT2->day_alrm = FADT71->day_alrm;
FADT2->mon_alrm = FADT71->mon_alrm;
FADT2->century = FADT71->century;
FADT2->gpe1_base = FADT71->gpe1_base;
/*
* We still use the block length registers even though
* the GAS structure should obsolete them. This is because
* these registers are byte lengths versus the GAS which
* contains a bit width
*/
FADT2->pm1_evt_len = FADT71->pm1_evt_len;
FADT2->pm1_cnt_len = FADT71->pm1_cnt_len;
FADT2->pm2_cnt_len = FADT71->pm2_cnt_len;
FADT2->pm_tm_len = FADT71->pm_tm_len;
FADT2->gpe0blk_len = FADT71->gpe0blk_len;
FADT2->gpe1_blk_len = FADT71->gpe1_blk_len;
FADT2->gpe1_base = FADT71->gpe1_base;
/* Copy the existing 0.71 flags to 2.0. The other bits are zero.*/
FADT2->wb_invd = FADT71->flush_cash;
FADT2->proc_c1 = FADT71->proc_c1;
FADT2->plvl2_up = FADT71->plvl2_up;
FADT2->pwr_button = FADT71->pwr_button;
FADT2->sleep_button = FADT71->sleep_button;
FADT2->fixed_rTC = FADT71->fixed_rTC;
FADT2->rtcs4 = FADT71->rtcs4;
FADT2->tmr_val_ext = FADT71->tmr_val_ext;
FADT2->dock_cap = FADT71->dock_cap;
/* We should not use these next two addresses */
/* Since our buffer is pre-zeroed nothing to do for */
/* the next three data items in the structure */
/* FADT2->Firmware_ctrl = 0; */
/* FADT2->Dsdt = 0; */
/* System Interrupt Model isn't used in ACPI 2.0*/
/* FADT2->Reserved1 = 0; */
/* This field is set by the OEM to convey the preferred */
/* power management profile to OSPM. It doesn't have any*/
/* 0.71 equivalence. Since we don't know what kind of */
/* 64-bit system this is, we will pick unspecified. */
FADT2->prefer_PM_profile = PM_UNSPECIFIED;
/* Port address of SMI command port */
/* We shouldn't use this port because IA64 doesn't */
/* have or use SMI. It has PMI. */
FADT2->smi_cmd = (u32)(FADT71->smi_cmd & 0xFFFFFFFF);
/* processor performance state control*/
/* The value OSPM writes to the SMI_CMD register to assume */
/* processor performance state control responsibility. */
/* There isn't any equivalence in 0.71 */
/* Again this should be meaningless for IA64 */
/* FADT2->Pstate_cnt = 0; */
/* The 32-bit Power management and GPE registers are */
/* not valid in IA-64 and we are not going to use them */
/* so leaving them pre-zeroed. */
/* Support for the _CST object and C States change notification.*/
/* This data item hasn't any 0.71 equivalence so leaving it zero.*/
/* FADT2->Cst_cnt = 0; */
/* number of flush strides that need to be read */
/* No 0.71 equivalence. Leave pre-zeroed. */
/* FADT2->Flush_size = 0; */
/* Processor's memory cache line width, in bytes */
/* No 0.71 equivalence. Leave pre-zeroed. */
/* FADT2->Flush_stride = 0; */
/* Processor's duty cycle index in processor's P_CNT reg*/
/* No 0.71 equivalence. Leave pre-zeroed. */
/* FADT2->Duty_offset = 0; */
/* Processor's duty cycle value bit width in P_CNT register.*/
/* No 0.71 equivalence. Leave pre-zeroed. */
/* FADT2->Duty_width = 0; */
/* Since there isn't any equivalence in 0.71 */
/* and since Big_sur had to support legacy */
FADT2->iapc_boot_arch = BAF_LEGACY_DEVICES;
/* Copy to ACPI 2.0 64-BIT Extended Addresses */
FADT2->Xfirmware_ctrl = FADT71->firmware_ctrl;
FADT2->Xdsdt = FADT71->dsdt;
/* Extract the address space IDs */
pm1_address_space = (u8)((FADT71->address_space & PM1_BLK_ADDRESS_SPACE) >> 1);
pm2_address_space = (u8)((FADT71->address_space & PM2_CNT_BLK_ADDRESS_SPACE) >> 2);
pm_timer_address_space = (u8)((FADT71->address_space & PM_TMR_BLK_ADDRESS_SPACE) >> 3);
gpe0address_space = (u8)((FADT71->address_space & GPE0_BLK_ADDRESS_SPACE) >> 4);
gpe1_address_space = (u8)((FADT71->address_space & GPE1_BLK_ADDRESS_SPACE) >> 5);
/*
* Convert the 0.71 (non-GAS style) Block addresses to V2.0 GAS structures,
* in this order:
*
* PM 1_a Events
* PM 1_b Events
* PM 1_a Control
* PM 1_b Control
* PM 2 Control
* PM Timer Control
* GPE Block 0
* GPE Block 1
*/
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm1a_evt_blk, FADT71->pm1_evt_len, FADT71->pm1a_evt_blk, pm1_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm1b_evt_blk, FADT71->pm1_evt_len, FADT71->pm1b_evt_blk, pm1_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm1a_cnt_blk, FADT71->pm1_cnt_len, FADT71->pm1a_cnt_blk, pm1_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm1b_cnt_blk, FADT71->pm1_cnt_len, FADT71->pm1b_cnt_blk, pm1_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm2_cnt_blk, FADT71->pm2_cnt_len, FADT71->pm2_cnt_blk, pm2_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xpm_tmr_blk, FADT71->pm_tm_len, FADT71->pm_tmr_blk, pm_timer_address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xgpe0blk, FADT71->gpe0blk_len, FADT71->gpe0blk, gpe0address_space);
ASL_BUILD_GAS_FROM_ENTRY (FADT2->Xgpe1_blk, FADT71->gpe1_blk_len, FADT71->gpe1_blk, gpe1_address_space);
#else
/* ACPI 1.0 FACS */
/* The BIOS stored FADT should agree with Revision 1.0 */
FADT1 = (fadt_descriptor_rev1*) acpi_gbl_FADT;
/*
* Copy the table header and the common part of the tables
* The 2.0 table is an extension of the 1.0 table, so the
* entire 1.0 table can be copied first, then expand some
* fields to 64 bits.
*/
MEMCPY (FADT2, FADT1, sizeof (fadt_descriptor_rev1));
/* Convert table pointers to 64-bit fields */
ACPI_STORE_ADDRESS (FADT2->Xfirmware_ctrl, FADT1->firmware_ctrl);
ACPI_STORE_ADDRESS (FADT2->Xdsdt, FADT1->dsdt);
/* System Interrupt Model isn't used in ACPI 2.0*/
/* FADT2->Reserved1 = 0; */
/* This field is set by the OEM to convey the preferred */
/* power management profile to OSPM. It doesn't have any*/
/* 1.0 equivalence. Since we don't know what kind of */
/* 32-bit system this is, we will pick unspecified. */
FADT2->prefer_PM_profile = PM_UNSPECIFIED;
/* Processor Performance State Control. This is the value */
/* OSPM writes to the SMI_CMD register to assume processor */
/* performance state control responsibility. There isn't */
/* any equivalence in 1.0. So leave it zeroed. */
FADT2->pstate_cnt = 0;
/* Support for the _CST object and C States change notification.*/
/* This data item hasn't any 1.0 equivalence so leaving it zero.*/
FADT2->cst_cnt = 0;
/* Since there isn't any equivalence in 1.0 and since it */
/* is highly likely that a 1.0 system has legacy support. */
FADT2->iapc_boot_arch = BAF_LEGACY_DEVICES;
/*
* Convert the V1.0 Block addresses to V2.0 GAS structures
* in this order:
*
* PM 1_a Events
* PM 1_b Events
* PM 1_a Control
* PM 1_b Control
* PM 2 Control
* PM Timer Control
* GPE Block 0
* GPE Block 1
*/
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm1a_evt_blk, FADT1->pm1_evt_len, FADT1->pm1a_evt_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm1b_evt_blk, FADT1->pm1_evt_len, FADT1->pm1b_evt_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm1a_cnt_blk, FADT1->pm1_cnt_len, FADT1->pm1a_cnt_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm1b_cnt_blk, FADT1->pm1_cnt_len, FADT1->pm1b_cnt_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm2_cnt_blk, FADT1->pm2_cnt_len, FADT1->pm2_cnt_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xpm_tmr_blk, FADT1->pm_tm_len, FADT1->pm_tmr_blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xgpe0blk, FADT1->gpe0blk_len, FADT1->gpe0blk);
ASL_BUILD_GAS_FROM_V1_ENTRY (FADT2->Xgpe1_blk, FADT1->gpe1_blk_len, FADT1->gpe1_blk);
#endif
}
/*
* Global FADT pointer will point to the common V2.0 FADT
*/
acpi_gbl_FADT = FADT2;
acpi_gbl_FADT->header.length = sizeof (FADT_DESCRIPTOR);
/* Free the original table */
table_desc = &acpi_gbl_acpi_tables[ACPI_TABLE_FADT];
acpi_tb_delete_single_table (table_desc);
/* Install the new table */
table_desc->pointer = (acpi_table_header *) acpi_gbl_FADT;
table_desc->base_pointer = acpi_gbl_FADT;
table_desc->allocation = ACPI_MEM_ALLOCATED;
table_desc->length = sizeof (fadt_descriptor_rev2);
/* Dump the entire FADT */
ACPI_DEBUG_PRINT ((ACPI_DB_TABLES,
"Hex dump of common internal FADT, size %d (%X)\n",
acpi_gbl_FADT->header.length, acpi_gbl_FADT->header.length));
DUMP_BUFFER ((u8 *) (acpi_gbl_FADT), acpi_gbl_FADT->header.length);
return_ACPI_STATUS (AE_OK);
}
