void sound_emulate_start(void) {
#ifdef Z80_EMULATED
YM2610_sh_start();
YM2610_sh_reset();
AY8910_reset();
#endif
}
void AY8910_sh_reset(void)
{
int i;
for (i = 0;i < num + ym_num;i++)
AY8910_reset(i);
}
static void AY8910_Write(BYTE nDevice, BYTE nReg, BYTE nValue, BYTE nAYDevice)
{
g_bMB_RegAccessedFlag = true;
SY6522_AY8910* pMB = &g_MB[nDevice];
if((nValue & 4) == 0)
{
// RESET: Reset AY8910 only
AY8910_reset(nDevice+2*nAYDevice);
}
else
{
// Determine the AY8910 inputs
int nBDIR = (nValue & 2) ? 1 : 0;
const int nBC2 = 1; // Hardwired to +5V
int nBC1 = nValue & 1;
int nAYFunc = (nBDIR<<2) | (nBC2<<1) | nBC1;
enum {AY_NOP0, AY_NOP1, AY_INACTIVE, AY_READ, AY_NOP4, AY_NOP5, AY_WRITE, AY_LATCH};
switch(nAYFunc)
{
case AY_INACTIVE: // 4: INACTIVE
break;
case AY_READ: // 5: READ FROM PSG (need to set DDRA to input)
break;
case AY_WRITE: // 6: WRITE TO PSG
_AYWriteReg(nDevice+2*nAYDevice, pMB->nAYCurrentRegister, pMB->sy6522.ORA);
break;
case AY_LATCH: // 7: LATCH ADDRESS
// http://www.worldofspectrum.org/forums/showthread.php?t=23327
// Selecting an unused register number above 0x0f puts the AY into a state where
// any values written to the data/address bus are ignored, but can be read back
// within a few tens of thousands of cycles before they decay to zero.
if(pMB->sy6522.ORA <= 0x0F)
pMB->nAYCurrentRegister = pMB->sy6522.ORA & 0x0F;
// else Pro-Mockingboard (clone from HK)
break;
}
}
}
static void AY8910_Write(BYTE nDevice, BYTE nReg, BYTE nValue, BYTE nAYDevice)
{
SY6522_AY8910* pMB = &g_MB[nDevice];
if((nValue & 4) == 0)
{
// RESET: Reset AY8910 only
AY8910_reset(nDevice+2*nAYDevice);
}
else
{
// Determine the AY8910 inputs
int nBDIR = (nValue & 2) ? 1 : 0;
const int nBC2 = 1; // Hardwired to +5V
int nBC1 = nValue & 1;
int nAYFunc = (nBDIR<<2) | (nBC2<<1) | nBC1;
enum {AY_NOP0, AY_NOP1, AY_INACTIVE, AY_READ, AY_NOP4, AY_NOP5, AY_WRITE, AY_LATCH};
switch(nAYFunc)
{
case AY_INACTIVE: // 4: INACTIVE
break;
case AY_READ: // 5: READ FROM PSG (need to set DDRA to input)
break;
case AY_WRITE: // 6: WRITE TO PSG
_AYWriteReg(nDevice+2*nAYDevice, pMB->nAYCurrentRegister, pMB->sy6522.ORA);
break;
case AY_LATCH: // 7: LATCH ADDRESS
if(pMB->sy6522.ORA <= 0x0F)
pMB->nAYCurrentRegister = pMB->sy6522.ORA & 0x0F;
// else Pro-Mockingboard (clone from HK)
break;
}
}
}
static int
AY8910_init(int gcclock, int sample_rate,
mem_read_handler portAread,
mem_read_handler portBread,
mem_write_handler portAwrite, mem_write_handler portBwrite)
{
struct AY8910 *PSG = &AYPSG;
memset(PSG, 0, sizeof(struct AY8910));
PSG->SampleRate = sample_rate;
PSG->PortAread = portAread;
PSG->PortBread = portBread;
PSG->PortAwrite = portAwrite;
PSG->PortBwrite = portBwrite;
PSG->Channel = stream_init_multi(3, 0, AY8910Update);
if (PSG->Channel == -1)
return 1;
AY8910_set_clock(gcclock);
AY8910_reset();
return 0;
}
