/**Function*************************************************************
Synopsis [Transform the netlist into a logic network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkToLogic( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pFanin;
int i, k;
// consider the case of the AIG
if ( Abc_NtkIsStrash(pNtk) )
return Abc_NtkAigToLogicSop( pNtk );
assert( Abc_NtkIsNetlist(pNtk) );
// consider simple case when there is hierarchy
// assert( pNtk->pDesign == NULL );
assert( Abc_NtkWhiteboxNum(pNtk) == 0 );
assert( Abc_NtkBlackboxNum(pNtk) == 0 );
// start the network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, pNtk->ntkFunc );
// duplicate the nodes
Abc_NtkForEachNode( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj, 0);
// reconnect the internal nodes in the new network
Abc_NtkForEachNode( pNtk, pObj, i )
Abc_ObjForEachFanin( pObj, pFanin, k )
Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pFanin)->pCopy );
// collect the CO nodes
Abc_NtkFinalize( pNtk, pNtkNew );
// fix the problem with CO pointing directly to CIs
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkToLogic( pNtk->pExdc );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkToLogic(): Network check has failed.\n" );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Creates the mapped network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFromMapSuperChoice( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
{
extern Abc_Ntk_t * Abc_NtkMulti( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax, int fCnf, int fMulti, int fSimple, int fFactor );
ProgressBar * pProgress;
Abc_Ntk_t * pNtkNew, * pNtkNew2;
Abc_Obj_t * pNode;
int i;
// save the pointer to the mapped nodes
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pNext = pNode->pCopy;
Abc_NtkForEachPo( pNtk, pNode, i )
pNode->pNext = pNode->pCopy;
Abc_NtkForEachNode( pNtk, pNode, i )
pNode->pNext = pNode->pCopy;
// duplicate the network
pNtkNew2 = Abc_NtkDup( pNtk );
pNtkNew = Abc_NtkMulti( pNtkNew2, 0, 20, 0, 0, 1, 0 );
if ( !Abc_NtkBddToSop( pNtkNew, -1, ABC_INFINITY ) )
{
printf( "Abc_NtkFromMapSuperChoice(): Converting to SOPs has failed.\n" );
return NULL;
}
// set the old network to point to the new network
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pCopy = pNode->pCopy->pCopy;
Abc_NtkForEachPo( pNtk, pNode, i )
pNode->pCopy = pNode->pCopy->pCopy;
Abc_NtkForEachNode( pNtk, pNode, i )
pNode->pCopy = pNode->pCopy->pCopy;
Abc_NtkDelete( pNtkNew2 );
// set the pointers from the mapper to the new nodes
Abc_NtkForEachCi( pNtk, pNode, i )
{
Map_NodeSetData( Map_ManReadInputs(pMan)[i], 0, (char *)Abc_NtkCreateNodeInv(pNtkNew,pNode->pCopy) );
Map_NodeSetData( Map_ManReadInputs(pMan)[i], 1, (char *)pNode->pCopy );
}
/**Function*************************************************************
Synopsis [Transforms the sequential AIG to take fanout sharing into account.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Seq_NtkShareFanouts( Abc_Ntk_t * pNtk )
{
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj;
int i;
vNodes = Vec_PtrAlloc( 10 );
// share the PI latches
Abc_NtkForEachPi( pNtk, pObj, i )
Seq_NodeShareFanouts( pObj, vNodes );
// share the node latches
Abc_NtkForEachNode( pNtk, pObj, i )
Seq_NodeShareFanouts( pObj, vNodes );
Vec_PtrFree( vNodes );
}
/**Function*************************************************************
Synopsis [Converts the network from the AIG manager into ABC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Man_t * Abc_NtkToMini( Abc_Ntk_t * pNtk )
{
Hop_Man_t * pMan;
Abc_Obj_t * pObj;
int i;
// create the manager
pMan = Hop_ManStart();
// transfer the pointers to the basic nodes
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Hop_ManConst1(pMan);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Hop_ObjCreatePi(pMan);
// perform the conversion of the internal nodes (assumes DFS ordering)
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Hop_And( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj), (Hop_Obj_t *)Abc_ObjChild1Copy(pObj) );
// create the POs
Abc_NtkForEachCo( pNtk, pObj, i )
Hop_ObjCreatePo( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj) );
Hop_ManCleanup( pMan );
return pMan;
}
Mini_Aig_t * Abc_NtkToMiniAig( Abc_Ntk_t * pNtk )
{
Mini_Aig_t * p;
Abc_Obj_t * pObj;
int i;
assert( Abc_NtkIsStrash(pNtk) );
// create the manager
p = Mini_AigStart();
// create mapping from MiniAIG into ABC objects
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->iTemp = Mini_AigLitConst1();
// create primary inputs
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->iTemp = Mini_AigCreatePi(p);
// create internal nodes
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->iTemp = Mini_AigAnd( p, Abc_NodeFanin0Copy2(pObj), Abc_NodeFanin1Copy2(pObj) );
// create primary outputs
Abc_NtkForEachCo( pNtk, pObj, i )
pObj->iTemp = Mini_AigCreatePo( p, Abc_NodeFanin0Copy2(pObj) );
// set registers
Mini_AigSetRegNum( p, Abc_NtkLatchNum(pNtk) );
return p;
}
