Abc_Ntk_t * Abc_NtkDarUnfold2( Abc_Ntk_t * pNtk, int nFrames, int nConfs, int nProps, int fStruct, int fOldAlgo, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Aig_Man_t * pMan, * pTemp;
int typeII_cnt = 0;
assert( Abc_NtkIsStrash(pNtk) );
pMan = Abc_NtkToDar( pNtk, 0, 1 );
if ( pMan == NULL )
return NULL;
if ( fStruct ){
assert(0);//pMan = Saig_ManDupUnfoldConstrs( pTemp = pMan );
}else
pMan = Saig_ManDupUnfoldConstrsFunc2( pTemp = pMan, nFrames, nConfs, nProps, fOldAlgo, fVerbose , &typeII_cnt);
Aig_ManStop( pTemp );
if ( pMan == NULL )
return NULL;
// typeII_cnt = pMan->nConstrsTypeII;
pNtkAig = Abc_NtkFromAigPhase( pMan );
pNtkAig->pName = Extra_UtilStrsav(pMan->pName);
pNtkAig->pSpec = Extra_UtilStrsav(pMan->pSpec);
Aig_ManStop( pMan );
return pNtkAig;//Abc_NtkDarFold2(pNtkAig, 0, fVerbose, typeII_cnt);
//return pNtkAig;
}
/**Function*************************************************************
Synopsis [Performs BDD-based reachability analysis.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkDarFold2( Abc_Ntk_t * pNtk, int fCompl, int fVerbose
, int typeII_cnt
)
{
Abc_Ntk_t * pNtkAig;
Aig_Man_t * pMan, * pTemp;
assert( Abc_NtkIsStrash(pNtk) );
pMan = Abc_NtkToDar( pNtk, 0, 1 );
if ( pMan == NULL )
return NULL;
pMan = Saig_ManDupFoldConstrsFunc2( pTemp = pMan, fCompl, fVerbose, typeII_cnt );
Aig_ManStop( pTemp );
pNtkAig = Abc_NtkFromAigPhase( pMan );
pNtkAig->pName = Extra_UtilStrsav(pMan->pName);
pNtkAig->pSpec = Extra_UtilStrsav(pMan->pSpec);
Aig_ManStop( pMan );
return pNtkAig;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns internal nodes used in the mapping.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Llb_AigMap( Aig_Man_t * pAig, int nLutSize, int nLutMin )
{
extern Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan );
extern If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
extern void Gia_ManSetIfParsDefault( If_Par_t * pPars );
If_Par_t Pars, * pPars = &Pars;
If_Man_t * pIfMan;
If_Obj_t * pAnd;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pNode;
Vec_Int_t * vNodes;
Aig_Obj_t * pObj;
int i;
// create ABC network
pNtk = Abc_NtkFromAigPhase( pAig );
assert( Abc_NtkIsStrash(pNtk) );
// derive mapping parameters
Gia_ManSetIfParsDefault( pPars );
pPars->nLutSize = nLutSize;
// get timing information
pPars->pTimesArr = Abc_NtkGetCiArrivalFloats(pNtk);
pPars->pTimesReq = NULL;
// perform LUT mapping
pIfMan = Abc_NtkToIf( pNtk, pPars );
if ( pIfMan == NULL )
{
Abc_NtkDelete( pNtk );
return NULL;
}
if ( !If_ManPerformMapping( pIfMan ) )
{
Abc_NtkDelete( pNtk );
If_ManStop( pIfMan );
return NULL;
}
// mark nodes in the AIG used in the mapping
Aig_ManCleanMarkA( pAig );
Aig_ManForEachNode( pAig, pObj, i )
{
pNode = (Abc_Obj_t *)pObj->pData;
if ( pNode == NULL )
continue;
pAnd = (If_Obj_t *)pNode->pCopy;
if ( pAnd == NULL )
continue;
if ( pAnd->nRefs > 0 && (int)If_ObjCutBest(pAnd)->nLeaves >= nLutMin )
pObj->fMarkA = 1;
}
