ACPI_STATUS
AcpiHwClearAcpiStatus (
void)
{
ACPI_STATUS Status;
ACPI_CPU_FLAGS LockFlags = 0;
ACPI_FUNCTION_TRACE (HwClearAcpiStatus);
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
ACPI_BITMASK_ALL_FIXED_STATUS,
ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address)));
LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock);
/* Clear the fixed events in PM1 A/B */
Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS,
ACPI_BITMASK_ALL_FIXED_STATUS);
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* Clear the GPE Bits in all GPE registers in all GPE blocks */
Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL);
UnlockAndExit:
AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags);
return_ACPI_STATUS (Status);
}
ACPI_STATUS
AcpiHwLegacySleep (
UINT8 SleepState)
{
ACPI_BIT_REGISTER_INFO *SleepTypeRegInfo;
ACPI_BIT_REGISTER_INFO *SleepEnableRegInfo;
UINT32 Pm1aControl;
UINT32 Pm1bControl;
UINT32 InValue;
ACPI_STATUS Status;
ACPI_FUNCTION_TRACE (HwLegacySleep);
SleepTypeRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_TYPE);
SleepEnableRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_ENABLE);
/* Clear wake status */
Status = AcpiWriteBitRegister (ACPI_BITREG_WAKE_STATUS, ACPI_CLEAR_STATUS);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Clear all fixed and general purpose status bits */
Status = AcpiHwClearAcpiStatus ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/*
* 1) Disable/Clear all GPEs
* 2) Enable all wakeup GPEs
*/
Status = AcpiHwDisableAllGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
AcpiGbl_SystemAwakeAndRunning = FALSE;
Status = AcpiHwEnableAllWakeupGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Get current value of PM1A control */
Status = AcpiHwRegisterRead (ACPI_REGISTER_PM1_CONTROL,
&Pm1aControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
ACPI_DEBUG_PRINT ((ACPI_DB_INIT,
"Entering sleep state [S%u]\n", SleepState));
/* Clear the SLP_EN and SLP_TYP fields */
Pm1aControl &= ~(SleepTypeRegInfo->AccessBitMask |
SleepEnableRegInfo->AccessBitMask);
Pm1bControl = Pm1aControl;
/* Insert the SLP_TYP bits */
Pm1aControl |= (AcpiGbl_SleepTypeA << SleepTypeRegInfo->BitPosition);
Pm1bControl |= (AcpiGbl_SleepTypeB << SleepTypeRegInfo->BitPosition);
/*
* We split the writes of SLP_TYP and SLP_EN to workaround
* poorly implemented hardware.
*/
/* Write #1: write the SLP_TYP data to the PM1 Control registers */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Insert the sleep enable (SLP_EN) bit */
Pm1aControl |= SleepEnableRegInfo->AccessBitMask;
Pm1bControl |= SleepEnableRegInfo->AccessBitMask;
/* Flush caches, as per ACPI specification */
ACPI_FLUSH_CPU_CACHE ();
/* Write #2: Write both SLP_TYP + SLP_EN */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (SleepState > ACPI_STATE_S3)
{
/*
* We wanted to sleep > S3, but it didn't happen (by virtue of the
* fact that we are still executing!)
*
* Wait ten seconds, then try again. This is to get S4/S5 to work on
* all machines.
*
* We wait so long to allow chipsets that poll this reg very slowly
* to still read the right value. Ideally, this block would go
* away entirely.
*/
AcpiOsStall (10 * ACPI_USEC_PER_SEC);
Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_CONTROL,
SleepEnableRegInfo->AccessBitMask);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
}
/* Wait for transition back to Working State */
do
{
Status = AcpiReadBitRegister (ACPI_BITREG_WAKE_STATUS, &InValue);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
} while (!InValue);
return_ACPI_STATUS (AE_OK);
}
ACPI_STATUS
AcpiEnterSleepState (
UINT8 SleepState)
{
UINT32 Pm1aControl;
UINT32 Pm1bControl;
ACPI_BIT_REGISTER_INFO *SleepTypeRegInfo;
ACPI_BIT_REGISTER_INFO *SleepEnableRegInfo;
UINT32 InValue;
ACPI_OBJECT_LIST ArgList;
ACPI_OBJECT Arg;
ACPI_STATUS Status;
ACPI_FUNCTION_TRACE (AcpiEnterSleepState);
if ((AcpiGbl_SleepTypeA > ACPI_SLEEP_TYPE_MAX) ||
(AcpiGbl_SleepTypeB > ACPI_SLEEP_TYPE_MAX))
{
ACPI_ERROR ((AE_INFO, "Sleep values out of range: A=%X B=%X",
AcpiGbl_SleepTypeA, AcpiGbl_SleepTypeB));
return_ACPI_STATUS (AE_AML_OPERAND_VALUE);
}
SleepTypeRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_TYPE);
SleepEnableRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_ENABLE);
/* Clear wake status */
Status = AcpiWriteBitRegister (ACPI_BITREG_WAKE_STATUS, ACPI_CLEAR_STATUS);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Clear all fixed and general purpose status bits */
Status = AcpiHwClearAcpiStatus ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (SleepState != ACPI_STATE_S5)
{
/*
* Disable BM arbitration. This feature is contained within an
* optional register (PM2 Control), so ignore a BAD_ADDRESS
* exception.
*/
Status = AcpiWriteBitRegister (ACPI_BITREG_ARB_DISABLE, 1);
if (ACPI_FAILURE (Status) && (Status != AE_BAD_ADDRESS))
{
return_ACPI_STATUS (Status);
}
}
/*
* 1) Disable/Clear all GPEs
* 2) Enable all wakeup GPEs
*/
Status = AcpiHwDisableAllGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
AcpiGbl_SystemAwakeAndRunning = FALSE;
Status = AcpiHwEnableAllWakeupGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Execute the _GTS method (Going To Sleep) */
ArgList.Count = 1;
ArgList.Pointer = &Arg;
Arg.Type = ACPI_TYPE_INTEGER;
Arg.Integer.Value = SleepState;
Status = AcpiEvaluateObject (NULL, METHOD_NAME__GTS, &ArgList, NULL);
if (ACPI_FAILURE (Status) && Status != AE_NOT_FOUND)
{
return_ACPI_STATUS (Status);
}
/* Get current value of PM1A control */
Status = AcpiHwRegisterRead (ACPI_REGISTER_PM1_CONTROL,
&Pm1aControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
ACPI_DEBUG_PRINT ((ACPI_DB_INIT,
"Entering sleep state [S%d]\n", SleepState));
/* Clear the SLP_EN and SLP_TYP fields */
Pm1aControl &= ~(SleepTypeRegInfo->AccessBitMask |
SleepEnableRegInfo->AccessBitMask);
Pm1bControl = Pm1aControl;
/* Insert the SLP_TYP bits */
Pm1aControl |= (AcpiGbl_SleepTypeA << SleepTypeRegInfo->BitPosition);
Pm1bControl |= (AcpiGbl_SleepTypeB << SleepTypeRegInfo->BitPosition);
/*
* We split the writes of SLP_TYP and SLP_EN to workaround
* poorly implemented hardware.
*/
/* Write #1: write the SLP_TYP data to the PM1 Control registers */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Insert the sleep enable (SLP_EN) bit */
Pm1aControl |= SleepEnableRegInfo->AccessBitMask;
Pm1bControl |= SleepEnableRegInfo->AccessBitMask;
/* Flush caches, as per ACPI specification */
ACPI_FLUSH_CPU_CACHE ();
/* Write #2: Write both SLP_TYP + SLP_EN */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (SleepState > ACPI_STATE_S3)
{
/*
* We wanted to sleep > S3, but it didn't happen (by virtue of the
* fact that we are still executing!)
*
* Wait ten seconds, then try again. This is to get S4/S5 to work on
* all machines.
*
* We wait so long to allow chipsets that poll this reg very slowly
* to still read the right value. Ideally, this block would go
* away entirely.
*/
AcpiOsStall (10000000);
Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_CONTROL,
SleepEnableRegInfo->AccessBitMask);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
}
/* Wait until we enter sleep state */
do
{
Status = AcpiReadBitRegister (ACPI_BITREG_WAKE_STATUS, &InValue);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Spin until we wake */
} while (!InValue);
return_ACPI_STATUS (AE_OK);
}
ACPI_STATUS
AcpiHwLegacySleep (
UINT8 SleepState,
UINT8 Flags)
{
ACPI_BIT_REGISTER_INFO *SleepTypeRegInfo;
ACPI_BIT_REGISTER_INFO *SleepEnableRegInfo;
UINT32 Pm1aControl;
UINT32 Pm1bControl;
UINT32 InValue;
UINT32 Retry;
ACPI_STATUS Status;
ACPI_FUNCTION_TRACE (HwLegacySleep);
SleepTypeRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_TYPE);
SleepEnableRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_ENABLE);
/* Clear wake status */
Status = AcpiWriteBitRegister (ACPI_BITREG_WAKE_STATUS, ACPI_CLEAR_STATUS);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Clear all fixed and general purpose status bits */
Status = AcpiHwClearAcpiStatus ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (SleepState != ACPI_STATE_S5)
{
/*
* Disable BM arbitration. This feature is contained within an
* optional register (PM2 Control), so ignore a BAD_ADDRESS
* exception.
*/
Status = AcpiWriteBitRegister (ACPI_BITREG_ARB_DISABLE, 1);
if (ACPI_FAILURE (Status) && (Status != AE_BAD_ADDRESS))
{
return_ACPI_STATUS (Status);
}
}
/*
* 1) Disable/Clear all GPEs
* 2) Enable all wakeup GPEs
*/
Status = AcpiHwDisableAllGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
AcpiGbl_SystemAwakeAndRunning = FALSE;
Status = AcpiHwEnableAllWakeupGpes ();
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Optionally execute _GTS (Going To Sleep) */
if (Flags & ACPI_EXECUTE_GTS)
{
AcpiHwExecuteSleepMethod (METHOD_PATHNAME__GTS, SleepState);
}
/* Get current value of PM1A control */
Status = AcpiHwRegisterRead (ACPI_REGISTER_PM1_CONTROL,
&Pm1aControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
ACPI_DEBUG_PRINT ((ACPI_DB_INIT,
"Entering sleep state [S%u]\n", SleepState));
/* Clear the SLP_EN and SLP_TYP fields */
Pm1aControl &= ~(SleepTypeRegInfo->AccessBitMask |
SleepEnableRegInfo->AccessBitMask);
Pm1bControl = Pm1aControl;
/* Insert the SLP_TYP bits */
Pm1aControl |= (AcpiGbl_SleepTypeA << SleepTypeRegInfo->BitPosition);
Pm1bControl |= (AcpiGbl_SleepTypeB << SleepTypeRegInfo->BitPosition);
/*
* We split the writes of SLP_TYP and SLP_EN to workaround
* poorly implemented hardware.
*/
/* Write #1: write the SLP_TYP data to the PM1 Control registers */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
/* Insert the sleep enable (SLP_EN) bit */
Pm1aControl |= SleepEnableRegInfo->AccessBitMask;
Pm1bControl |= SleepEnableRegInfo->AccessBitMask;
/* Flush caches, as per ACPI specification */
ACPI_FLUSH_CPU_CACHE ();
/* Write #2: Write both SLP_TYP + SLP_EN */
Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (SleepState > ACPI_STATE_S3)
{
/*
* We wanted to sleep > S3, but it didn't happen (by virtue of the
* fact that we are still executing!)
*
* Wait ten seconds, then try again. This is to get S4/S5 to work on
* all machines.
*
* We wait so long to allow chipsets that poll this reg very slowly
* to still read the right value. Ideally, this block would go
* away entirely.
*/
AcpiOsStall (10000000);
Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_CONTROL,
SleepEnableRegInfo->AccessBitMask);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
}
/* Wait for transition back to Working State */
Retry = 1000;
do
{
Status = AcpiReadBitRegister (ACPI_BITREG_WAKE_STATUS, &InValue);
if (ACPI_FAILURE (Status))
{
return_ACPI_STATUS (Status);
}
if (AcpiGbl_EnableInterpreterSlack)
{
/*
* Some BIOSs don't set WAK_STS at all. Give up waiting after
* 1000 retries if it still isn't set.
*/
if (Retry-- == 0)
{
break;
}
}
} while (!InValue);
return_ACPI_STATUS (AE_OK);
}
