void osc_priv_disable_osc32(void) { irqflags_t flags; flags = cpu_irq_save(); BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu) | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF); BSCIF->BSCIF_OSCCTRL32 &= ~BSCIF_OSCCTRL32_OSC32EN; // Wait until OSC32 RDY flag is cleared. while (BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_OSC32RDY); cpu_irq_restore(flags); }
void osc_priv_enable_rc1m(void) { irqflags_t flags; uint32_t temp; flags = cpu_irq_save(); temp = BSCIF->BSCIF_RC1MCR; BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu) | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC1MCR - (uint32_t)BSCIF); BSCIF->BSCIF_RC1MCR = temp | BSCIF_RC1MCR_CLKOE; cpu_irq_restore(flags); }
void osc_priv_disable_rc32k(void) { irqflags_t flags; uint32_t temp; flags = cpu_irq_save(); temp = BSCIF->BSCIF_RC32KCR; temp &= ~BSCIF_RC32KCR_EN; BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu) | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC32KCR - (uint32_t)BSCIF); BSCIF->BSCIF_RC32KCR = temp; cpu_irq_restore(flags); }
static inline void sam_enablerc32k(void) { uint32_t regval; /* Configure and enable RC32K */ regval = getreg32(SAM_BSCIF_RC32KCR); putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_RC32KCR_OFFSET), SAM_BSCIF_UNLOCK); putreg32(regval | BSCIF_RC32KCR_EN32K | BSCIF_RC32KCR_EN, SAM_BSCIF_RC32KCR); /* Wait for RCFAST to be ready */ while (getreg32(SAM_BSCIF_RC32KCR) & BSCIF_RC32KCR_EN) == 0); }
void osc_priv_enable_osc32(void) { irqflags_t flags; flags = cpu_irq_save(); BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu) | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF); BSCIF->BSCIF_OSCCTRL32 = OSC32_STARTUP_VALUE | BOARD_OSC32_SELCURR | OSC32_MODE_VALUE | BSCIF_OSCCTRL32_EN1K | BSCIF_OSCCTRL32_EN32K | BSCIF_OSCCTRL32_OSC32EN; cpu_irq_restore(flags); }
static inline void sam_enablerc1m(void) { uint32_t regval; /* Configure and enable RC1M */ regval = getreg32(SAM_BSCIF_RC1MCR); regval &= ~BSCIF_RCFASTCFG_FRANGE_MASK; regval |= (SAM_RCFAST_RANGE | BSCIF_RCFASTCFG_EN); putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_RC1MCR_OFFSET), SAM_BSCIF_UNLOCK); putreg32(regval | BSCIF_RC1MCR_CLKOEN, SAM_BSCIF_RC1MCR); /* Wait for RCFAST to be ready */ while (getreg32(SAM_BSCIF_RC1MCR) & BSCIF_RC1MCR_CLKOEN) == 0); }
static inline void sam_enableosc32(void) { uint32_t regval; /* Set up the OSCCTRL32 register using settings from the board.h file. * Also enable the oscillator and provide bother the 32KHz and 1KHz output. */ regval = SAM_OSC32_STARTUP_VALUE | BOARD_OSC32_SELCURR | SAM_OSC32_MODE_VALUE | BSCIF_OSCCTRL32_EN1K | BSCIF_OSCCTRL32_EN32K | BSCIF_OSCCTRL32_OSC32EN; putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_OSCCTRL32_OFFSET), SAM_BSCIF_UNLOCK); putreg32(regval, SAM_BSCIF_OSCCTRL32); /* Wait for OSC32 to be ready */ while ((getreg32(SAM_BSCIF_PCLKSR) & BSCIF_INT_OSC32RDY) == 0); }