// Check if button was pressed
// Number of the channel can be determined by reading receiver's pins (D0..D3)
// If button is pressed - start timer and wait release
void checkPressed()
{
BSP_USE_CRITICAL();
uint8_t button_pressed_isr_local;
BSP_CRITICAL(button_pressed_isr_local = button_pressed_isr);
// There was no ISR (there are pressed buttons)
if(!button_pressed_isr_local) {
return;
}
for (uint8_t i = 0; i < 4; ++i) {
if ( ((i == 0) && BSP_BTN0_IS_PRESSED()) ||
((i == 1) && BSP_BTN1_IS_PRESSED()) ||
((i == 2) && BSP_BTN2_IS_PRESSED()) ||
((i == 3) && BSP_BTN3_IS_PRESSED()) ) {
BSP_timer_start_ms(TMR_BTN_CHECK, SUIT_BUTTON_CHECK_MS, SWTIMER_PERIODIC, checkReleased);
BSP_TRACE("Button %d pressed", i);
buttons[i].is_pressed = true;
buttons[i].event = BTN_WAIT_RELEASE;
// Don't sleep until event will be processed
i_can_sleep = 0;
}
}
BSP_CRITICAL(button_pressed_isr = false;);
//-------------------------------------------------------------------------------
// Process incoming console command
// str - null-terminated string with command
void CONS_cmd_process(uint8_t * str)
{
uint8_t i;
uint8_t len = strlen(str);
uint16_t param = 0;
BSP_TRACE("\r\n",0);
// if console command with parameter
if (len > CONSOLE_COMMAND_LEN) {
for (i = 0; i < CONS_CMD_PARAM_MAX; i++) {
if (memcmp(str, consCommandsParams[i].cmd, CONSOLE_COMMAND_LEN) == 0) {
param = atoi(str + CONSOLE_COMMAND_LEN);
BSP_TRACE("CONS: %s, param %d", consCommandsParams[i], param);
if (consCommandsParams[i].handler) {
consCommandsParams[i].handler(param);
} else {
BSP_TRACE("no handler", 0);
}
return;
}
}
}
// if console command without parameter
else if (len == CONSOLE_COMMAND_LEN) {
for (i = 0; i < CONS_CMD_MAX; i++) {
if (memcmp(str, consCommands[i].cmd, CONSOLE_COMMAND_LEN) == 0) {
BSP_TRACE("CONS: %s", consCommands[i]);
if (consCommands[i].handler) {
consCommands[i].handler();
} else {
BSP_TRACE("no handler", 0);
}
return;
}
}
}
// Print help
BSP_TRACE("\n\rUnkown command: %s (len %d)", str, len);
BSP_TRACE("\n\rConsole commands:", 0);
for (i = 0; i < CONS_CMD_MAX; i++) {
BSP_TRACE("%s", consCommands[i]);
}
for (i = 0; i < CONS_CMD_PARAM_MAX; i++) {
BSP_TRACE("%s n", consCommandsParams[i]);
}
}
//-------------------------------------------------------------------------------
// Convert raw 8-bit ADC measurement to decades of millivolts
uint8_t BSP_adc_to_mV_x10 (uint8_t raw8)
{
uint16_t tmp;
tmp = raw8;
tmp = ADC_RAW8_TO_mV_x10(tmp);
#ifdef ADC_DEBUG
BSP_TRACE("ADC%d raw 0x%02X -> %d mV_x10", adc_chan, raw8, tmp);
#endif
return (uint8_t)tmp;
}
/*****************************************************************************
* 函 数 名 : BSP_OM_DspAHBResetCancel
* 功能描述 : ZSP AHB总线解复位
* 输入参数 : 无
* 输出参数 : 无
* 返 回 值 : 无
* 其它说明 : 无
*****************************************************************************/
void DRV_DSP_AHB_RESET_CANCEL(void)
{
#if defined (BSP_CORE_MODEM) || defined(PRODUCT_CFG_CORE_TYPE_MODEM)
/* BSP_OM_DspAHBResetCancel(); */
BSP_TRACE(BSP_LOG_LEVEL_ERROR,BSP_MODU_USB,"stub:DRV_DSP_AHB_RESET_CANCEL\n");
return;
#endif
#if (defined BSP_CORE_APP)
return; /* 打桩 */
#endif
}
//-------------------------------------------------------------------------------
// Set Sync byte (0x2Dxx)
void MRF_sync_set(uint8_t chan, uint8_t sync_byte)
{
mrfDrv_t * mrf_p = &mrf[chan];
BSP_USE_CRITICAL();
BSP_CRITICAL(BSP_ASSERT(mrf_p->state == MRF_STATE_DISABLE));
mrf_p->sync_byte = sync_byte;
// SYNBREG = SYNCB xxxx xxxx
mrf_p->reg_set(MRF_SYNBREG | (sync_byte & MRF_SYNCB_MASK)); // 0xCExx
#ifdef MRF_TRACE_SETUP_ENABLE
BSP_TRACE("ch%d sync %02X", chan, sync_byte);
#endif
}
//-------------------------------------------------------------------------------
// Set Center freq
// khz - offset from beginning of band in KHz (band 860480 - 879510 KHz)
void MRF_freq868_set(uint8_t chan, uint16_t khz)
{
uint32_t freq_khz = 860480 + khz; // beginning of the band + offset
mrfDrv_t * mrf_p = &mrf[chan];
BSP_USE_CRITICAL();
BSP_CRITICAL(BSP_ASSERT(mrf_p->state == MRF_STATE_DISABLE));
BSP_ASSERT((freq_khz >= 860480) && (freq_khz <= 879510)); // min-max values of the band
mrf_p->reg_set((MRF_CFSREG) | ((uint16_t)MRF_FREQB_868_VAL_KHZ(freq_khz))); // 0xAxxx
#ifdef MRF_TRACE_SETUP_ENABLE
BSP_TRACE("ch%d freq = 860480 + %d KHz", chan, khz);
#endif
}
//-------------------------------------------------------------------------------
// Set Tx power
void MRF_txpower_set(uint8_t chan, uint8_t power)
{
uint16_t power_dBm;
mrfDrv_t * mrf_p = &mrf[chan];
BSP_USE_CRITICAL();
BSP_CRITICAL(BSP_ASSERT(mrf_p->state == MRF_STATE_DISABLE));
if (power == MRF_TX_POWER_LOW) { power_dBm = MRF_OTXPWR_17D5; }
else if (power == MRF_TX_POWER_MEDIUM) { power_dBm = MRF_OTXPWR_10D5; }
else if (power == MRF_TX_POWER_FULL) { power_dBm = MRF_OTXPWR_0; }
else { BSP_ASSERT(0);}
// TXCREG = MODPLY 0 MODBW 0010 no 0 OTXPWR 000
// Modulation polarity = Default, modulation bandwidth = 45 KHz,
// transmit power = 0 or -10.5 or -17.7 dBm
mrf_p->reg_set(MRF_TXCREG | MRF_MODBW_45K | power_dBm); // 0x98xx
#ifdef MRF_TRACE_SETUP_ENABLE
BSP_TRACE("ch%d power = %d", chan, power);
#endif
}
void MRF_init(uint8_t chan)
{
mrfDrv_t * mrf_p = &mrf[chan];
// Hardware interfaces init
// SPI is already inialized in BSP
if (chan == 0) {
// Setup the functions for SPI exchange
mrf_p->cs_on = &(MRF_spi_cs_on);
mrf_p->cs_off = &(MRF_spi_cs_off);
mrf_p->miso_is_up = &(MRF_spi_miso_is_up);
mrf_p->spi_word = &(MRF_spi_word);
MRF_IRO_INIT(); // External falling edge interrupt IRO from MRF49
}
#ifdef MRF48XA_PAIR
else if (chan == 1) {
// Setup the functions for SPI exchange
mrf_p->cs_on = &MRF1_spi_cs_on;
mrf_p->cs_off = &MRF1_spi_cs_off;
mrf_p->miso_is_up = &MRF1_spi_miso_is_up;
mrf_p->spi_word = &MRF1_spi_word;
MRF1_IRO_INIT(); // External falling edge interrupt IRO from MRF49
}
#endif
else {
BSP_ASSERT(0);
}
// Setup buffers and counters
mrf_p->txPkt.len = 0;
mrf_p->txPkt.bytes_processed = 0;
mrf_p->rxPkt.bytes_processed = 0;
mrf_p->rxPkt.len = 0;
mrf_p->get_rss = 0;
// Dummy read of status registers to clear Power on reset flag
mrf_p->status_get(); // 0x0000
// Disabled state set
MRF_disable(chan);
// Init all registers
// PMCREG = RXCEN 0 BBCEN 0 TXCEN 0 SYNEN 0 OSCEN 1 LBDEN 0 WUTEN 0 CLKOEN 1
// (Idle mode - only Crystal enabled)
mrf_p->reg_set(MRF_PMCREG | MRF_OSCEN | MRF_CLKODIS); // 0x8209
delay_ms(5);
// GENCREG = TXDEN 0 FIFOEN 1 FBS 10 LCS 0101
// Tx = disable, FIFO = enable, band = 868, capacitor = 11pf
mrf_p->reg_set(MRF_GENCREG | MRF_FIFOEN | MRF_FBS_868 | (MRF_LCS_11PF & MRF_LCS_MASK)); // 0x8065
// PMCREG = RXCEN 0 BBCEN 0 TXCEN 0 SYNEN 0 OSCEN 1 LBDEN 0 WUTEN 0 CLKOEN 1
// (Idle mode - only Crystal enabled)
mrf_p->reg_set(MRF_PMCREG | MRF_OSCEN | MRF_CLKODIS); // 0x8209
// MRF_CFSREG = FREQB
// Freq = 860.48 Mhz - beginning of the band
MRF_freq868_set(chan, 0); // 0xAxxx
// DRSREG = DRPE 0 DRPV 0100011
// Disables the prescaler, data rate = approx. 9600 bps baud
mrf_p->reg_set(MRF_DRSREG | MRF_DPRV_VAL(9600)); // 0xC623 (default)
// RXCREG = FINTDIO 1 DIORT 10 RXBW 110 RXLNA 00 DRSSIT 011
// DIO output, DIO mode = Slow, Bandwidth = 67 kHz,
// LNA = 0 dB, digital RSSI thr = -85 dB
mrf_p->reg_set(MRF_RXCREG | MRF_FINTDIO | MRF_DIORT_SLOW | MRF_RXBW_67K | MRF_RXLNA_0DB | MRF_DRSSIT_85db); // 0x96C3
// BBFCREG = ACRLC 0 MCRLC 0 no 1 FTYPE 0 no 1 DQTI 100
// Clock recovery lock = Manual, clock recovery lock = Slow,
// baseband filter = digital filter,
// data Quality Threshold Indicator = 4 (high sensitive)
mrf_p->reg_set(MRF_BBFCREG | (4 & MRF_DQTI_MASK)); // 0xC22C (default)
// FIFORSTREG = FFBC 1000 SYCHLEN 0 FFSC 0 FSCF 1 DRSTM 1
// Bits before interrupt = 8, sync = 2 bytes,
// FIFO will fill = Only after sync, sync latch = Enable,
// disable (sensitive) reset mode
mrf_p->reg_set(MRF_FIFORSTREG | ((8 << 4) & MRF_FFBC_MASK | MRF_FSCF | MRF_DRSTM)); // 0xCA83
// Sync = 0xFF
MRF_sync_set(chan, 0xFF); // 0xCEFF
// AFCCREG = AUTOMS 00 ARFO 11 MFCS 0 HAM 0 FOREN 0 FOFEN 0
mrf_p->reg_set(MRF_AFCCREG | MRF_AUTOMS_OFF | MRF_ARFO_3to4); // 0xC430
// Set deviation and full Tx power
MRF_txpower_set(chan, MRF_TX_POWER_FULL); // 0x98xx
// PLLCREG = no 0 CBTC 00 no 1 PDDS 0 PLLDD 1 no 1 PLLBWB 0
mrf_p->reg_set(MRF_PLLCREG | MRF_CBTC_2m | MRF_PLLDD); // 0xCC16
// WTSREG = WTEV 00000 WTMV 0000000
// Wake-up = 0.5 ms
mrf_p->reg_set(MRF_WTSREG); // 0xE000
// DCSREG = DCMV 0000000 DCMEN 0
// Duty Cycle mode = Disable
mrf_p->reg_set(MRF_DCSREG); // 0xC800
// BCSREG = COFSB 000 no 0 LBDVB 0000
// Clock Output Frequency = 1 MHz,
// Threshold voltage level = 2.25 V
mrf_p->reg_set(0xC000); // 0xC000
// Disabled state set
MRF_disable(chan);
// Dummy read of status registers
mrf_p->status_get(); // 0x0000
// enable interrupt last, just in case they're already globally enabled
if (chan == 0) {
MRF_IRO_ENABLE();
}
#ifdef MRF48XA_PAIR
else if (chan == 1) {
MRF1_IRO_ENABLE();
}
#endif
#ifdef MRF_TRACE_SETUP_ENABLE
BSP_TRACE("ch%d init ok", chan);
#endif
}