/**
Update the Stack Hob if the stack has been moved
@param BaseAddress The 64 bit physical address of the Stack.
@param Length The length of the stack in bytes.
**/
VOID
UpdateStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = GetHobList ();
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Raw)) != NULL) {
if (CompareGuid (&gEfiHobMemoryAllocStackGuid, &(Hob.MemoryAllocationStack->AllocDescriptor.Name))) {
//
// Build a new memory allocation HOB with old stack info with EfiConventionalMemory type
// to be reclaimed by DXE core.
//
BuildMemoryAllocationHob (
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress,
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength,
EfiConventionalMemory
);
//
// Update the BSP Stack Hob to reflect the new stack info.
//
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress = BaseAddress;
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
}
/**
Perform a call-back into the SEC simulator to get address of the Firmware Hub
@param FfsHeader Ffs Header availible to every PEIM
@param PeiServices General purpose services available to every PEIM.
@retval EFI_SUCCESS Platform PEI FVs were initialized successfully.
**/
EFI_STATUS
PeiFvInitialization (
VOID
)
{
DEBUG ((EFI_D_ERROR, "Platform PEI Firmware Volume Initialization\n"));
DEBUG (
(EFI_D_ERROR, "Firmware Volume HOB: 0x%x 0x%x\n",
PcdGet32 (PcdOvmfMemFvBase),
PcdGet32 (PcdOvmfMemFvSize)
)
);
BuildFvHob (PcdGet32 (PcdOvmfMemFvBase), PcdGet32 (PcdOvmfMemFvSize));
//
// Create a memory allocation HOB.
//
BuildMemoryAllocationHob (
PcdGet32 (PcdOvmfMemFvBase),
PcdGet32 (PcdOvmfMemFvSize),
EfiBootServicesData
);
return EFI_SUCCESS;
}
/**
Updates the Stack HOB passed to DXE phase.
This function traverses the whole HOB list and update the stack HOB to
reflect the real stack that is used by DXE core.
@param BaseAddress The lower address of stack used by DxeCore.
@param Length The length of stack used by DxeCore.
**/
VOID
UpdateStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = GetHobList ();
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Raw)) != NULL) {
if (CompareGuid (&gEfiHobMemoryAllocStackGuid, &(Hob.MemoryAllocationStack->AllocDescriptor.Name))) {
//
// Build a new memory allocation HOB with old stack info with EfiBootServicesData type. Need to
// avoid this region be reclaimed by DXE core as the IDT built in SEC might be on stack, and some
// PEIMs may also keep key information on stack
//
BuildMemoryAllocationHob (
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress,
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength,
EfiBootServicesData
);
//
// Update the BSP Stack Hob to reflect the new stack info.
//
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress = BaseAddress;
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
}
/**
Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
and DXE know about them.
@retval EFI_SUCCESS Platform PEI FVs were initialized successfully.
**/
EFI_STATUS
PeiFvInitialization (
VOID
)
{
DEBUG ((EFI_D_INFO, "Platform PEI Firmware Volume Initialization\n"));
//
// Create a memory allocation HOB for the PEI FV.
//
// Allocate as ACPI NVS is S3 is supported
//
BuildMemoryAllocationHob (
PcdGet32 (PcdOvmfPeiMemFvBase),
PcdGet32 (PcdOvmfPeiMemFvSize),
mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
);
//
// Let DXE know about the DXE FV
//
BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize));
//
// Create a memory allocation HOB for the DXE FV.
//
BuildMemoryAllocationHob (
PcdGet32 (PcdOvmfDxeMemFvBase),
PcdGet32 (PcdOvmfDxeMemFvSize),
EfiBootServicesData
);
//
// Let PEI know about the DXE FV so it can find the DXE Core
//
PeiServicesInstallFvInfoPpi (
NULL,
(VOID *)(UINTN) PcdGet32 (PcdOvmfDxeMemFvBase),
PcdGet32 (PcdOvmfDxeMemFvSize),
NULL,
NULL
);
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
MemoryPeim (
IN EFI_PHYSICAL_ADDRESS MemoryBase,
IN UINT64 MemorySize
)
{
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
UINT64 Base,Size;
//
// For now we simply declare the IMA memory given to us, we will
// do things a bit more smartly when I understand UEFI memory
// management a bit better.
//
// Now, the permanent memory has been installed, we can call AllocatePages()
//
ResourceAttributes = (
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
// TODO, use device-tree
DEBUG((DEBUG_INIT, "System Memory Hob: %lx, %lx\n", MemoryBase, MemorySize));
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
MemoryBase, MemorySize);
// Reserve ourselves (TODO: reserve map in DT ?)
Base = PcdGet64(PcdFdBaseAddress) & ~(EFI_PAGE_SIZE - 1);
Size = ((PcdGet64(PcdFdBaseAddress) + PcdGet64(PcdFdSize)) + (EFI_PAGE_SIZE - 1)) & ~(EFI_PAGE_SIZE - 1);
DEBUG((DEBUG_INIT, "Reserve Hob: %lx, %lx\n", Base, Size));
BuildMemoryAllocationHob (Base, Size, EfiBootServicesData);
// Initialize MMU
InitMmu ();
if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) {
// Optional feature that helps prevent EFI memory map fragmentation.
BuildMemoryTypeInformationHob ();
}
return EFI_SUCCESS;
}
VOID
InitCache (
IN UINT32 MemoryBase,
IN UINT32 MemoryLength
)
{
UINT32 CacheAttributes;
ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
VOID *TranslationTableBase;
UINTN TranslationTableSize;
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
CacheAttributes = DDR_ATTRIBUTES_CACHED;
} else {
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
}
// DDR
MemoryTable[0].PhysicalBase = MemoryBase;
MemoryTable[0].VirtualBase = MemoryBase;
MemoryTable[0].Length = MemoryLength;
MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
// SOC Registers. L3 interconnects
MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
// SOC Registers. L4 interconnects
MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
// End of Table
MemoryTable[3].PhysicalBase = 0;
MemoryTable[3].VirtualBase = 0;
MemoryTable[3].Length = 0;
MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}
EFIAPI
AllocatePages (
IN UINTN Pages
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS Offset;
Hob.Raw = GetHobList ();
// Check to see if on 4k boundary
Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
if (Offset != 0) {
// If not aligned, make the allocation aligned.
Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
}
//
// Verify that there is sufficient memory to satisfy the allocation
//
if (Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages * EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) < Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
return 0;
} else {
//
// Update the PHIT to reflect the memory usage
//
Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages * EFI_PAGE_SIZE;
// This routine used to create a memory allocation HOB a la PEI, but that's not
// necessary for us.
//
// Create a memory allocation HOB.
//
BuildMemoryAllocationHob (
Hob.HandoffInformationTable->EfiFreeMemoryTop,
Pages * EFI_PAGE_SIZE,
EfiBootServicesData
);
return (VOID *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;
}
}
/**
Create memory mapped io resource hob.
@param MmioBase Base address of the memory mapped io range
@param MmioSize Length of the memory mapped io range
**/
VOID
BuildMemoryMappedIoRangeHob (
EFI_PHYSICAL_ADDRESS MmioBase,
UINT64 MmioSize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_MAPPED_IO,
(EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED),
MmioBase,
MmioSize
);
BuildMemoryAllocationHob (
MmioBase,
MmioSize,
EfiMemoryMappedIO
);
}
/**
This is the entrypoint of PEIM
@param FileHandle Handle of the file being invoked.
@param PeiServices Describes the list of possible PEI Services.
@retval EFI_SUCCESS if it completed successfully.
**/
EFI_STATUS
EFIAPI
CbPeiEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
UINT64 LowMemorySize;
UINT64 PeiMemSize = SIZE_64MB; // 64 MB
EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
UINT32 RegEax;
UINT8 PhysicalAddressBits;
VOID* pCbHeader;
VOID* pAcpiTable;
UINT32 AcpiTableSize;
VOID* pSmbiosTable;
UINT32 SmbiosTableSize;
SYSTEM_TABLE_INFO* pSystemTableInfo;
FRAME_BUFFER_INFO FbInfo;
FRAME_BUFFER_INFO* pFbInfo;
ACPI_BOARD_INFO* pAcpiBoardInfo;
UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
UINTN PmEvtBase;
UINTN PmGpeEnBase;
CB_MEM_INFO CbMemInfo;
//
// Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED
// is intentionally omitted to prevent erasing of the coreboot header
// record before it is processed by CbParseMemoryInfo.
//
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
// Lower 640KB, except for first 4KB where the lower coreboot pointer ("LBIO") resides
(EFI_PHYSICAL_ADDRESS)(0 + 0x1000),
(UINT64)(0xA0000 - 0x1000)
);
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_RESERVED,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
(EFI_PHYSICAL_ADDRESS)(0xA0000),
(UINT64)(0x60000)
);
ZeroMem (&CbMemInfo, sizeof(CbMemInfo));
Status = CbParseMemoryInfo (CbMemInfoCallback, (VOID *)&CbMemInfo);
if (EFI_ERROR(Status)) {
return Status;
}
LowMemorySize = CbMemInfo.UsableLowMemTop;
DEBUG ((EFI_D_INFO, "Low memory 0x%lx\n", LowMemorySize));
DEBUG ((EFI_D_INFO, "SystemLowMemTop 0x%x\n", CbMemInfo.SystemLowMemTop));
//
// Should be 64k aligned
//
PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
Status = PeiServicesInstallPeiMemory (
PeiMemBase,
PeiMemSize
);
ASSERT_EFI_ERROR (Status);
//
// Set cache on the physical memory
//
MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
//
// Create Memory Type Information HOB
//
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
);
//
// Create Fv hob
//
CbPeiReportRemainedFvs ();
BuildMemoryAllocationHob (
PcdGet32 (PcdPayloadFdMemBase),
PcdGet32 (PcdPayloadFdMemSize),
EfiBootServicesData
);
//
// Build CPU memory space and IO space hob
//
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
} else {
PhysicalAddressBits = 36;
}
//
// Create a CPU hand-off information
//
BuildCpuHob (PhysicalAddressBits, 16);
//
// Report Local APIC range
//
BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
//
// Boot mode
//
Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
ASSERT_EFI_ERROR (Status);
Status = PeiServicesInstallPpi (mPpiBootMode);
ASSERT_EFI_ERROR (Status);
//
// Set pcd to save the upper coreboot header in case the dxecore will
// erase 0~4k memory
//
pCbHeader = NULL;
if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
&& ((UINTN)pCbHeader > BASE_4KB)) {
DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
Status = PcdSet32S (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
ASSERT_EFI_ERROR (Status);
}
//
// Create guid hob for system tables like acpi table and smbios table
//
pAcpiTable = NULL;
AcpiTableSize = 0;
pSmbiosTable = NULL;
SmbiosTableSize = 0;
Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
if (EFI_ERROR (Status)) {
// ACPI table is oblidgible
DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
ASSERT (FALSE);
}
CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
pSystemTableInfo = NULL;
pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
ASSERT (pSystemTableInfo != NULL);
pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
pSystemTableInfo->AcpiTableSize = AcpiTableSize;
pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
//
// Create guid hob for acpi board information
//
Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue, &PmEvtBase, &PmGpeEnBase);
ASSERT_EFI_ERROR (Status);
pAcpiBoardInfo = NULL;
pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
ASSERT (pAcpiBoardInfo != NULL);
pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
pAcpiBoardInfo->PmEvtBase = (UINT64)PmEvtBase;
pAcpiBoardInfo->PmGpeEnBase = (UINT64)PmGpeEnBase;
DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
//
// Create guid hob for frame buffer information
//
ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
Status = CbParseFbInfo (&FbInfo);
if (!EFI_ERROR (Status)) {
pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
ASSERT (pSystemTableInfo != NULL);
CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
}
//
// Parse platform specific information from coreboot.
//
Status = CbParsePlatformInfo ();
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Error when parsing platform info, Status = %r\n", Status));
return Status;
}
return EFI_SUCCESS;
}
/**
Publish system RAM and reserve memory regions
**/
VOID
InitializeRamRegions (
VOID
)
{
if (!mXen) {
QemuInitializeRam ();
} else {
XenPublishRamRegions ();
}
if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
//
// This is the memory range that will be used for PEI on S3 resume
//
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),
(UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),
EfiACPIMemoryNVS
);
//
// Cover the initial RAM area used as stack and temporary PEI heap.
//
// This is reserved as ACPI NVS so it can be used on S3 resume.
//
BuildMemoryAllocationHob (
PcdGet32 (PcdOvmfSecPeiTempRamBase),
PcdGet32 (PcdOvmfSecPeiTempRamSize),
EfiACPIMemoryNVS
);
//
// SEC stores its table of GUIDed section handlers here.
//
BuildMemoryAllocationHob (
PcdGet64 (PcdGuidedExtractHandlerTableAddress),
PcdGet32 (PcdGuidedExtractHandlerTableSize),
EfiACPIMemoryNVS
);
#ifdef MDE_CPU_X64
//
// Reserve the initial page tables built by the reset vector code.
//
// Since this memory range will be used by the Reset Vector on S3
// resume, it must be reserved as ACPI NVS.
//
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),
(UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),
EfiACPIMemoryNVS
);
#endif
}
if (mBootMode != BOOT_ON_S3_RESUME) {
//
// Reserve the lock box storage area
//
// Since this memory range will be used on S3 resume, it must be
// reserved as ACPI NVS.
//
// If S3 is unsupported, then various drivers might still write to the
// LockBox area. We ought to prevent DXE from serving allocation requests
// such that they would overlap the LockBox storage.
//
ZeroMem (
(VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)
);
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),
mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
);
}
}
/**
Allocates one or more 4KB pages of a certain memory type at a specified alignment.
Allocates the number of 4KB pages specified by Pages of a certain memory type with an alignment
specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is returned.
If there is not enough memory at the specified alignment remaining to satisfy the request, then
NULL is returned.
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
If Pages plus EFI_SIZE_TO_PAGES (Alignment) overflows, then ASSERT().
@param MemoryType The type of memory to allocate.
@param Pages The number of 4 KB pages to allocate.
@param Alignment The requested alignment of the allocation.
Must be a power of two.
If Alignment is zero, then byte alignment is used.
@return A pointer to the allocated buffer or NULL if allocation fails.
**/
VOID *
InternalAllocateAlignedPages (
IN EFI_MEMORY_TYPE MemoryType,
IN UINTN Pages,
IN UINTN Alignment
)
{
EFI_PHYSICAL_ADDRESS Memory;
EFI_PHYSICAL_ADDRESS AlignedMemory;
EFI_PEI_HOB_POINTERS Hob;
BOOLEAN SkipBeforeMemHob;
BOOLEAN SkipAfterMemHob;
EFI_PHYSICAL_ADDRESS HobBaseAddress;
UINT64 HobLength;
EFI_MEMORY_TYPE HobMemoryType;
UINTN TotalPages;
//
// Alignment must be a power of two or zero.
//
ASSERT ((Alignment & (Alignment - 1)) == 0);
if (Pages == 0) {
return NULL;
}
//
// Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not overflow.
//
ASSERT (Pages <= (MAX_ADDRESS - EFI_SIZE_TO_PAGES (Alignment)));
//
// We would rather waste some memory to save PEI code size.
// meaning in addition to the requested size for the aligned mem,
// we simply reserve an overhead memory equal to Alignmemt(page-aligned), no matter what.
// The overhead mem size could be reduced later with more involved malloc mechanisms
// (e.g., somthing that can detect the alignment boundary before allocating memory or
// can request that memory be allocated at a certain address that is aleady aligned).
//
TotalPages = Pages + (Alignment <= EFI_PAGE_SIZE ? 0 : EFI_SIZE_TO_PAGES(Alignment));
Memory = (EFI_PHYSICAL_ADDRESS) (UINTN) InternalAllocatePages (MemoryType, TotalPages);
if (Memory == 0) {
DEBUG((DEBUG_INFO, "Out of memory resource! \n"));
return NULL;
}
DEBUG ((DEBUG_INFO, "Allocated Memory unaligned: Address = 0x%LX, Pages = 0x%X, Type = %d \n", Memory, TotalPages, (UINTN) MemoryType));
//
// Alignment calculation
//
AlignedMemory = Memory;
if (Alignment > EFI_PAGE_SIZE) {
AlignedMemory = ALIGN_VALUE (Memory, Alignment);
}
DEBUG ((DEBUG_INFO, "After aligning to 0x%X bytes: Address = 0x%LX, Pages = 0x%X \n", Alignment, AlignedMemory, Pages));
//
// In general three HOBs cover the total allocated space.
// The aligned portion is covered by the aligned mem HOB and
// the unaligned(to be freed) portions before and after the aligned portion are covered by newly created HOBs.
//
// Before mem HOB covers the region between "Memory" and "AlignedMemory"
// Aligned mem HOB covers the region between "AlignedMemory" and "AlignedMemory + EFI_PAGES_TO_SIZE(Pages)"
// After mem HOB covers the region between "AlignedMemory + EFI_PAGES_TO_SIZE(Pages)" and "Memory + EFI_PAGES_TO_SIZE(TotalPages)"
//
// The before or after mem HOBs need to be skipped under special cases where the aligned portion
// touches either the top or bottom of the original allocated space.
//
SkipBeforeMemHob = FALSE;
SkipAfterMemHob = FALSE;
if (Memory == AlignedMemory) {
SkipBeforeMemHob = TRUE;
}
if ((Memory + EFI_PAGES_TO_SIZE(TotalPages)) == (AlignedMemory + EFI_PAGES_TO_SIZE(Pages))) {
//
// This condition is never met in the current implementation.
// There is always some after-mem since the overhead mem(used in TotalPages)
// is no less than Alignment.
//
SkipAfterMemHob = TRUE;
}
//
// Search for the mem HOB referring to the original(unaligned) allocation
// and update the size and type if needed.
//
Hob.Raw = GetFirstHob (EFI_HOB_TYPE_MEMORY_ALLOCATION);
while (Hob.Raw != NULL) {
if (Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress == Memory) {
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Raw);
}
ASSERT (Hob.Raw != NULL);
if (SkipBeforeMemHob) {
//
// Use this HOB as aligned mem HOB as there is no portion before it.
//
HobLength = EFI_PAGES_TO_SIZE(Pages);
Hob.MemoryAllocation->AllocDescriptor.MemoryLength = HobLength;
} else {
//
// Use this HOB as before mem HOB and create a new HOB for the aligned portion
//
HobLength = (AlignedMemory - Memory);
Hob.MemoryAllocation->AllocDescriptor.MemoryLength = HobLength;
Hob.MemoryAllocation->AllocDescriptor.MemoryType = EfiConventionalMemory;
}
HobBaseAddress = Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress;
HobMemoryType = Hob.MemoryAllocation->AllocDescriptor.MemoryType;
//
// Build the aligned mem HOB if needed
//
if (!SkipBeforeMemHob) {
DEBUG((DEBUG_INFO, "Updated before-mem HOB with BaseAddress = %LX, Length = %LX, MemoryType = %d \n",
HobBaseAddress, HobLength, (UINTN) HobMemoryType));
HobBaseAddress = AlignedMemory;
HobLength = EFI_PAGES_TO_SIZE(Pages);
HobMemoryType = MemoryType;
BuildMemoryAllocationHob (
HobBaseAddress,
HobLength,
HobMemoryType
);
DEBUG((DEBUG_INFO, "Created aligned-mem HOB with BaseAddress = %LX, Length = %LX, MemoryType = %d \n",
HobBaseAddress, HobLength, (UINTN) HobMemoryType));
} else {
if (HobBaseAddress != 0) {
DEBUG((DEBUG_INFO, "Updated aligned-mem HOB with BaseAddress = %LX, Length = %LX, MemoryType = %d \n",
HobBaseAddress, HobLength, (UINTN) HobMemoryType));
}
}
//
// Build the after mem HOB if needed
//
if (!SkipAfterMemHob) {
HobBaseAddress = AlignedMemory + EFI_PAGES_TO_SIZE(Pages);
HobLength = (Memory + EFI_PAGES_TO_SIZE(TotalPages)) - (AlignedMemory + EFI_PAGES_TO_SIZE(Pages));
HobMemoryType = EfiConventionalMemory;
BuildMemoryAllocationHob (
HobBaseAddress,
HobLength,
HobMemoryType
);
DEBUG((DEBUG_INFO, "Created after-mem HOB with BaseAddress = %LX, Length = %LX, MemoryType = %d \n",
HobBaseAddress, HobLength, (UINTN) HobMemoryType));
}
return (VOID *) (UINTN) AlignedMemory;
}
VOID
CEntryPoint (
IN VOID *MemoryBase,
IN UINTN MemorySize,
IN VOID *StackBase,
IN UINTN StackSize
)
{
VOID *HobBase;
// Build a basic HOB list
HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
//Set up Pin muxing.
PadConfiguration ();
// Set up system clocking
ClockInit ();
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
// Initialize CPU cache
InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
// Add memory allocation hob for relocated FD
BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
// Add the FVs to the hob list
BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
// Start talking
UartInit ();
InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
SaveAndSetDebugTimerInterrupt (TRUE);
DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
// Start up a free running timer so that the timer lib will work
TimerInit ();
// SEC phase needs to run library constructors by hand.
ExtractGuidedSectionLibConstructor ();
LzmaDecompressLibConstructor ();
// Build HOBs to pass up our version of stuff the DXE Core needs to save space
BuildPeCoffLoaderHob ();
BuildExtractSectionHob (
&gLzmaCustomDecompressGuid,
LzmaGuidedSectionGetInfo,
LzmaGuidedSectionExtraction
);
// Assume the FV that contains the SEC (our code) also contains a compressed FV.
DecompressFirstFv ();
// Load the DXE Core and transfer control to it
LoadDxeCoreFromFv (NULL, 0);
// DXE Core should always load and never return
ASSERT (FALSE);
}
VOID
MemMapInitialization (
VOID
)
{
//
// Create Memory Type Information HOB
//
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
);
//
// Add PCI IO Port space available for PCI resource allocations.
//
BuildResourceDescriptorHob (
EFI_RESOURCE_IO,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
PcdGet64 (PcdPciIoBase),
PcdGet64 (PcdPciIoSize)
);
//
// Video memory + Legacy BIOS region
//
AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
if (!mXen) {
UINT32 TopOfLowRam;
UINT64 PciExBarBase;
UINT32 PciBase;
UINT32 PciSize;
TopOfLowRam = GetSystemMemorySizeBelow4gb ();
PciExBarBase = 0;
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
// The MMCONFIG area is expected to fall between the top of low RAM and
// the base of the 32-bit PCI host aperture.
//
PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
ASSERT (TopOfLowRam <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
} else {
PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
}
//
// address purpose size
// ------------ -------- -------------------------
// max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)
// 0xFC000000 gap 44 MB
// 0xFEC00000 IO-APIC 4 KB
// 0xFEC01000 gap 1020 KB
// 0xFED00000 HPET 1 KB
// 0xFED00400 gap 111 KB
// 0xFED1C000 gap (PIIX4) / RCRB (ICH9) 16 KB
// 0xFED20000 gap 896 KB
// 0xFEE00000 LAPIC 1 MB
//
PciSize = 0xFC000000 - PciBase;
AddIoMemoryBaseSizeHob (PciBase, PciSize);
PcdSet64 (PcdPciMmio32Base, PciBase);
PcdSet64 (PcdPciMmio32Size, PciSize);
AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);
AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
AddIoMemoryBaseSizeHob (ICH9_ROOT_COMPLEX_BASE, SIZE_16KB);
//
// Note: there should be an
//
// AddIoMemoryBaseSizeHob (PciExBarBase, SIZE_256MB);
//
// call below, just like the one above for RCBA. However, Linux insists
// that the MMCONFIG area be marked in the E820 or UEFI memory map as
// "reserved memory" -- Linux does not content itself with a simple gap
// in the memory map wherever the MCFG ACPI table points to.
//
// This appears to be a safety measure. The PCI Firmware Specification
// (rev 3.1) says in 4.1.2. "MCFG Table Description": "The resources can
// *optionally* be returned in [...] EFIGetMemoryMap as reserved memory
// [...]". (Emphasis added here.)
//
// Normally we add memory resource descriptor HOBs in
// QemuInitializeRam(), and pre-allocate from those with memory
// allocation HOBs in InitializeRamRegions(). However, the MMCONFIG area
// is most definitely not RAM; so, as an exception, cover it with
// uncacheable reserved memory right here.
//
AddReservedMemoryBaseSizeHob (PciExBarBase, SIZE_256MB, FALSE);
BuildMemoryAllocationHob (PciExBarBase, SIZE_256MB,
EfiReservedMemoryType);
}
AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
}
}
/**
Get available system memory below 1MB by specified size.
@param[in] WakeupBufferSize Wakeup buffer size required
@retval other Return wakeup buffer address below 1MB.
@retval -1 Cannot find free memory below 1MB.
**/
UINTN
GetWakeupBuffer (
IN UINTN WakeupBufferSize
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN WakeupBufferStart;
UINTN WakeupBufferEnd;
WakeupBufferSize = (WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1);
//
// Get the HOB list for processing
//
Hob.Raw = GetHobList ();
//
// Collect memory ranges
//
while (!END_OF_HOB_LIST (Hob)) {
if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
(Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
((Hob.ResourceDescriptor->ResourceAttribute &
(EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
)) == 0)
) {
//
// Need memory under 1MB to be collected here
//
WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
if (WakeupBufferEnd > BASE_1MB) {
//
// Wakeup buffer should be under 1MB
//
WakeupBufferEnd = BASE_1MB;
}
while (WakeupBufferEnd > WakeupBufferSize) {
//
// Wakeup buffer should be aligned on 4KB
//
WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
break;
}
if (CheckOverlapWithAllocatedBuffer (WakeupBufferStart, WakeupBufferEnd)) {
//
// If this range is overlapped with existing allocated buffer, skip it
// and find the next range
//
WakeupBufferEnd -= WakeupBufferSize;
continue;
}
DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
WakeupBufferStart, WakeupBufferSize));
//
// Create a memory allocation HOB.
//
BuildMemoryAllocationHob (
WakeupBufferStart,
WakeupBufferSize,
EfiBootServicesData
);
return WakeupBufferStart;
}
}
}
//
// Find the next HOB
//
Hob.Raw = GET_NEXT_HOB (Hob);
}
return (UINTN) -1;
}
/**
This is the entrypoint of PEIM
@param FileHandle Handle of the file being invoked.
@param PeiServices Describes the list of possible PEI Services.
@retval EFI_SUCCESS if it completed successfully.
**/
EFI_STATUS
EFIAPI
CbPeiEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
UINT64 LowMemorySize, HighMemorySize;
UINT64 PeiMemSize = SIZE_64MB; // 64 MB
EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
UINT32 RegEax;
UINT8 PhysicalAddressBits;
VOID* pCbHeader;
VOID* pAcpiTable;
UINT32 AcpiTableSize;
VOID* pSmbiosTable;
UINT32 SmbiosTableSize;
SYSTEM_TABLE_INFO* pSystemTableInfo;
FRAME_BUFFER_INFO FbInfo;
FRAME_BUFFER_INFO* pFbInfo;
ACPI_BOARD_INFO* pAcpiBoardInfo;
UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
LowMemorySize = 0;
HighMemorySize = 0;
Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);
if (EFI_ERROR(Status))
return Status;
DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%lx.\n", LowMemorySize));
DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%lx.\n", HighMemorySize));
ASSERT (LowMemorySize > 0);
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
(EFI_PHYSICAL_ADDRESS)(0),
(UINT64)(0xA0000)
);
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_RESERVED,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
(EFI_PHYSICAL_ADDRESS)(0xA0000),
(UINT64)(0x60000)
);
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
(EFI_PHYSICAL_ADDRESS)(0x100000),
(UINT64) (LowMemorySize - 0x100000)
);
if (HighMemorySize > 0) {
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
(EFI_PHYSICAL_ADDRESS)(0x100000000ULL),
HighMemorySize
);
}
//
// Should be 64k aligned
//
PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
Status = PeiServicesInstallPeiMemory (
PeiMemBase,
PeiMemSize
);
ASSERT_EFI_ERROR (Status);
//
// Set cache on the physical memory
//
MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
//
// Create Memory Type Information HOB
//
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
);
//
// Create Fv hob
//
CbPeiReportRemainedFvs ();
BuildMemoryAllocationHob (
PcdGet32 (PcdPayloadFdMemBase),
PcdGet32 (PcdPayloadFdMemSize),
EfiBootServicesData
);
//
// Build CPU memory space and IO space hob
//
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
} else {
PhysicalAddressBits = 36;
}
//
// Create a CPU hand-off information
//
BuildCpuHob (PhysicalAddressBits, 16);
//
// Report Local APIC range
//
BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
//
// Boot mode
//
Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
ASSERT_EFI_ERROR (Status);
Status = PeiServicesInstallPpi (mPpiBootMode);
ASSERT_EFI_ERROR (Status);
//
// Set pcd to save the upper coreboot header in case the dxecore will
// erase 0~4k memory
//
pCbHeader = NULL;
if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
&& ((UINTN)pCbHeader > BASE_4KB)) {
DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
PcdSet32 (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
}
//
// Create guid hob for system tables like acpi table and smbios table
//
pAcpiTable = NULL;
AcpiTableSize = 0;
pSmbiosTable = NULL;
SmbiosTableSize = 0;
Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
if (EFI_ERROR (Status)) {
// ACPI table is oblidgible
DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
ASSERT (FALSE);
}
CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
pSystemTableInfo = NULL;
pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
ASSERT (pSystemTableInfo != NULL);
pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
pSystemTableInfo->AcpiTableSize = AcpiTableSize;
pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
//
// Create guid hob for acpi board information
//
Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue);
ASSERT_EFI_ERROR (Status);
pAcpiBoardInfo = NULL;
pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
ASSERT (pAcpiBoardInfo != NULL);
pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
//
// Create guid hob for frame buffer information
//
ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
Status = CbParseFbInfo (&FbInfo);
if (!EFI_ERROR (Status)) {
pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
ASSERT (pSystemTableInfo != NULL);
CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
}
//
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
return EFI_SUCCESS;
}
/**
The purpose of the service is to publish an interface that allows
PEIMs to allocate memory ranges that are managed by the PEI Foundation.
@param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
@param MemoryType The type of memory to allocate.
@param Pages The number of contiguous 4 KB pages to allocate.
@param Memory Pointer to a physical address. On output, the address is set to the base
of the page range that was allocated.
@retval EFI_SUCCESS The memory range was successfully allocated.
@retval EFI_OUT_OF_RESOURCES The pages could not be allocated.
@retval EFI_INVALID_PARAMETER Type is not equal to EfiLoaderCode, EfiLoaderData, EfiRuntimeServicesCode,
EfiRuntimeServicesData, EfiBootServicesCode, EfiBootServicesData,
EfiACPIReclaimMemory, or EfiACPIMemoryNVS.
**/
EFI_STATUS
EFIAPI
PeiAllocatePages (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN EFI_MEMORY_TYPE MemoryType,
IN UINTN Pages,
OUT EFI_PHYSICAL_ADDRESS *Memory
)
{
PEI_CORE_INSTANCE *PrivateData;
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS *FreeMemoryTop;
EFI_PHYSICAL_ADDRESS *FreeMemoryBottom;
UINTN RemainingPages;
if ((MemoryType != EfiLoaderCode) &&
(MemoryType != EfiLoaderData) &&
(MemoryType != EfiRuntimeServicesCode) &&
(MemoryType != EfiRuntimeServicesData) &&
(MemoryType != EfiBootServicesCode) &&
(MemoryType != EfiBootServicesData) &&
(MemoryType != EfiACPIReclaimMemory) &&
(MemoryType != EfiACPIMemoryNVS)) {
return EFI_INVALID_PARAMETER;
}
PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices);
Hob.Raw = PrivateData->HobList.Raw;
//
// Check if Hob already available
//
if (!PrivateData->PeiMemoryInstalled) {
//
// When PeiInstallMemory is called but temporary memory has *not* been moved to temporary memory,
// the AllocatePage will depend on the field of PEI_CORE_INSTANCE structure.
//
if (!PrivateData->SwitchStackSignal) {
return EFI_NOT_AVAILABLE_YET;
} else {
FreeMemoryTop = &(PrivateData->FreePhysicalMemoryTop);
FreeMemoryBottom = &(PrivateData->PhysicalMemoryBegin);
}
} else {
FreeMemoryTop = &(Hob.HandoffInformationTable->EfiFreeMemoryTop);
FreeMemoryBottom = &(Hob.HandoffInformationTable->EfiFreeMemoryBottom);
}
//
// Check to see if on 4k boundary, If not aligned, make the allocation aligned.
//
*(FreeMemoryTop) -= *(FreeMemoryTop) & 0xFFF;
//
// Verify that there is sufficient memory to satisfy the allocation
//
RemainingPages = EFI_SIZE_TO_PAGES ((UINTN) (*FreeMemoryTop - *FreeMemoryBottom));
//
// For page allocation, the overhead sizeof (EFI_HOB_MEMORY_ALLOCATION) needs one extra page.
// So the number of remaining pages needs to be greater than that of the request pages.
//
if (RemainingPages <= Pages) {
DEBUG ((EFI_D_ERROR, "AllocatePages failed: No 0x%lx Pages is available.\n", (UINT64) Pages));
DEBUG ((EFI_D_ERROR, "There is only left 0x%lx pages memory resource to be allocated.\n", (UINT64) RemainingPages));
return EFI_OUT_OF_RESOURCES;
} else {
//
// Update the PHIT to reflect the memory usage
//
*(FreeMemoryTop) -= Pages * EFI_PAGE_SIZE;
//
// Update the value for the caller
//
*Memory = *(FreeMemoryTop);
//
// Create a memory allocation HOB.
//
BuildMemoryAllocationHob (
*(FreeMemoryTop),
Pages * EFI_PAGE_SIZE,
MemoryType
);
return EFI_SUCCESS;
}
}
