static WRITE8_DEVICE_HANDLER( ddribble_vlm5030_ctrl_w )
{
ddribble_state *state = device->machine->driver_data<ddribble_state>();
UINT8 *SPEECH_ROM = device->machine->region("vlm")->base();
/* b7 : vlm data bus OE */
/* b6 : VLM5030-RST */
vlm5030_rst(device, data & 0x40 ? 1 : 0);
/* b5 : VLM5030-ST */
vlm5030_st(device, data & 0x20 ? 1 : 0);
/* b4 : VLM5300-VCU */
vlm5030_vcu(device, data & 0x10 ? 1 : 0);
/* b3 : ROM bank select */
vlm5030_set_rom(device, &SPEECH_ROM[data & 0x08 ? 0x10000 : 0]);
/* b2 : SSG-C rc filter enable */
filter_rc_set_RC(state->filter3, FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x04 ? CAP_N(150) : 0); /* YM2203-SSG-C */
/* b1 : SSG-B rc filter enable */
filter_rc_set_RC(state->filter2, FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x02 ? CAP_N(150) : 0); /* YM2203-SSG-B */
/* b0 : SSG-A rc filter enable */
filter_rc_set_RC(state->filter1, FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x01 ? CAP_N(150) : 0); /* YM2203-SSG-A */
}
static WRITE8_HANDLER( ddrible_vlm5030_ctrl_w )
{
UINT8 *SPEECH_ROM = memory_region(REGION_SOUND1);
/* b7 : vlm data bus OE */
/* b6 : VLM5030-RST */
/* b5 : VLM5030-ST */
/* b4 : VLM5300-VCU */
/* b3 : ROM bank select */
if (sndti_exists(SOUND_VLM5030, 0))
{
VLM5030_RST( data & 0x40 ? 1 : 0 );
VLM5030_ST( data & 0x20 ? 1 : 0 );
VLM5030_VCU( data & 0x10 ? 1 : 0 );
VLM5030_set_rom(&SPEECH_ROM[data & 0x08 ? 0x10000 : 0]);
}
/* b2 : SSG-C rc filter enable */
/* b1 : SSG-B rc filter enable */
/* b0 : SSG-A rc filter enable */
if (sndti_exists(SOUND_FILTER_RC, 2))
{
filter_rc_set_RC(2,FLT_RC_LOWPASS, 1000,2200,1000,data & 0x04 ? CAP_N(150) : 0); /* YM2203-SSG-C */
filter_rc_set_RC(1,FLT_RC_LOWPASS, 1000,2200,1000,data & 0x02 ? CAP_N(150) : 0); /* YM2203-SSG-B */
filter_rc_set_RC(0,FLT_RC_LOWPASS, 1000,2200,1000,data & 0x01 ? CAP_N(150) : 0); /* YM2203-SSG-A */
}
}
void abc77_device::device_reset()
{
int t = 1.1 * RES_K(100) * CAP_N(100) * 1000; // t = 1.1 * R1 * C1
int ea = BIT(ioport("DSW")->read(), 7);
// trigger reset
device_set_input_line(m_maincpu, INPUT_LINE_RESET, ASSERT_LINE);
m_reset_timer->adjust(attotime::from_msec(t));
device_set_input_line(m_maincpu, MCS48_INPUT_EA, ea ? CLEAR_LINE : ASSERT_LINE);
}
void abc77_device::device_reset()
{
int t = 1.1 * RES_K(100) * CAP_N(100) * 1000; // t = 1.1 * R1 * C1
int ea = BIT(m_dsw->read(), 7);
// trigger reset
m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_reset_timer->adjust(attotime::from_msec(t));
m_maincpu->set_input_line(MCS48_INPUT_EA, ea ? CLEAR_LINE : ASSERT_LINE);
m_slot->write_rx(1);
}
void n8080_state::spacefev_sound(machine_config &config)
{
MCFG_SOUND_START_OVERRIDE(n8080_state,spacefev)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,spacefev)
/* basic machine hardware */
I8035(config, m_audiocpu, 6000000);
m_audiocpu->set_addrmap(AS_PROGRAM, &n8080_state::n8080_sound_cpu_map);
m_audiocpu->t0_in_cb().set(FUNC(n8080_state::n8080_8035_t0_r));
m_audiocpu->t1_in_cb().set(FUNC(n8080_state::n8080_8035_t1_r));
m_audiocpu->p1_in_cb().set(FUNC(n8080_state::n8080_8035_p1_r));
m_audiocpu->p2_out_cb().set(FUNC(n8080_state::n8080_dac_w));
TIMER(config, "vco_timer").configure_periodic(FUNC(n8080_state::spacefev_vco_voltage_timer), attotime::from_hz(1000));
/* sound hardware */
SPEAKER(config, "speaker").front_center();
DAC_1BIT(config, m_n8080_dac, 0).add_route(ALL_OUTPUTS, "speaker", 0.15);
voltage_regulator_device &vref(VOLTAGE_REGULATOR(config, "vref", 0));
vref.add_route(0, "n8080_dac", 1.0, DAC_VREF_POS_INPUT);
SN76477(config, m_sn);
m_sn->set_noise_params(RES_K(36), RES_K(150), CAP_N(1));
m_sn->set_decay_res(RES_M(1));
m_sn->set_attack_params(CAP_U(1.0), RES_K(20));
m_sn->set_amp_res(RES_K(150));
m_sn->set_feedback_res(RES_K(47));
m_sn->set_vco_params(0, CAP_N(1), RES_M(1.5));
m_sn->set_pitch_voltage(0);
m_sn->set_slf_params(CAP_N(47), RES_M(1));
m_sn->set_oneshot_params(CAP_N(47), RES_K(820));
m_sn->set_vco_mode(0);
m_sn->set_mixer_params(0, 0, 0);
m_sn->set_envelope_params(1, 0);
m_sn->set_enable(1);
m_sn->add_route(ALL_OUTPUTS, "speaker", 0.35);
}
#define HEADON_BONUS_EN NODE_07
#define HEADON_COMP_CAR_OUT NODE_200
#define HEADON_PLAYER_CAR_OUT NODE_201
#define HEADON_CRASH_OUT NODE_202
#define HEADON_SCREECH1_OUT NODE_203
#define HEADON_SCREECH2_OUT NODE_204
#define HEADON_BONUS_OUT NODE_205
static const discrete_mixer_desc headon_mixer =
{
DISC_MIXER_IS_RESISTOR,
{RES_K(130), RES_K(130), RES_K(100), RES_K(100), RES_K(100), RES_K(10)}, // 130 = 390/3, Bonus Res is dummy
{0,0,0,0,0}, // no variable resistors
{0,0,0,0,CAP_N(470),0},
0, RES_K(100),
0,
CAP_U(1), // not in schematics, used to suppress DC
0, 1
};
static const discrete_mixer_desc headon_crash_mixer =
{
DISC_MIXER_IS_OP_AMP,
{RES_K(50), RES_K(10)}, // Resistors, in fact variable resistors (100k)
{0,0,0,0,0}, // no variable resistors
{CAP_N(100),CAP_U(1)},
0, RES_K(100),
0,
CAP_U(1)*0, // not in schematics, used to suppress DC
//-------------------------------------------------
// DISCRETE_SOUND_START( v1050kb )
//-------------------------------------------------
static const discrete_555_desc v1050_ne555 =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static DISCRETE_SOUND_START( v1050kb )
DISCRETE_INPUT_LOGIC(NODE_01)
DISCRETE_555_ASTABLE(NODE_02, NODE_01, RES_K(68) /* can't read on schematic */ , RES_K(3), CAP_N(10), &v1050_ne555)
DISCRETE_OUTPUT(NODE_02, 5000)
DISCRETE_SOUND_END
//-------------------------------------------------
// MACHINE_DRIVER( v1050_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( v1050_keyboard )
MCFG_CPU_ADD(I8049_TAG, I8049, XTAL_4_608MHz)
MCFG_CPU_IO_MAP(v1050_keyboard_io)
MCFG_DEVICE_DISABLE() // TODO
// discrete sound
MCFG_SPEAKER_STANDARD_MONO("mono")
static const discrete_dss_inverter_osc_node::description dkong_inverter_osc_desc_jump =
{
DEFAULT_CD40XX_VALUES(DK_SUP_V),
discrete_dss_inverter_osc_node::IS_TYPE1
};
static const discrete_dss_inverter_osc_node::description dkong_inverter_osc_desc_walk =
{
DEFAULT_CD40XX_VALUES(DK_SUP_V),
discrete_dss_inverter_osc_node::IS_TYPE2
};
static const discrete_op_amp_filt_info dkong_sallen_key_info =
{
RES_K(5.6), RES_K(5.6), 0, 0, 0,
CAP_N(22), CAP_N(10), 0
};
#if DK_USE_CUSTOM
/************************************************************************
*
* Custom dkong mixer
*
* input[0] - In1 (Logic)
* input[1] - In2
* input[2] - R1
* input[3] - R2
* input[4] - R3
* input[5] - R4
* input[6] - C
* input[7] - B+
PARAM(V.FUNC, "T * 5e6")
#endif
MOSFET(P, "PMOS(VTO=-0.5 GAMMA=0.5 TOX=20n)")
MOSFET(M, "NMOS(VTO=0.5 GAMMA=0.5 TOX=20n)")
RES(RG, 1)
NET_C(P.S, V5)
NET_C(P.D, M.D)
#if (USE_CLOCK)
NET_C(GND, M.S)
NET_C(V.Q, RG.1)
#else
NET_C(GND, M.S, V.N)
NET_C(V.P, RG.1)
#endif
NET_C(RG.2, M.G, P.G)
// capacitance over D - S
#if 0
CAP(C, CAP_N(1))
NET_C(M.D, C.1)
NET_C(M.S, C.2)
#endif
#if 1
LOG(log_G, M.G)
LOG(log_D, M.D)
LOGD(log_X, RG.1, RG.2)
#endif
NETLIST_END()
/* sound hardware */
static DISCRETE_SOUND_START( hec2hrp )
DISCRETE_INPUT_LOGIC(NODE_01)
DISCRETE_OUTPUT(NODE_01, 5000)
DISCRETE_SOUND_END
MACHINE_CONFIG_FRAGMENT( hector_audio )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(0, "mono", 0.25) /* Sound level for cassette, as it is in mono => output channel=0*/
MCFG_SOUND_ADD("sn76477", SN76477, 0)
MCFG_SN76477_NOISE_PARAMS(RES_K(47), RES_K(330), CAP_P(390)) // noise + filter
MCFG_SN76477_DECAY_RES(RES_K(680)) // decay_res
MCFG_SN76477_ATTACK_PARAMS(CAP_U(47), RES_K(180)) // attack_decay_cap + attack_res
MCFG_SN76477_AMP_RES(RES_K(33)) // amplitude_res
MCFG_SN76477_FEEDBACK_RES(RES_K(100)) // feedback_res
MCFG_SN76477_VCO_PARAMS(2, CAP_N(47), RES_K(1000)) // VCO volt + cap + res
MCFG_SN76477_PITCH_VOLTAGE(2) // pitch_voltage
MCFG_SN76477_SLF_PARAMS(CAP_U(0.1), RES_K(180)) // slf caps + res
MCFG_SN76477_ONESHOT_PARAMS(CAP_U(1.00001), RES_K(10000)) // oneshot caps + res
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.1)
MCFG_SOUND_ADD("discrete", DISCRETE, 0) /* Son 1bit*/
MCFG_DISCRETE_INTF(hec2hrp)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
void hec2hrp_state::Init_Value_SN76477_Hector()
{
/* Remplissage des valeurs de resistance et capacite d'Hector*/
/* Decay R*/
m_Pin_Value[7][1] = RES_K(680.0); /*680K */
m_Pin_Value[7][0] = RES_K(252.325); /* 142.325 (680 // 180KOhm)*/
/* Capa A/D*/
m_Pin_Value[8][0] = CAP_U(0.47); /* 0.47uf*/
m_Pin_Value[8][1] = CAP_U(1.47); /* 1.47*/
/* ATTACK R*/
m_Pin_Value[10][1]= RES_K(180.0); /* 180*/
m_Pin_Value[10][0]= RES_K(32.054); /* 32.054 (180 // 39 KOhm)*/
/* Version 3 : Ajuste pour les frequences mesurees :
// 4 0 SOUND 255 Hz => ajuste a l'oreille
// 4 4 SOUND 65 Hz => ajuste a l'oreille
// 4 8 SOUND 17 Hz => ajuste a l'oreille
// 4 12 SOUND 4,3 Hz => ajuste a l'oreille*/
/* SLF C Version 3*/
m_Pin_Value[21][0]= CAP_U(0.1); /*CAPU(0.1) */
m_Pin_Value[21][1]= CAP_U(1.1); /*1.1*/
/*SLF R Version 3*/
m_Pin_Value[20][1]= RES_K(180); //180 vu
m_Pin_Value[20][0]= RES_K(37.268); //37.268 (47//180 KOhms)
/* Capa VCO*/
/* Version 3 : Ajust?? pour les frequences mesur??es :
// 0 0 SOUND 5,5KHz => 5,1KHz
// 0 16 SOUND 1,3KHz => 1,2KHz
// 0 32 SOUND 580Hz => 570Hz
// 0 48 SOUND 132Hz => 120Hz*/
m_Pin_Value[17][0] = CAP_N(47.0) ; /*47,0 mesure ok */
m_Pin_Value[17][1] = CAP_N(580.0) ; /*580 mesure ok */
/* R VCO Version 3*/
m_Pin_Value[18][1] = RES_K(1400.0 );/*1300 mesure ok // au lieu de 1Mohm*/
m_Pin_Value[18][0] = RES_K( 203.548 );/*223 mesure ok // au lieu de 193.548 (1000 // 240KOhm)*/
/* VCO Controle*/
m_Pin_Value[16][0] = 0.0; /* Volts */
m_Pin_Value[16][1] = 1.41; /* 2 = 10/15eme de 5V*/
/* Pitch*/
m_Pin_Value[19][0] = 0.0; /*Volts */
m_Pin_Value[19][1] = 1.41;
m_Pin_Value[22][0] = 0; /* TOR */
m_Pin_Value[22][1] = 1;
/* R OneShot*/
m_Pin_Value[24][1] = RES_K(100);
m_Pin_Value[24][0] = RES_K(1000); /*RES_M(1) infini sur Hector car non connectee*/
/* Capa OneShot*/
m_Pin_Value[23][0] = 1.0;
m_Pin_Value[23][1] = 0.0; /* Valeur Bidon sur Hector car mise au 5Volts sans capa*/
/* Enabled*/
m_Pin_Value[9][0] = 0;
m_Pin_Value[9][1] = 1;
/* Volume*/
m_Pin_Value[11][0] = 128; /* Rapport 50% et 100% 128*/
m_Pin_Value[11][1] = 255; /* 255*/
/* Noise filter*/
m_Pin_Value[6][0] = CAP_U(0.390); /* 0.390*/
m_Pin_Value[6][1] = CAP_U(08.60); /* 0.48*/
/* Valeur corrige par rapport au schema :*/
m_Pin_Value[5][1] = RES_K(3.30 ) ; /* 330Kohm*/
m_Pin_Value[5][0] = RES_K(1.76 ) ; /* 76 Kohm*/
/* Noise pas commande par le bus audio !*/
/* Seule la valeur [0] est documentee !*/
m_Pin_Value[4][0] = RES_K(47) ; /* 47 K ohm*/
m_Pin_Value[12][0] = RES_K(100); /* 100K ohm*/
m_Pin_Value[3][0] = 0 ; /* NC*/
/* Gestion du type d'enveloppe*/
m_Pin_Value[ 1][0] = 0;
m_Pin_Value[ 1][1] = 1;
m_Pin_Value[28][0] = 0;
m_Pin_Value[28][1] = 1;
/* Initialisation a 0 des pin du SN*/
m_AU[0]=0;
m_AU[1]=0;
m_AU[2]=0;
m_AU[3]=0;
m_AU[4]=0;
m_AU[5]=0;
m_AU[6]=0;
m_AU[7]=0;
m_AU[8]=0;
m_AU[9]=0;
m_AU[10]=0;
m_AU[11]=0;
m_AU[12]=0;
m_AU[13]=0;
m_AU[14]=0;
m_AU[15]=0;
m_ValMixer = 0;
}
// TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0 // SHEET NAME:/ // IGNORED O_AUDIO0: O_AUDIO0 49 0 // .END /* * Workaround: The simplified opamp model does not correctly * model the internals of the inputs. */ ANALOG_INPUT(VWORKAROUND, 2.061) RES(RWORKAROUND, RES_K(27)) NET_C(VWORKAROUND.Q, RWORKAROUND.1) NET_C(XU1.6, RWORKAROUND.2) CAP(C200, CAP_N(100)) CAP(C28, CAP_U(1)) CAP(C31, CAP_N(470)) CAP(C32, CAP_N(3.3)) CAP(C33, CAP_U(1)) CAP(C34, CAP_N(1)) CAP(C35, CAP_N(1)) CAP(C36, CAP_N(6.5)) CAP(C37, CAP_N(22)) CAP(C38, CAP_N(1)) CAP(C39, CAP_N(1)) CAP(C40, CAP_P(12)) CAP(C41, CAP_U(1)) CAP(C42, CAP_N(1.2)) CAP(C43, CAP_N(1.2)) CAP(C44, CAP_U(1))
***************************************************************************/
#include "emu.h"
#include "cpu/mcs48/mcs48.h"
#include "sound/sn76477.h"
#include "sound/dac.h"
#include "includes/n8080.h"
static const double ATTACK_RATE = 10e-6 * 500;
static const double DECAY_RATE = 10e-6 * 16000;
static const sn76477_interface sheriff_sn76477_interface =
{
RES_K(36) , /* 04 */
RES_K(100) , /* 05 */
CAP_N(1) , /* 06 */
RES_K(620) , /* 07 */
CAP_U(1) , /* 08 */
RES_K(20) , /* 10 */
RES_K(150) , /* 11 */
RES_K(47) , /* 12 */
0 , /* 16 */
CAP_N(1) , /* 17 */
RES_M(1.5) , /* 18 */
0 , /* 19 */
RES_M(1.5) , /* 20 */
CAP_N(47) , /* 21 */
CAP_N(47) , /* 23 */
RES_K(560) , /* 24 */
0, /* 22 vco */
0, /* 26 mixer A */
DISCRETE_INPUTX_STREAM(NODE_02, 1, 5.0, 0)
DISCRETE_INPUTX_STREAM(NODE_03, 2, 5.0, 0)
DISCRETE_INPUTX_STREAM(NODE_04, 3, 1.0, 0)
DISCRETE_INPUT_DATA(NODE_11)
DISCRETE_INPUT_DATA(NODE_12)
DISCRETE_INPUT_DATA(NODE_13)
DISCRETE_RCFILTER_SW(NODE_21, 1, NODE_01, NODE_11, 1000, CAP_U(0.22), 0, 0, 0)
DISCRETE_RCFILTER_SW(NODE_22, 1, NODE_02, NODE_12, 1000, CAP_U(0.22), 0, 0, 0)
DISCRETE_RCFILTER_SW(NODE_23, 1, NODE_03, NODE_13, 1000, CAP_U(0.22), 0, 0, 0)
DISCRETE_MIXER3(NODE_30, 1, NODE_21, NODE_22, NODE_23, &ironhors_mixer_desc)
DISCRETE_RCFILTER(NODE_31,NODE_04, RES_K(1), CAP_N(33) )
DISCRETE_MIXER2(NODE_33, 1, NODE_30, NODE_31, &ironhors_mixer_desc_final)
DISCRETE_OUTPUT(NODE_33, 5.0 )
DISCRETE_SOUND_END
/*************************************
*
* Machine driver
*
*************************************/
void ironhors_state::machine_start()
{
save_item(NAME(m_palettebank));
#if 1 OPTIMIZE_FRONTIER(C51.1, RES_K(20), 50) OPTIMIZE_FRONTIER(R77.2, RES_K(20), 50) OPTIMIZE_FRONTIER(C25.2, RES_K(240), 50) OPTIMIZE_FRONTIER(C29.2, RES_K(390), 50) OPTIMIZE_FRONTIER(C37.2, RES_K(390), 50) OPTIMIZE_FRONTIER(C44.2, RES_K(200), 50) OPTIMIZE_FRONTIER(R90.2, RES_K(100), 50) OPTIMIZE_FRONTIER(R92.2, RES_K(15), 50) #endif NETLIST_END() NETLIST_START(CongoBongo_schematics) CAP(C20, CAP_N(68)) CAP(C21, CAP_U(1)) CAP(C22, CAP_U(47)) CAP(C23, CAP_N(100)) CAP(C24, CAP_N(100)) CAP(C25, CAP_U(1)) CAP(C26, CAP_N(68)) CAP(C27, CAP_N(33)) CAP(C28, CAP_U(47)) CAP(C29, CAP_U(1)) CAP(C30, CAP_N(33)) CAP(C31, CAP_N(33)) CAP(C32, CAP_N(68)) CAP(C33, CAP_N(33)) CAP(C34, CAP_U(47)) CAP(C35, CAP_N(33))
}
else
if (m_out_offs < 0x77)
{
if (m_p_ram[m_out_offs])
m_samples->start(1, 0); // bumpers
}
else
m_out_offs = 0xff;
}
static const sn76477_interface sn76477_intf =
{
RES_M(1000), /* 4 noise_res */
RES_M(1000), /* 5 filter_res */
CAP_N(0), /* 6 filter_cap */
RES_K(470), /* 7 decay_res */
CAP_N(1), /* 8 attack_decay_cap */
RES_K(22), /* 10 attack_res */
RES_K(100), /* 11 amplitude_res */
RES_K(52), /* 12 feedback_res */
5.0, /* 16 vco_voltage */
CAP_U(0.01), /* 17 vco_cap */
RES_K(390), /* 18 vco_res */
0.0, /* 19 pitch_voltage */
RES_M(1), /* 20 slf_res */
CAP_U(0.1), /* 21 slf_cap */
CAP_U(0.47), /* 23 oneshot_cap */
RES_K(470), /* 24 oneshot_res */
0, /* 22 vco (variable) */
0, /* 26 mixer A (grounded) */
};
static struct DACinterface n8080_dac_interface =
{
1, { 30 }
};
struct SN76477interface sheriff_sn76477_interface =
{
1,
{ 35 },
{ RES_K(36) }, /* 04 */
{ RES_K(100) }, /* 05 */
{ CAP_N(1) }, /* 06 */
{ RES_K(620) }, /* 07 */
{ CAP_U(1) }, /* 08 */
{ RES_K(20) }, /* 10 */
{ RES_K(150) }, /* 11 */
{ RES_K(47) }, /* 12 */
{ 0 }, /* 16 */
{ CAP_N(1) }, /* 17 */
{ RES_M(1.5) }, /* 18 */
{ 0 }, /* 19 */
{ RES_M(1.5) }, /* 20 */
{ CAP_N(47) }, /* 21 */
{ CAP_N(47) }, /* 23 */
{ RES_K(560) }, /* 24 */
};
}
WRITE8_MEMBER(bladestl_state::bladestl_sh_irqtrigger_w)
{
soundlatch_byte_w(space, offset, data);
m_audiocpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
//logerror("(sound) write %02x\n", data);
}
WRITE8_MEMBER(bladestl_state::bladestl_port_B_w)
{
// bits 3-5 = ROM bank select
m_upd7759->set_bank_base(((data & 0x38) >> 3) * 0x20000);
// bit 2 = SSG-C rc filter enable
m_filter3->filter_rc_set_RC(FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x04 ? CAP_N(150) : 0); /* YM2203-SSG-C */
// bit 1 = SSG-B rc filter enable
m_filter2->filter_rc_set_RC(FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x02 ? CAP_N(150) : 0); /* YM2203-SSG-B */
// bit 0 = SSG-A rc filter enable
m_filter1->filter_rc_set_RC(FLT_RC_LOWPASS, 1000, 2200, 1000, data & 0x01 ? CAP_N(150) : 0); /* YM2203-SSG-A */
}
READ8_MEMBER(bladestl_state::bladestl_speech_busy_r)
{
return m_upd7759->busy_r() ? 1 : 0;
}
WRITE8_MEMBER(bladestl_state::bladestl_speech_ctrl_w)
{
//-------------------------------------------------
// DISCRETE_SOUND( abc77 )
//-------------------------------------------------
static const discrete_555_desc abc77_ne556_a =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static DISCRETE_SOUND_START( abc77 )
DISCRETE_INPUT_LOGIC(NODE_01)
DISCRETE_555_ASTABLE(NODE_02, NODE_01, RES_K(2.7), RES_K(15), CAP_N(22), &abc77_ne556_a)
DISCRETE_OUTPUT(NODE_02, 5000)
DISCRETE_SOUND_END
//-------------------------------------------------
// MACHINE_DRIVER( abc77 )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( abc77 )
// keyboard cpu
MCFG_CPU_ADD(I8035_TAG, I8035, XTAL_4_608MHz)
MCFG_CPU_PROGRAM_MAP(abc77_map)
MCFG_CPU_IO_MAP(abc77_io)
// watchdog
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
MCFG_CPU_IO_MAP(n8080_sound_io_map)
MCFG_TIMER_DRIVER_ADD_PERIODIC("vco_timer", n8080_state, spacefev_vco_voltage_timer, attotime::from_hz(1000))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DAC_ADD("dac")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MCFG_SOUND_ADD("snsnd", SN76477, 0)
MCFG_SN76477_NOISE_PARAMS(RES_K(36), RES_K(150), CAP_N(1)) // noise + filter
MCFG_SN76477_DECAY_RES(RES_M(1)) // decay_res
MCFG_SN76477_ATTACK_PARAMS(CAP_U(1.0), RES_K(20)) // attack_decay_cap + attack_res
MCFG_SN76477_AMP_RES(RES_K(150)) // amplitude_res
MCFG_SN76477_FEEDBACK_RES(RES_K(47)) // feedback_res
MCFG_SN76477_VCO_PARAMS(0, CAP_N(1), RES_M(1.5)) // VCO volt + cap + res
MCFG_SN76477_PITCH_VOLTAGE(0) // pitch_voltage
MCFG_SN76477_SLF_PARAMS(CAP_N(47), RES_M(1)) // slf caps + res
MCFG_SN76477_ONESHOT_PARAMS(CAP_N(47), RES_K(820)) // oneshot caps + res
MCFG_SN76477_VCO_MODE(0) // VCO mode
MCFG_SN76477_MIXER_PARAMS(0, 0, 0) // mixer A, B, C
MCFG_SN76477_ENVELOPE_PARAMS(1, 0) // envelope 1, 2
MCFG_SN76477_ENABLE(1) // enable
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.35)
MACHINE_CONFIG_END
DISC_LFSR_IN0, /* F1 is 1*F0*/
DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
0x000001, /* Everything is shifted into the first bit only */
1, /* Output is inverted Q of LS74*/
16 /* Output bit */
};
static const discrete_dac_r1_ladder spiders_fire_dac =
{
1,
{RES_K(10)}, // R29
5, // 555 Vcc
RES_K(5), // 555 internal
RES_K(10), // 555 internal
CAP_N(100) // C100
};
static const discrete_dac_r1_ladder spiders_web_exp_dac =
{
1,
{RES_K(10)}, // R44
5, // 555 Vcc
RES_K((5*2.2)/(5+2.2)), // 555 internal (5k) // R49 (2.2k)
RES_K(10), // 555 internal
CAP_U(0.01) // C25
};
// IC 10
static const discrete_555_desc spiders_fire_555a =
{
NET_C(R17.1, V5) NET_C(R17.2, D1.A, C14.1) NET_C(D1.K, 2H_A.RC) NET_C(C14.2, 2H_A.C) RES(R6, RES_K(4.7)) /* verified */ CAP(C3, CAP_U(10)) /* verified */ NET_C(1H_A.Q, R6.1) NET_C(R6.2, C3.1, 1J_A.FC) NET_C(R6.2, 2J_A.FC) NET_C(C3.2, GND) //#define MR_C6 CAP_N(3.9) /* verified */ SN74LS629(1J_A, CAP_N(3.9)) NET_C(1J_A.RNG, V5) NET_C(1J_A.ENQ, ttllow) NET_C(GND, 1J_A.GND) //#define MR_C17 CAP_N(22) /* verified */ SN74LS629(2J_A, CAP_N(22)) NET_C(2J_A.RNG, V5) NET_C(2J_A.ENQ, ttllow) NET_C(GND, 2J_A.GND) TTL_7486_XOR(1K_A, 1J_A.Y, 2J_A.Y) TTL_7408_AND(2K_A, 2H_A.Q, 1K_A) NETLIST_END()
