void erts_abort_staging_code_ix(void)
{
beam_catches_end_staging(0);
export_end_staging(0);
module_end_staging(0);
erts_end_staging_ranges(0);
CIX_TRACE("abort");
}
void erts_end_staging_code_ix(void)
{
beam_catches_end_staging(1);
export_end_staging(1);
module_end_staging(1);
erts_end_staging_ranges(1);
CIX_TRACE("end");
}
void erts_start_staging_code_ix(void)
{
beam_catches_start_staging();
export_start_staging();
module_start_staging();
erts_start_staging_ranges();
CIX_TRACE("start");
}
void erts_code_ix_init(void)
{
/* We start emulator by initializing preloaded modules
* single threaded with active and staging set both to zero.
* Preloading is finished by a commit that will set things straight.
*/
erts_smp_atomic32_init_nob(&the_active_code_index, 0);
erts_smp_atomic32_init_nob(&the_staging_code_index, 0);
erts_smp_mtx_init(&the_code_ix_queue_lock, "code_ix_queue");
CIX_TRACE("init");
}
void erts_commit_staging_code_ix(void)
{
ErtsCodeIndex ix;
/* We need to this lock as we are now making the staging export table active */
export_staging_lock();
ix = erts_staging_code_ix();
erts_smp_atomic32_set_nob(&the_active_code_index, ix);
ix = (ix + 1) % ERTS_NUM_CODE_IX;
erts_smp_atomic32_set_nob(&the_staging_code_index, ix);
export_staging_unlock();
CIX_TRACE("activate");
}
void erts_code_ix_init(void)
{
/* We start emulator by initializing preloaded modules
* single threaded with active and staging set both to zero.
* Preloading is finished by a commit that will set things straight.
*/
erts_smp_atomic32_init_nob(&the_active_code_index, 0);
erts_smp_atomic32_init_nob(&the_staging_code_index, 0);
erts_smp_mtx_init(&code_write_permission_mtx, "code_write_permission");
#ifdef ERTS_ENABLE_LOCK_CHECK
erts_tsd_key_create(&has_code_write_permission,
"erts_has_code_write_permission");
#endif
CIX_TRACE("init");
}
