void clock_init(void) { uint32_t timeout; /* Disable watchdog */ WDT_MR = BV(WDT_WDDIS); /* Set wait states for flash access, needed for higher CPU clock rates */ EEFC0_FMR = EEFC_FMR_FWS(3); #ifdef EEFC1_FMR EEFC1_FMR = EEFC_FMR_FWS(3); #endif // Initialize main oscillator if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL))) { CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8) | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout); } // Switch to external oscillator CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8) | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN) | BV(CKGR_MOR_MOSCSEL); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout); // Initialize and enable PLL clock CKGR_PLLR = evaluate_pll() | BV(CKGR_PLLR_STUCKTO1) | CKGR_PLLR_PLLCOUNT(0x2); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_LOCK)) && --timeout); PMC_MCKR = PMC_MCKR_CSS_MAIN_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); PMC_MCKR = PMC_MCKR_CSS_PLL_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); /* Enable clock on PIO for inputs */ // TODO: move this in gpio_init() for better power management? pmc_periphEnable(PIOA_ID); pmc_periphEnable(PIOB_ID); pmc_periphEnable(PIOC_ID); #ifdef PIOF_ID pmc_periphEnable(PIOD_ID); pmc_periphEnable(PIOE_ID); pmc_periphEnable(PIOF_ID); #endif }
void clock_init(void) { uint32_t timeout; /* Disable watchdog */ WDT_MR = BV(WDT_WDDIS); /* Set 4 wait states for flash access, needed for higher CPU clock rates */ EEFC_FMR = EEFC_FMR_FWS(3); // Select external slow clock if (!(SUPC_SR & BV(SUPC_SR_OSCSEL))) { SUPC_CR = BV(SUPC_CR_XTALSEL) | SUPC_CR_KEY(0xA5); while (!(SUPC_SR & BV(SUPC_SR_OSCSEL))); } // Initialize main oscillator if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL))) { CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSC_COUNT | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout); } // Switch to external oscillator CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSC_COUNT | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN) | BV(CKGR_MOR_MOSCSEL); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MOSCSELS)) && --timeout); PMC_MCKR = (PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_MASK) | PMC_MCKR_CSS_MAIN_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); // Initialize and enable PLL clock CKGR_PLLR = evaluate_pll() | BV(CKGR_PLLR_STUCKTO1) | CKGR_PLLR_PLLCOUNT(0x1); timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_LOCK)) && --timeout); PMC_MCKR = PMC_MCKR_CSS_MAIN_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); PMC_MCKR = PMC_MCKR_CSS_PLL_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); /* Enable clock on PIO for inputs */ PMC_PCER = BV(PIOA_ID) | BV(PIOB_ID) | BV(PIOC_ID); }
/** * \brief Configure PLL clock by giving MUL and DIV. * Disable PLL when 'mul' set to 0. * * \param mul PLL multiplier factor. * \param div PLL divider factor. */ extern void PMC_SetPllClock(uint32_t mul, uint32_t div) { if (mul != 0) { /* Init PLL speed */ PMC->CKGR_PLLR = CKGR_PLLR_STUCKTO1 | CKGR_PLLR_PLLCOUNT(PmcPllCnt) | CKGR_PLLR_MUL(mul - 1) | CKGR_PLLR_DIV(div); /* Wait for PLL stabilization */ while( !(PMC->PMC_SR & PMC_SR_LOCK) ); } else { PMC->CKGR_PLLR = CKGR_PLLR_STUCKTO1; /* disable PLL A */ } }