void H1BIT_Clear(byte* entry, unsigned h)
{
/* entry address into the bitmap.*/
byte *bbmp = H1BIT_BYTE(entry, h);
byte v = *bbmp;
uint field_selector = GET_BIT_FIELD( h, H_GRAIN_BITS, H1B_FS_BITS );
CLEAR_BIT_FIELD(v, field_selector, 1 );
*bbmp = v;
}
/**
* Initialize the LCD controller
*/
void
init_lcd(void)
{
uint32_t reg_value;
fdc_error_t fdc_error;
/*
* Check DRAM block to be used for the LCD frame buffer, before using it:
*/
fdc_error = check_dram_memory_block
((void *)LCD_FRAME_BUFFER_BASE_ADDR, LCD_FRAME_BUFFER_SIZE);
if (fdc_error != 0)
{
fatal_error_handler(fdc_error);
}
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[0]);
reg_value &= 0xfffc00ff; //BIN32(11111111,11111100,00000000,11111111);
reg_value |= 0x00015500; //BIN32(00000000,00000001,01010101,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[0], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[0]);
reg_value &= 0xfffc00ff; //BIN32(11111111,11111100,00000000,11111111);
reg_value |= 0x0002aa00; //BIN32(00000000,00000010,10101010,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[0], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[3]);
reg_value &= 0xf00000ff; //BIN32(11110000,00000000,00000000,11111111);
reg_value |= 0x05555500; //BIN32(00000101,01010101,01010101,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[3], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[3]);
reg_value &= 0xf00000ff; //BIN32(11110000,00000000,00000000,11111111);
reg_value |= 0x0aaaaa00; //BIN32(00001010,10101010,10101010,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[3], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[4]);
reg_value &= 0xf0300000; //BIN32(11110000,00110000,00000000,00000000);
reg_value |= 0x058fffff; //BIN32(00000101,01001111,11111111,11111111);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[4], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[4]);
reg_value &= 0xf0300000; //BIN32(11110000,00110000,00000000,00000000);
reg_value |= 0x0a8aaaaa; //BIN32(00001010,10001010,10101010,10101010);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[4], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[9]);
reg_value &= 0xf0ffffff; //BIN32(11110000,11111111,11111111,11111111);
reg_value |= 0x0a000000; //BIN32(00001010,00000000,00000000,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[9], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[9]);
reg_value &= 0xf0ffffff; //BIN32(11110000,11111111,11111111,11111111);
reg_value |= 0x0a000000; //BIN32(00001010,00000000,00000000,00000000);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINMODE[9], reg_value);
reg_value = read_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[11]);
reg_value &= 0xfffffff0; //BIN32(11111111,11111111,11111111,11110000);
reg_value |= 0x0000000f; //BIN32(00000000,00000000,00000000,00001111);
write_32bit_mmio_register(
&g_pin_connect_block->reg_PINSEL[11], reg_value);
/*
* Turn on LCD power in the System Control Block
*/
reg_value = read_32bit_mmio_register(
&g_scb_mmio_registers_p->reg_PCONP);
reg_value |= PCONP_PCLCD;
write_32bit_mmio_register(
&g_scb_mmio_registers_p->reg_PCONP, reg_value);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_CFG, LCD_CLK_DIVIDER_ENCODED);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_TIMH,
LCD_HORIZ_BACK_PORCH_ENCODED |
LCD_HORIZ_FRONT_PORCH_ENCODED |
LCD_HORIZ_SYNC_PULSE_ENCODED |
LCD_PIXELS_PER_LINE_ENCODED);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_TIMV,
LCD_VERT_BACK_PORCH_ENCODED |
LCD_VERT_FRONT_PORCH_ENCODED |
LCD_VERT_SYNC_PULSE_ENCODED |
LCD_VERT_SYNC_PULSE_ENCODED |
LCD_LINES_PER_PANEL_ENCODED);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_POL,
LCD_POL_BCD_MASK |
LCD_CLOCKS_PER_LINE_ENCODED |
LCD_POL_IPC_MASK |
LCD_POL_IHS_MASK |
LCD_POL_IVS_MASK);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_LE, 0);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_UPBASE, LCD_FRAME_BUFFER_BASE_ADDR);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_LPBASE, LCD_FRAME_BUFFER_BASE_ADDR);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_CTRL,
LCD_CTRL_LCDPWR_MASK |
LCD_CTRL_LCDTFT_MASK |
LCD_BITS_PER_PIXEL_ENCODED);
/*
* XXX Do we need a delay loop before enabling the LCD?
*/
#if 0
for (int i = 0; i < 10000; i ++)
;
#endif
/*
* Enable LCD
*/
reg_value = read_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_CTRL);
reg_value |= LCD_CTRL_LCDEN_MASK;
CLEAR_BIT_FIELD(reg_value, LCD_CTRL_RESERVED1_MASK);
CLEAR_BIT_FIELD(reg_value, LCD_CTRL_RESERVED2_MASK);
write_32bit_mmio_register(
&g_lpc2478_lcd_controller->reg_LCD_CTRL, reg_value);
lcd_clear(LCD_COLOR_BLACK);
}
