void CLKPWR::SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
{
uint32_t bitpos;
bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
/* PCLKSEL0 selected */
if (ClkType < 32)
{
/* Clear two bit at bit position */
//LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos))) &CLKPWR_PCLKSEL0_BITMASK;
LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
/* Set two selected bit */
//LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal)) &CLKPWR_PCLKSEL0_BITMASK;
LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
}
/* PCLKSEL1 selected */
else
{
/* Clear two bit at bit position */
//LPC_SC->PCLKSEL1 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos))) &CLKPWR_PCLKSEL1_BITMASK;
LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
/* Set two selected bit */
//LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal)) &CLKPWR_PCLKSEL1_BITMASK;
LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
}
}
/*****************************************************************
* @brief Set value of each Peripheral clock selection
* @param[in] ClkType peripheral clock slection of each Type
* - CLKPWR_PCLKSEL_WDT : WDT
- CLKPWR_PCLKSEL_TIMER0 : Timer 0
- CLKPWR_PCLKSEL_TIMER1 : Timer 1
- CLKPWR_PCLKSEL_UART0 : UART 0
- CLKPWR_PCLKSEL_UART1 : UART 1
- CLKPWR_PCLKSEL_PWM1 : PWM 1
- CLKPWR_PCLKSEL_I2C0 : I2C 0
- CLKPWR_PCLKSEL_SPI : SPI
- CLKPWR_PCLKSEL_SSP1 : SSP 1
- CLKPWR_PCLKSEL_DAC : DAC
- CLKPWR_PCLKSEL_ADC : ADC
- CLKPWR_PCLKSEL_CAN1 : CAN 1
- CLKPWR_PCLKSEL_CAN2 : CAN 2
- CLKPWR_PCLKSEL_ACF : ACF
- CLKPWR_PCLKSEL_QEI : QEI
- CLKPWR_PCLKSEL_PCB : PCB
- CLKPWR_PCLKSEL_I2C1 : I2C 1
- CLKPWR_PCLKSEL_SSP0 : SSP 0
- CLKPWR_PCLKSEL_TIMER2 : Timer 2
- CLKPWR_PCLKSEL_TIMER3 : Timer 3
- CLKPWR_PCLKSEL_UART2 : UART 2
- CLKPWR_PCLKSEL_UART3 : UART 3
- CLKPWR_PCLKSEL_I2C2 : I2C 2
- CLKPWR_PCLKSEL_I2S : I2S
- CLKPWR_PCLKSEL_RIT : RIT
- CLKPWR_PCLKSEL_SYSCON : SYSCON
- CLKPWR_PCLKSEL_MC : MC
* @param[in] Div value of divider
* - CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
* - CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
* - CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
* @return none
*****************************************************************/
void CLKPWR_SetPCLKDiv(uint32_t ClkType, uint32_t DivVal)
{
uint32_t bitpos;
bitpos = (ClkType < 32) ? (ClkType): (ClkType - 32);
/* pclksel0 register */
if (ClkType < 32)
{
LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
}
/* pclsel1 register */
else
{
LPC_SC->PCLKSEL1 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
}
}
