/******************************************************************************* * Code for BOARD_BootClockPLL180M configuration ******************************************************************************/ void BOARD_BootClockPLL180M(void) { /*!< Set up the clock sources */ /*!< Set up FRO */ POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ CLOCK_AttachClk( kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally being below the voltage for current speed */ POWER_SetVoltageForFreq( 12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */ /*!< Set up SYS PLL */ const pll_setup_t pllSetup = { .pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U), .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)), .pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)), .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)), .pllRate = 180000000U, .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP}; CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Set sys pll clock source from external crystal */ CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */ POWER_SetVoltageForFreq( 180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(180000000U); /*!< Set FLASH wait states for core */ CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch System clock to SYS PLL 180MHz */ /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BootClockPLL180M_CORE_CLOCK; }
/******************************************************************************* * Code for BOARD_BootClockFRO12M configuration ******************************************************************************/ void BOARD_BootClockFRO12M(void) { /*!< Set up the clock sources */ /*!< Set up FRO */ POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally being below the voltage for current speed */ CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */ POWER_SetVoltageForFreq(12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */ /*!< Set up dividers */ CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */ /*!< Set up clock selectors - Attach clocks to the peripheries */ CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ /*!< Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; }
/******************************************************************************* * Code for BOARD_BootClockPLL180M configuration ******************************************************************************/ void BOARD_BootClockPLL180M(void) { /*!< Set up the clock sources */ /*!< Set up FRO */ POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ CLOCK_AttachClk( kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally being below the voltage for current speed */ POWER_SetVoltageForFreq( 12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */ /*!< Set up SYS PLL */ const pll_setup_t pllSetup = { .pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U), .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)), .pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)), .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)), .pllRate = 180000000U, .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP}; CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Set sys pll clock source from external crystal */ CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */ POWER_SetVoltageForFreq( 180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(180000000U); /*!< Set FLASH wait states for core */ CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch System clock to SYS PLL 180MHz */ /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKPLL180M_CORE_CLOCK; } /******************************************************************************* ******************** Configuration BOARD_BootClockPLL220M ********************* ******************************************************************************/ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!Configuration name: BOARD_BootClockPLL220M called_from_default_init: true outputs: - {id: FRO12M_clock.outFreq, value: 12 MHz} - {id: FROHF_clock.outFreq, value: 48 MHz} - {id: MAIN_clock.outFreq, value: 220 MHz} - {id: SYSPLL_clock.outFreq, value: 220 MHz} - {id: System_clock.outFreq, value: 220 MHz} settings: - {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS} - {id: SYSCON.M_MULT.scale, value: '110', locked: true} - {id: SYSCON.N_DIV.scale, value: '3', locked: true} - {id: SYSCON.PDEC.scale, value: '2', locked: true} - {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /******************************************************************************* * Variables for BOARD_BootClockPLL220M configuration ******************************************************************************/ /******************************************************************************* * Code for BOARD_BootClockPLL220M configuration ******************************************************************************/ void BOARD_BootClockPLL220M(void) { /*!< Set up the clock sources */ /*!< Set up FRO */ POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally being below the voltage for current speed */ POWER_SetVoltageForFreq(220000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ CLOCK_SetFLASHAccessCyclesForFreq(220000000U); /*!< Set FLASH wait states for core */ /*!< Set up SYS PLL */ const pll_setup_t pllSetup = { .pllctrl = SYSCON_SYSPLLCTRL_SELI(34U) | SYSCON_SYSPLLCTRL_SELP(31U) | SYSCON_SYSPLLCTRL_SELR(0U), .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(13243U)), .pllndec = (SYSCON_SYSPLLNDEC_NDEC(1U)), .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)), .pllRate = 220000000U, .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP }; CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Set sys pll clock source*/ CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */ /*!< Set up dividers */ CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */ /*!< Set up clock selectors - Attach clocks to the peripheries */ CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */ SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */ /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKPLL220M_CORE_CLOCK; }