示例#1
0
//*****************************************************************************
//
//! Sets the priority masking level
//!
//! \param ui32PriorityMask is the priority level that is masked.
//!
//! This function sets the interrupt priority masking level so that all
//! interrupts at the specified or lesser priority level are masked.  Masking
//! interrupts can be used to globally disable a set of interrupts with
//! priority below a predetermined threshold.  A value of 0 disables priority
//! masking.
//!
//! Smaller numbers correspond to higher interrupt priorities.  So for example
//! a priority level mask of 4 allows interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater are blocked.
//!
//! \note The hardware priority mechanism only looks at the upper 3 bits of the
//! priority level, so any prioritization must be performed in those bits.
//!
//! \b Example: Mask of interrupt priorities greater than or equal to 0x80.
//!
//! \verbatim
//! //
//! // Mask of interrupt priorities greater than or equal to 0x80.
//! //
//! IntPriorityMaskSet(0x80);
//! \endverbatim
//!
//! \return None.
//
//*****************************************************************************
void
IntPriorityMaskSet(uint32_t ui32PriorityMask)
{
    //
    // Set the priority mask.
    //
    CPUbasepriSet(ui32PriorityMask);
}
示例#2
0
文件: interrupt.c 项目: 0x00f/Energia
//*****************************************************************************
//
//! Sets the priority masking level
//!
//! \param ulPriorityMask is the priority level that is masked.
//!
//! This function sets the interrupt priority masking level so that all
//! interrupts at the specified or lesser priority level are masked.  Masking
//! interrupts can be used to globally disable a set of interrupts with
//! priority below a predetermined threshold.  A value of 0 disables priority
//! masking.
//!
//! Smaller numbers correspond to higher interrupt priorities.  So for example
//! a priority level mask of 4 allows interrupts of priority level 0-3,
//! and interrupts with a numerical priority of 4 and greater are blocked.
//!
//! The hardware priority mechanism only looks at the upper N bits of the
//! priority level (where N is 3 for the Stellaris family), so any
//! prioritization must be performed in those bits.
//!
//! \return None.
//
//*****************************************************************************
void
IntPriorityMaskSet(unsigned long ulPriorityMask)
{
    CPUbasepriSet(ulPriorityMask);
}