/*******************************************************************************
* Function Name: Cy_DMAC_Descriptor_GetNextDescriptor
****************************************************************************//**
*
* Returns a next descriptor address of the specified descriptor.
*
* Based on the descriptor type, the offset of the address for the next descriptor may
* vary. For a single-transfer descriptor type, this register is at offset 0x0c.
* For the 1D-transfer descriptor type, this register is at offset 0x10.
* For the 2D-transfer descriptor type, this register is at offset 0x14.
*
* \param descriptor
* The descriptor structure instance declared by the user/component.
*
* \return
* The pointer to the next descriptor.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Descriptor_GetNextDescriptor
*
*******************************************************************************/
cy_stc_dmac_descriptor_t * Cy_DMAC_Descriptor_GetNextDescriptor(cy_stc_dmac_descriptor_t const * descriptor)
{
cy_stc_dmac_descriptor_t * retVal = NULL;
CY_ASSERT_L1(NULL != descriptor);
switch((cy_en_dmac_descriptor_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DESCR_TYPE, descriptor->ctl))
{
case CY_DMAC_SINGLE_TRANSFER:
case CY_DMAC_SCATTER_TRANSFER:
retVal = (cy_stc_dmac_descriptor_t*) descriptor->xSize;
break;
case CY_DMAC_1D_TRANSFER:
retVal = (cy_stc_dmac_descriptor_t*) descriptor->ySize;
break;
case CY_DMAC_2D_TRANSFER:
retVal = (cy_stc_dmac_descriptor_t*) descriptor->nextPtr;
break;
case CY_DMAC_MEMORY_COPY:
retVal = (cy_stc_dmac_descriptor_t*) descriptor->xIncr;
break;
default:
/* An unsupported type of the descriptor */
break;
}
return (retVal);
}
/*******************************************************************************
* Function Name: Cy_DMAC_Descriptor_SetNextDescriptor
****************************************************************************//**
*
* Sets a Next Descriptor parameter for the specified descriptor.
*
* Based on the descriptor type, the offset of the address for the next descriptor may
* vary. For the single-transfer descriptor type, this register is at offset 0x0c.
* For the 1D-transfer descriptor type, this register is at offset 0x10.
* For the 2D-transfer descriptor type, this register is at offset 0x14.
*
* \param descriptor
* The descriptor structure instance declared by the user/component.
*
* \param nextDescriptor
* The pointer to the next descriptor.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Descriptor_SetNextDescriptor
*
*******************************************************************************/
void Cy_DMAC_Descriptor_SetNextDescriptor(cy_stc_dmac_descriptor_t * descriptor, cy_stc_dmac_descriptor_t const * nextDescriptor)
{
CY_ASSERT_L1(NULL != descriptor);
switch((cy_en_dmac_descriptor_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DESCR_TYPE, descriptor->ctl))
{
case CY_DMAC_SINGLE_TRANSFER:
case CY_DMAC_SCATTER_TRANSFER:
descriptor->xSize = (uint32_t)nextDescriptor;
break;
case CY_DMAC_1D_TRANSFER:
descriptor->ySize = (uint32_t)nextDescriptor;
break;
case CY_DMAC_2D_TRANSFER:
descriptor->nextPtr = (uint32_t)nextDescriptor;
break;
case CY_DMAC_MEMORY_COPY:
descriptor->xIncr = (uint32_t)nextDescriptor;
break;
default:
/* Unsupported type of descriptor */
break;
}
}
/*******************************************************************************
* Function Name: Cy_SysInt_Init
****************************************************************************//**
*
* \brief Initializes the referenced interrupt by setting the priority and the
* interrupt vector.
*
* Note that the interrupt vector will only be relocated if the vector table was
* moved to __ramVectors in SRAM. Otherwise it is ignored.
*
* Use the CMSIS core function NVIC_EnableIRQ(config.intrSrc) to enable the interrupt.
*
* \param config
* Interrupt configuration structure
*
* \param userIsr
* Address of the ISR
*
* \return
* Initialization status
*
* \funcusage
* \snippet sysint/sysint_v1_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysInt_Init
*
*******************************************************************************/
cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddress userIsr)
{
cy_en_sysint_status_t status = CY_SYSINT_SUCCESS;
if(NULL != config)
{
CY_ASSERT_L3(CY_SYSINT_IS_PRIORITY_VALID(config->intrPriority));
#if (CY_CPU_CORTEX_M0P)
if (config->intrSrc > SysTick_IRQn)
{
/* Configure the interrupt mux */
Cy_SysInt_SetIntSource(config->intrSrc, config->cm0pSrc);
}
#endif
NVIC_SetPriority(config->intrSrc, config->intrPriority);
/* Only set the new vector if it was moved to __ramVectors */
if (SCB->VTOR == (uint32_t)&__ramVectors)
{
CY_ASSERT_L1(CY_SYSINT_IS_VECTOR_VALID(userIsr));
(void)Cy_SysInt_SetVector(config->intrSrc, userIsr);
}
}
else
{
status = CY_SYSINT_BAD_PARAM;
}
return(status);
}
/*******************************************************************************
* Function Name: Cy_DMAC_Channel_DeInit
****************************************************************************//**
*
* Clears the content of registers corresponding to the channel.
*
* \param base
* The pointer to the hardware DMAC block.
*
* \param channel
* A channel number.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Disable
*
*******************************************************************************/
void Cy_DMAC_Channel_DeInit(DMAC_Type * base, uint32_t channel)
{
CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
DMAC_CH_CTL(base, channel) = 0UL;
DMAC_CH_CURR(base, channel) = 0UL;
DMAC_CH_INTR_MASK(base, channel) = 0UL;
}
/*******************************************************************************
* Function Name: Cy_Crypto_Core_V2_Aes_Init
****************************************************************************//**
*
* Sets AES mode and prepares inverse key.
*
* \param base
* The pointer to the CRYPTO instance.
*
* \param key
* The pointer to the encryption/decryption key.
*
* \param keyLength
* \ref cy_en_crypto_aes_key_length_t
*
* \param aesState
* The pointer to the AES state structure allocated by the user. The user
* must not modify anything in this structure.
*
* \return
* \ref cy_en_crypto_status_t
*
*******************************************************************************/
cy_en_crypto_status_t Cy_Crypto_Core_V2_Aes_Init(CRYPTO_Type *base,
uint8_t const *key,
cy_en_crypto_aes_key_length_t keyLength,
cy_stc_crypto_aes_state_t *aesState)
{
CY_ASSERT_L1(NULL != key);
CY_ASSERT_L1(NULL != aesState);
CY_ASSERT_L3(CY_CRYPTO_IS_KEYLENGTH_VALID(keyLength));
Cy_Crypto_Core_V2_MemSet(base, aesState, 0u, sizeof(cy_stc_crypto_aes_state_t));
aesState->key = (uint8_t *)key;
aesState->keyLength = keyLength;
REG_CRYPTO_AES_CTL(base) = (uint32_t)(_VAL2FLD(CRYPTO_AES_CTL_KEY_SIZE, aesState->keyLength));
return (CY_CRYPTO_SUCCESS);
}
/*******************************************************************************
* Function Name: Cy_DMAC_Descriptor_SetXloopDataCount
****************************************************************************//**
*
* Sets the number of data elements to transfer in the X loop
* for the specified descriptor (for 1D or 2D descriptors only).
*
* \param descriptor
* The descriptor structure instance declared by the user/component.
*
* \param xCount
* The number of data elements to transfer in the X loop.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Descriptor_SetNextDescriptor
*
*******************************************************************************/
void Cy_DMAC_Descriptor_SetXloopDataCount(cy_stc_dmac_descriptor_t * descriptor, uint32_t xCount)
{
CY_ASSERT_L1(NULL != descriptor);
cy_en_dmac_descriptor_type_t locDescriptorType = Cy_DMAC_Descriptor_GetDescriptorType(descriptor);
CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != locDescriptorType);
CY_ASSERT_L2(CY_DMAC_IS_LOOP_COUNT_VALID(xCount));
/* Convert the data count from the user's range (1-65536) into the machine range (0-65535). */
if (CY_DMAC_SCATTER_TRANSFER == locDescriptorType)
{
descriptor->dst = _VAL2FLD(DMAC_CH_V2_DESCR_X_SIZE_X_COUNT, xCount);
}
else
{
descriptor->xSize = _VAL2FLD(DMAC_CH_V2_DESCR_X_SIZE_X_COUNT, xCount);
}
}
/*******************************************************************************
* Function Name: Cy_DMAC_Descriptor_GetXloopDataCount
****************************************************************************//**
*
* Returns the number of data elements for the X loop of the specified
* descriptor (for 1D or 2D descriptors only).
*
* \param descriptor
* The descriptor structure instance declared by the user/component.
*
* \return
* The number of data elements to transfer in the X loop.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Descriptor_GetNextDescriptor
*
*******************************************************************************/
uint32_t Cy_DMAC_Descriptor_GetXloopDataCount(cy_stc_dmac_descriptor_t const * descriptor)
{
CY_ASSERT_L1(NULL != descriptor);
uint32_t retVal = 0UL;
cy_en_dmac_descriptor_type_t locDescriptorType = Cy_DMAC_Descriptor_GetDescriptorType(descriptor);
CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != locDescriptorType);
/* Convert the data count from the machine range (0-65535) into the user's range (1-65536). */
if (CY_DMAC_SCATTER_TRANSFER == locDescriptorType)
{
retVal = _FLD2VAL(DMAC_CH_V2_DESCR_X_SIZE_X_COUNT, descriptor->dst) + 1UL;
}
else
{
retVal = _FLD2VAL(DMAC_CH_V2_DESCR_X_SIZE_X_COUNT, descriptor->xSize) + 1UL;
}
return (retVal);
}
/*******************************************************************************
* Function Name: Cy_SCB_EZI2C_SetBuffer2
****************************************************************************//**
*
* Sets up the data buffer to be exposed to the I2C master on the secondary
* slave address request.
*
* \param base
* The pointer to the EZI2C SCB instance.
*
* \param buffer
* The pointer to the data buffer.
*
* \param size
* The size of the buffer in bytes.
*
* \param rwBoundary
* The number of data bytes starting from the beginning of the buffer with Read and
* Write access. The data bytes located at rwBoundary or greater are read only.
*
* \param context
* The pointer to the context structure \ref cy_stc_scb_ezi2c_context_t
* allocated by the user. The structure is used during the EZI2C operation for
* internal configuration and data retention. The user must not modify anything
* in this structure.
*
* \note
* * This function is not interrupt-protected. To prevent a race condition,
* it must be protected from the EZI2C interruption in the place where it
* is called.
* * Calling this function in the middle of a transaction intended for the
* secondary slave address leads to unexpected behavior.
*
*******************************************************************************/
void Cy_SCB_EZI2C_SetBuffer2(CySCB_Type const *base, uint8_t *buffer, uint32_t size, uint32_t rwBoundary,
cy_stc_scb_ezi2c_context_t *context)
{
CY_ASSERT_L1(CY_SCB_IS_I2C_BUFFER_VALID(buffer, size));
CY_ASSERT_L2(rwBoundary <= size);
/* Suppress a compiler warning about unused variables */
(void) base;
context->buf2 = buffer;
context->buf2Size = size;
context->buf2rwBondary = rwBoundary;
}
/*******************************************************************************
* Function Name: Cy_IPC_Drv_ReadMsgWord
****************************************************************************//**
*
* This function is used to read a 32-bit word message through an IPC channel.
* This function assumes that the channel is locked (for a valid message).
* If the channel is not locked, the message is invalid. The user must call
* Cy_IPC_Drv_Release() function after reading the message to release the
* IPC channel.
*
* \param base
* This parameter is a handle that represents the base address of the registers
* of the IPC channel.
* The parameter is generally returned from a call to the \ref
* Cy_IPC_Drv_GetIpcBaseAddress.
*
* \param message
* A variable where the read data is copied.
*
* \return Status of the operation
* \retval CY_IPC_DRV_SUCCESS: The function executed successfully and the IPC
* was acquired.
* \retval CY_IPC_DRV_ERROR: The function encountered an error because the IPC
* channel was already in a released state, meaning the data
* may be invalid.
*
* \funcusage
* \snippet IPC_sut_01.cydsn/main_cm4.c snippet_Cy_IPC_Drv_ReadMsgWord
*
*******************************************************************************/
cy_en_ipcdrv_status_t Cy_IPC_Drv_ReadMsgWord (IPC_STRUCT_Type const * base, uint32_t * message)
{
cy_en_ipcdrv_status_t retStatus;
CY_ASSERT_L1(NULL != message);
if ( Cy_IPC_Drv_IsLockAcquired(base) )
{
/* The channel is locked; message is valid. */
*message = Cy_IPC_Drv_ReadDataValue(base);
retStatus = CY_IPC_DRV_SUCCESS;
}
else
{
/* The channel is not locked so channel is invalid. */
retStatus = CY_IPC_DRV_ERROR;
}
return(retStatus);
}
/*******************************************************************************
* Function Name: Cy_DMAC_Descriptor_SetDescriptorType
****************************************************************************//**
*
* Sets the descriptor's type for the specified descriptor.
* Moves the next descriptor pointer and X data count values into the proper
* place in accordance to the actual descriptor type.
* During the descriptor's type changing, the Xloop and Yloop settings, such as
* data count and source/destination increment (i.e. the content of the
* xIncr, ySize and yIncr descriptor registers) might be lost (overriden by the
* next descriptor/X data count values) because of the different descriptor
* registers structures for different descriptor types.
* Set up carefully the Xloop (and Yloop, if used) data count and
* source/destination increment if the descriptor type is changed from a simpler
* to a more complicated type ("single transfer" -> "1D", "1D" -> "2D", etc.).
*
* \param descriptor
* The descriptor structure instance declared by the user/component.
*
* \param descriptorType
* The descriptor type \ref cy_en_dmac_descriptor_type_t.
*
* \funcusage
* \snippet dmac\1.0\snippet\main.c snippet_Cy_DMAC_Descriptor_SetNextDescriptor
*
*******************************************************************************/
void Cy_DMAC_Descriptor_SetDescriptorType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_descriptor_type_t descriptorType)
{
CY_ASSERT_L1(NULL != descriptor);
CY_ASSERT_L3(CY_DMAC_IS_TYPE_VALID(descriptorType));
if (descriptorType != Cy_DMAC_Descriptor_GetDescriptorType(descriptor)) /* Don't perform if the type is not changed */
{
/* Store the current nextDescriptor pointer. */
cy_stc_dmac_descriptor_t * locNextDescriptor = Cy_DMAC_Descriptor_GetNextDescriptor(descriptor);
/* Store the current X data counter. */
uint32_t locXcount = Cy_DMAC_Descriptor_GetXloopDataCount(descriptor);
/* Change the descriptor type. */
CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_DESCR_TYPE, descriptorType);
Cy_DMAC_Descriptor_SetXloopDataCount(descriptor, locXcount);
/* Restore the nextDescriptor pointer into the proper place. */
Cy_DMAC_Descriptor_SetNextDescriptor(descriptor, locNextDescriptor);
}
}
