/**************************************************************************************************** * @fn i2cs_setup_slave * Helper routine to set up slave * ***************************************************************************************************/ static void i2cs_setup_slave(i2cs_slave_t *pSlaveSetup) { uint32_t optimalDev; /* Limit usable slave address indexes to the maximum the controller can support */ if (pSlaveSetup->SlaveIndex <= I2C_SLV_ADDR_NUM) { Chip_I2CS_SetSlaveAddr(I2C_HOSTIF, pSlaveSetup->SlaveIndex, (pSlaveSetup->slaveAddr & I2C_SLV_ADDR_MSK)); /* Clear interrupt status */ Chip_I2CS_ClearStatus(I2C_HOSTIF, I2C_STAT_SLVDESEL); if (pSlaveSetup->EnableSlave == 0) { Chip_I2CS_DisableSlaveAddr(I2C_HOSTIF, pSlaveSetup->SlaveIndex); } else { Chip_I2C_EnableInt(I2C_HOSTIF, I2C_INTENSET_SLVPENDING | I2C_INTENSET_SLVDESEL); } } optimalDev = Chip_Clock_GetAsyncSyscon_ClockRate()/I2C_SLV_PCLK_FREQ; Chip_I2C_SetClockDiv( I2C_HOSTIF, optimalDev ); /* Enable I2C slave interface */ Chip_I2CS_Enable(I2C_HOSTIF); }
/**************************************************************************************************** * @fn I2C_HardwareSetup * Configures the GPIOs and h/w interface for the I2C bus * * @param busId - I2C bus identifier in case multiple buses are supported * * @return true if successful, false otherwise. * ***************************************************************************************************/ osp_bool_t I2C_HardwareSetup( I2C_TypeDef *busId ) { if (busId == LPC_I2C0) { if (sI2C_Bus1Initialized) { return true; } /* Configure the I2C interface in Master mode with the given speed */ Chip_IOCON_PinMuxSet(LPC_IOCON, I2C_SENSOR_BUS_SCL_PIN); Chip_IOCON_PinMuxSet(LPC_IOCON, I2C_SENSOR_BUS_SDA_PIN); Chip_I2C_Init(busId); /* Enables clock and resets the peripheral */ /* setup speed and config. as Master */ Chip_I2C_SetClockDiv( busId, I2C_MASTER_CLOCK_DIV ); Chip_I2CM_SetBusSpeed( busId, I2C_MCLOCK_SPEED ); /* Reset master state machine */ Chip_I2CM_Disable( busId ); Chip_I2CM_Enable( busId ); /* Enable interrupt for pending status */ Chip_I2C_EnableInt( busId, I2C_INTENSET_MSTPENDING ); I2C_Master_Initialise(); /* Configure TWI interrupts */ NVIC_SetPriority( I2C_SENSOR_BUS_IRQn, I2C_SENSOR_BUS_INT_PRIORITY ); NVIC_EnableIRQ( I2C_SENSOR_BUS_IRQn ); //enable I2C isr sI2C_Bus1Initialized = true; return true; } return false; }
/* Setup I2C */ static void setupI2CSlave(void) { /* Some common I2C init was performed in setupI2CMaster(), so it doesn't need to be done again for the slave setup. */ /* Emulated EEPROM 0 is on slave index 0 */ Chip_I2CS_SetSlaveAddr(LPC_I2C_PORT, 0, EEPROM0SLVADD); /* Disable Qualifier for Slave Address 0 */ Chip_I2CS_SetSlaveQual0(LPC_I2C_PORT, false, 0); /* Enable Slave Address 0 */ Chip_I2CS_EnableSlaveAddr(LPC_I2C_PORT, 0); /* Emulated EEPROM 1 is on slave index 1 */ Chip_I2CS_SetSlaveAddr(LPC_I2C_PORT, 1, EEPROM1SLVADD); /* Enable Slave Address 1 */ Chip_I2CS_EnableSlaveAddr(LPC_I2C_PORT, 1); /* Clear interrupt status and enable slave interrupts */ Chip_I2CS_ClearStatus(LPC_I2C_PORT, I2C_STAT_SLVDESEL); Chip_I2C_EnableInt(LPC_I2C_PORT, I2C_INTENSET_SLVPENDING | I2C_INTENSET_SLVDESEL); /* Enable I2C slave interface */ Chip_I2CS_Enable(LPC_I2C_PORT); }