//2E void CMA_MIPSIV::SWR() { ComputeMemAccessAddr(); m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PushCtx(); m_codeGen->Call(reinterpret_cast<void*>(&SWR_Proxy), 3, false); }
//2D void CMA_MIPSIV::SDR() { assert(m_regSize == MIPS_REGSIZE_64); ComputeMemAccessAddr(); m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT])); m_codeGen->PushCtx(); m_codeGen->Call(reinterpret_cast<void*>(&SDR_Proxy), 3, false); }
//2B void CMA_MIPSIV::SW() { ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PushIdx(2); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_SetWordProxy), 3, false); m_codeGen->PullTop(); }
//1F void CMA_EE::SQ() { ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->MD_PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT])); m_codeGen->PushIdx(2); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_SetQuadProxy), 3, Jitter::CJitter::RETURN_VALUE_NONE); m_codeGen->PullTop(); }
//1B void CMA_MIPSIV::LDR() { if(m_nRT == 0) return; assert(m_regSize == MIPS_REGSIZE_64); ComputeMemAccessAddr(); m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT])); m_codeGen->PushCtx(); m_codeGen->Call(reinterpret_cast<void*>(&LDR_Proxy), 3, Jitter::CJitter::RETURN_VALUE_64); m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT])); }
//3F void CMA_MIPSIV::SD() { assert(m_regSize == MIPS_REGSIZE_64); ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT])); m_codeGen->PushIdx(2); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_SetDoubleProxy), 3, Jitter::CJitter::RETURN_VALUE_NONE); m_codeGen->PullTop(); }
//1E void CMA_EE::LQ() { if(m_nRT == 0) return; ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushIdx(1); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_GetQuadProxy), 2, Jitter::CJitter::RETURN_VALUE_128); m_codeGen->MD_PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT])); m_codeGen->PullTop(); }
//27 void CMA_MIPSIV::LWU() { if(m_nRT == 0) return; ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushIdx(1); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_GetWordProxy), 2, true); m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PushCst(0); m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1])); m_codeGen->PullTop(); }
//26 void CMA_MIPSIV::LWR() { if(m_nRT == 0) return; ComputeMemAccessAddr(); m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PushCtx(); m_codeGen->Call(reinterpret_cast<void*>(&LWR_Proxy), 3, true); if(m_regSize == MIPS_REGSIZE_64) { m_codeGen->PushTop(); m_codeGen->SignExt(); m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1])); } m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); }
//21 void CMA_MIPSIV::LH() { if(m_nRT == 0) return; ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushIdx(1); m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_GetHalfProxy), 2, true); m_codeGen->SignExt16(); if(m_regSize == MIPS_REGSIZE_64) { m_codeGen->PushTop(); m_codeGen->SignExt(); m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1])); } m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PullTop(); }
void CMA_MIPSIV::Template_LoadUnsigned32(void* pProxyFunction) { if(m_nRT == 0) return; //TODO: Need to check if this used correctly... LBU, LHU and LW uses this (why LW? and why sign extend on LBU and LHU?) ComputeMemAccessAddr(); m_codeGen->PushCtx(); m_codeGen->PushIdx(1); m_codeGen->Call(pProxyFunction, 2, true); if(m_regSize == MIPS_REGSIZE_64) { m_codeGen->PushTop(); m_codeGen->SignExt(); m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1])); } m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0])); m_codeGen->PullTop(); }