#define TRACE_ALWAYS 0x00000001 #undef DEBUG_TRACE #define DEBUG_TRACE (TRACE_ALWAYS) //////////////////////////////////////////////////////////////////////////////// #if defined(ADS_LINKER_BUG__NOT_ALL_UNUSED_VARIABLES_ARE_REMOVED) #pragma arm section rwdata = "s_IsrTable_MC9328MXL" #endif #define DEFINE_IRQ(index) { index, { NULL, (void*)(size_t)index } } MC9328MXL_AITC_Driver::IRQ_VECTORING __section(rwdata) MC9328MXL_AITC_Driver::s_IsrTable[] = { DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused0 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused1 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused2 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused3 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused4 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused5 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_CSI_INT ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_MMA_MAC_INT ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_MMA_INT ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused9 ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_MSIRQ ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_GPIO_INT_PORTA ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_GPIO_INT_PORTB ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_GPIO_INT_PORTC ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_LCDC_INT ), DEFINE_IRQ( MC9328MXL_AITC::c_IRQ_INDEX_unused15 ),
// use without further testing or modification. //----------------------------------------------------------------------------- #include <tinyhal.h> #include "..\LPC24XX.h" //////////////////////////////////////////////////////////////////////////////// #if defined(ADS_LINKER_BUG__NOT_ALL_UNUSED_VARIABLES_ARE_REMOVED) #pragma arm section rwdata = "s_IsrTable_LPC24XX" #endif #define DEFINE_IRQ(index) { index, { NULL, (void*)(size_t)index } } LPC24XX_VIC_Driver::IRQ_VECTORING __section(rwdata) LPC24XX_VIC_Driver::s_IsrTable[] = { DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_WDT ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_SW ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_DBG_COM_RX ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_DBG_COM_TX ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_TIMER0 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_TIMER1 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_UART0 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_UART1 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_PWM_0_1 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_I2C0 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_SPI_SSP0 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_SSP1 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_PLL ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_RTC ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_EINT0 ), DEFINE_IRQ( LPC24XX_VIC::c_IRQ_INDEX_EINT1 ),
//////////////////////////////////////////////////////////////////////////////// #undef TRACE_ALWAYS #define TRACE_ALWAYS 0x00000001 #undef DEBUG_TRACE #define DEBUG_TRACE (TRACE_ALWAYS) //////////////////////////////////////////////////////////////////////////////// #define DEFINE_IRQ(index, priority) { priority, { NULL, (void*)(size_t)index } } AT91_AIC_Driver::IRQ_VECTORING AT91_AIC_Driver::s_IsrTable[] = { #ifdef PLATFORM_ARM_SAM9RL64_ANY DEFINE_IRQ(0, 7), // Advanced Interrupt Controller DEFINE_IRQ(1, 7), // System Peripherals DEFINE_IRQ(2, 1), // Parallel IO Controller A DEFINE_IRQ(3, 1), // Parallel IO Controller B DEFINE_IRQ(4, 1), // Parallel IO Controller C DEFINE_IRQ(5, 1), // Parallel IO Controller D DEFINE_IRQ(6, 5), // USART 0 DEFINE_IRQ(7, 5), // USART 1 DEFINE_IRQ(8, 5), // USART 2 DEFINE_IRQ(9, 5), // USART 3 DEFINE_IRQ(10, 0), // Multimedia Card Interface DEFINE_IRQ(11, 6), // Two-Wire Interface DEFINE_IRQ(12, 6), // Two-Wire Interface DEFINE_IRQ(13, 5), // Serial Peripheral Interface DEFINE_IRQ(14, 4), // Serial Synchronous Controller 0 DEFINE_IRQ(15, 4), // Serial Synchronous Controller 1
//////////////////////////////////////////////////////////////////////////////// #define DEFINE_IRQ(index, priority) { priority, { NULL, (void*)(size_t)index } } static const UINT32 AIC_PRIOR_HIGHEST = (0x7); // (AIC) Highest priority level struct IRQ_VECTORING { UINT32 Priority; HAL_CALLBACK Handler; }; IRQ_VECTORING s_IsrTable[] = { DEFINE_IRQ(FIQ_IRQn, 7), /**< 0 SAMA5D3x Advanced Interrupt Controller (FIQ) */ DEFINE_IRQ(SYS_IRQn, 7), /**< 1 SAMA5D3x System Controller Interrupt (SYS) */ DEFINE_IRQ(DBGU_IRQn, 7), /**< 2 SAMA5D3x Debug Unit Interrupt (DBGU) */ DEFINE_IRQ(PIT_IRQn, 7), /**< 3 SAMA5D3x Periodic Interval Timer Interrupt (PIT) */ DEFINE_IRQ(WDT_IRQn, 7), /**< 4 SAMA5D3x Watchdog timer Interrupt (WDT) */ DEFINE_IRQ(SMC_IRQn, 0), /**< 5 SAMA5D3x Multi-bit ECC Interrupt (SMC) */ DEFINE_IRQ(PIOA_IRQn, 1), /**< 6 SAMA5D3x Parallel I/O Controller A (PIOA) */ DEFINE_IRQ(PIOB_IRQn, 1), /**< 7 SAMA5D3x Parallel I/O Controller B (PIOB) */ DEFINE_IRQ(PIOC_IRQn, 1), /**< 8 SAMA5D3x Parallel I/O Controller C (PIOC) */ DEFINE_IRQ(PIOD_IRQn, 1), /**< 9 SAMA5D3x Parallel I/O Controller D (PIOD) */ DEFINE_IRQ(PIOE_IRQn, 1), /**< 10 SAMA5D3x Parallel I/O Controller E (PIOE) */ DEFINE_IRQ(SMD_IRQn, 1), /**< 11 SAMA5D3x SMD Soft Modem (SMD) */ DEFINE_IRQ(USART0_IRQn, 5), /**< 12 SAMA5D3x USART 0 (USART0) */ DEFINE_IRQ(USART1_IRQn, 5), /**< 13 SAMA5D3x USART 1 (USART1) */ DEFINE_IRQ(USART2_IRQn, 5), /**< 14 SAMA5D3x USART 2 (USART2) */ DEFINE_IRQ(USART3_IRQn, 5), /**< 15 SAMA5D3x USART 3 (USART3) */