static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
u8 bus = dev->bus->number;
u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
struct pci_bus *tmp_bus = dev->bus;
/* Primary bus, no interrupts here */
if (bus == 0) {
return -1;
}
/* Lookup first leaf in bus tree */
while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL)) {
tmp_bus = tmp_bus->parent;
}
/* Select between known bridges */
switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) {
/* Device is located after first MB bridge */
case 0x0008:
if (tmp_bus == dev->bus) {
/* Device is located directy after first MB bridge */
switch (devpin) {
case DEVPIN(1, 1): /* Onboard 82546 ch 0 */
if (machine_is_ixdp2401())
return IRQ_IXDP2401_INTA_82546;
return -1;
case DEVPIN(1, 2): /* Onboard 82546 ch 1 */
if (machine_is_ixdp2401())
return IRQ_IXDP2401_INTB_82546;
return -1;
case DEVPIN(0, 1): /* PMC INTA# */
return IRQ_IXDP2X01_SPCI_PMC_INTA;
case DEVPIN(0, 2): /* PMC INTB# */
return IRQ_IXDP2X01_SPCI_PMC_INTB;
case DEVPIN(0, 3): /* PMC INTC# */
return IRQ_IXDP2X01_SPCI_PMC_INTC;
case DEVPIN(0, 4): /* PMC INTD# */
return IRQ_IXDP2X01_SPCI_PMC_INTD;
}
}
break;
case 0x0010:
if (tmp_bus == dev->bus) {
/* Device is located directy after second MB bridge */
/* Secondary bus of second bridge */
switch (devpin) {
case DEVPIN(0, 1): /* DB#0 */
return IRQ_IXDP2X01_SPCI_DB_0;
case DEVPIN(1, 1): /* DB#1 */
return IRQ_IXDP2X01_SPCI_DB_1;
}
} else {
/* Device is located indirectly after second MB bridge */
/* Not supported now */
}
break;
}
return -1;
}
static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
u8 bus = dev->bus->number;
u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
struct pci_bus *tmp_bus = dev->bus;
/* */
if (!bus)
return -1;
/* */
while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL))
tmp_bus = tmp_bus->parent;
/* */
switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) {
/* */
case 0x0008:
if (tmp_bus == dev->bus) {
/* */
switch (devpin) {
/* */
case DEVPIN(1, 1): /* */
return IRQ_IXDP2351_INTA_82546;
case DEVPIN(1, 2): /* */
return IRQ_IXDP2351_INTB_82546;
/* */
case DEVPIN(0, 1): /* */
case DEVPIN(2, 4): /* */
return IRQ_IXDP2351_SPCI_PMC_INTA;
case DEVPIN(0, 2): /* */
case DEVPIN(2, 1): /* */
return IRQ_IXDP2351_SPCI_PMC_INTB;
case DEVPIN(0, 3): /* */
case DEVPIN(2, 2): /* */
return IRQ_IXDP2351_SPCI_PMC_INTC;
case DEVPIN(0, 4): /* */
case DEVPIN(2, 3): /* */
return IRQ_IXDP2351_SPCI_PMC_INTD;
}
} else {
/* */
/* */
return -1;
}
break;
case 0x0010:
if (tmp_bus == dev->bus) {
/* */
/* */
switch (devpin) {
case DEVPIN(0, 1): /* */
case DEVPIN(0, 2):
case DEVPIN(0, 3):
case DEVPIN(0, 4):
return IRQ_IXDP2351_SPCI_DB_0;
case DEVPIN(1, 1): /* */
case DEVPIN(1, 2):
case DEVPIN(1, 3):
case DEVPIN(1, 4):
return IRQ_IXDP2351_SPCI_DB_1;
case DEVPIN(2, 1): /* */
case DEVPIN(2, 2):
case DEVPIN(2, 3):
case DEVPIN(2, 4):
case DEVPIN(3, 1): /* */
case DEVPIN(3, 2):
case DEVPIN(3, 3):
case DEVPIN(3, 4):
return IRQ_IXDP2351_SPCI_FIC;
}
} else {
/* */
/* */
return -1;
}
break;
}
return -1;
}
