void DMAInit(void)
{
    DMA_disableTransferDuringReadModifyWrite();

    DMA_initParam initParam = {0};
    initParam.channelSelect = DMA_CHANNEL_0;
    initParam.transferModeSelect = DMA_TRANSFER_REPEATED_BLOCK;
    initParam.transferSize = 3;
    initParam.triggerSourceSelect = DMA_TRIGGERSOURCE_24;
    initParam.transferUnitSelect = DMA_SIZE_SRCWORD_DSTWORD;
    initParam.triggerTypeSelect = DMA_TRIGGER_RISINGEDGE;
    DMA_init(&initParam);

    DMA_setSrcAddress(DMA_CHANNEL_0,
                      ADC12_A_getMemoryAddressForDMA(ADC12_A_BASE,
                                                     ADC12_A_MEMORY_0),
                      DMA_DIRECTION_INCREMENT);

    DMA_setDstAddress(DMA_CHANNEL_0,
                      (uint32_t)&DMA_DST,
                      DMA_DIRECTION_INCREMENT);

    //Enable DMA channel 0 interrupt
    DMA_clearInterrupt(DMA_CHANNEL_0);
    DMA_enableInterrupt(DMA_CHANNEL_0);

    //Enable transfers on DMA channel 0
    DMA_enableTransfers(DMA_CHANNEL_0);
}
示例#2
0
void * memcpyDMA (void * dest, const void *  source, size_t count)
{
    if (count == 0){                                        //do nothing if zero bytes to transfer
        return (dest);
    }

    //DMA4 workaround - disable DMA transfers during read-modify-write CPU 
    //operations
#ifndef DRIVERLIB_LEGACY_MODE
    DMA_disableTransferDuringReadModifyWrite();
    DMA_setSrcAddress(USB_DMA_CHAN, (uint32_t)source, DMA_DIRECTION_INCREMENT);
    DMA_setDstAddress(USB_DMA_CHAN, (uint32_t)dest, DMA_DIRECTION_INCREMENT);
    //DMA4 workaround - re-enable DMA transfers during read-modify-write CPU 
    //operations
    DMA_enableTransferDuringReadModifyWrite();
    DMA_setTransferSize(USB_DMA_CHAN, count);
    DMA_enableTransfers(USB_DMA_CHAN);
    DMA_startTransfer(USB_DMA_CHAN);

    while (DMA_getInterruptStatus(USB_DMA_CHAN) == DMA_INT_INACTIVE);

    DMA_disableTransfers(USB_DMA_CHAN);
#else

    DMA_disableTransferDuringReadModifyWrite(DMA_BASE);
    DMA_setSrcAddress(DMA_BASE, USB_DMA_CHAN, (uint32_t)source, DMA_DIRECTION_INCREMENT);
    DMA_setDstAddress(DMA_BASE, USB_DMA_CHAN, (uint32_t)dest, DMA_DIRECTION_INCREMENT);
    //DMA4 workaround - re-enable DMA transfers during read-modify-write CPU 
    //operations
    DMA_enableTransferDuringReadModifyWrite(DMA_BASE);
    DMA_setTransferSize(DMA_BASE, USB_DMA_CHAN, count);
    DMA_enableTransfers(DMA_BASE, USB_DMA_CHAN);
    DMA_startTransfer(DMA_BASE, USB_DMA_CHAN);

    while (DMA_getInterruptStatus(DMA_BASE, USB_DMA_CHAN) == DMA_INT_INACTIVE);

    DMA_disableTransfers(DMA_BASE, USB_DMA_CHAN);
#endif

    return (dest);
}