void sc_dpidle_before_wfi(void)
{
#if 0
/* keep CA9 clock frequency when WFI to sleep */
topmisc = DRV_Reg32(TOP_MISC);
DRV_WriteReg32(TOP_MISC, (topmisc & ~(1U << 0)));
#endif
if (unlikely(get_chip_eco_ver() == CHIP_E1)) {
DRV_ClrReg32(WPLL_CON0, 0x1);
} else {
if (!(clk_mgr.subsys_state & 0x30) && clk_mgr.mmsys_state) {
mm_clk_pll2sq();
DRV_SetReg16(MDPLL_CON0, 0x1);
mmsys_switched_off = 1;
}
}
#ifndef CONFIG_LOCAL_TIMERS
if (mmsys_switched_off) {
dpidle_compare_update = dpidle_compare - dpidle_counter - 260;
} else {
dpidle_compare_update = dpidle_compare - dpidle_counter;
}
gpt_set_next_compare(dpidle_compare_update);
#endif
#ifdef CONFIG_LOCAL_WDT
wdt_counter_pre = mpcore_wdt_get_counter();
wdt_tick_pre = GPT_GetCounter(GPT2);
#endif
#ifdef PROFILE_DPIDLE
dpidle_tick_mid = GPT_GetCounter(GPT2);
#endif
}
void Uboot_power_saving(void)
{
#if 0
u32 u4Val = 0;
#if 0
printf("GPIO Set\n");
/* GPIO48~55, turn-off PWM 0~1 */
DRV_WriteReg32(0x80002660, 0x0555);
/* GPIO56~63, turn-off EINT 0~4 */
DRV_WriteReg32(0x80002670, 0x0015);
/* GPIO64~71, turn-off EINT 5~7, UART4 CTS/RTS */
DRV_WriteReg32(0x80002680, 0x1400);
/* GPIO112~119, turn-off KP Row2~4, CLK_OUT0~4 */
DRV_WriteReg32(0x800026E0, 0x0000);
/* GPIO128~135, Keep I2C SCL2 ,turn-off others */
DRV_WriteReg32(0x80002700, 0x4000);
/* GPIO136~143, Keep I2C SDA2 ,turn-off TRACE signal */
DRV_WriteReg32(0x80002710, 0x0001);
#endif
/* TV power down*/
DRV_ClrReg32(TVENC, 0x13E0);
/* AFE power down*/
DRV_WriteReg32(PDN_AFE_AAPDN, 0);
DRV_WriteReg32(PDN_AFE_AAC_NEW, 0);
DRV_WriteReg32(PDN_AFE_AAC_CON1, 0x0003);
/* MIPI power down
Jett: Don't power down MIPI during uboot, or the DPI signal would
be turned off and the uboot logo is disappeared
*/
#if 0
PW_DEBUG("MIPI power down\n");
DRV_WriteReg32(MIPI_PD_B00, 0);
DRV_WriteReg32(MIPI_PD_B04, 0);
DRV_WriteReg32(MIPI_PD_B08, 0);
DRV_WriteReg32(MIPI_PD_B0C, 0);
DRV_WriteReg32(MIPI_PD_B10, 0);
DRV_WriteReg32(MIPI_PD_B14, 0);
DRV_WriteReg32(MIPI_PD_B18, 0);
DRV_WriteReg32(MIPI_PD_B1C, 0);
DRV_WriteReg32(MIPI_PD_B40, 0);
DRV_WriteReg32(MIPI_PD_B44, 0);
DRV_WriteReg32(MIPI_PD_B48, 0);
DRV_WriteReg32(MIPI_PD_B4C, 0);
DRV_WriteReg32(MIPI_PD_04C, 1);
#endif
/* MCU CG*/
DRV_SetReg32 (APMCUSYS_PDN_SET0, (1<<8)|(1<<9)|(1<<21));
/* MCU memory PDN*/
u4Val = 0;
u4Val = ((1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<10)| \
(1<<11)|(1<<12)|(1<<13)|(1<<16) );
DRV_SetReg32 (MCU_MEM_PDN, u4Val);
/* GRAPH1SYS CG*/
DRV_SetReg32 (GRAPH1SYS_CG_SET, (1<<0));
/* GRAPH1SYS memory PDN*/
u4Val = 0;
u4Val = ((1<<2)|(1<<3)|(1<<4)|(1<<6)|(1<<9));
DRV_SetReg32 (G1_MEM_PDN, u4Val);
/* GRAPH2SYS CG */
DRV_SetReg32 (GRAPH2SYS_CG_SET, 0x1FF);
/* GRAPH2SYS memory PDN*/
u4Val = 0;
u4Val = ((1<<0));
DRV_SetReg32 (G2_MEM_PDN, u4Val);
/* GRAPH2SYS MTCMOS */
DRV_SetReg16(ISO_EN, 1<<4);
DRV_SetReg16(IN_ISO_EN, 1<<4 );
DRV_SetReg16(PWR_OFF, 1<<4 );
DRV_SetReg16(ACK_CLR, 0x2);
/* CEVA memory PDN*/
u4Val = 0;
u4Val = ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5));
DRV_SetReg32 (CEVA_MEM_PDN, u4Val);
/* CEVA MTCMOS */
DRV_SetReg16(ISO_EN, 1<<5);
DRV_SetReg16(IN_ISO_EN, 1<<5 );
DRV_SetReg16(PWR_OFF, 1<<5 );
DRV_SetReg16(ACK_CLR, 0x1);
/* Stop CEVA PLL*/
DRV_ClrReg32(CEVAPLL2,1<<0);
/* Stop UPLL*/
DRV_ClrReg32(PDN_CON,1<<4);
/* Stop DPLL*/
#if 0
printf("DPLL Power Down\n");
DRV_ClrReg32(PDN_CON,1<<3);
#endif
/* Stop VUSB */
//pmic_config_interface(0x3D, KAL_FALSE, VUSB_EN_MASK, VUSB_EN_SHIFT); //pmic_vsdio_enable(KAL_TRUE);
#endif
}
void Uboot_power_saving2(void)
{
#if 0
u32 u4Val = 0;
#if 0
printf("GPIO Set\n");
/* GPIO48~55, turn-off PWM 0~1 */
DRV_WriteReg32(0x80002660, 0x0555);
/* GPIO56~63, turn-off EINT 0~4 */
DRV_WriteReg32(0x80002670, 0x0015);
/* GPIO64~71, turn-off EINT 5~7, UART4 CTS/RTS */
DRV_WriteReg32(0x80002680, 0x1400);
/* GPIO112~119, turn-off KP Row2~4, CLK_OUT0~4 */
DRV_WriteReg32(0x800026E0, 0x0000);
/* GPIO128~135, Keep I2C SCL2 ,turn-off others */
DRV_WriteReg32(0x80002700, 0x4000);
/* GPIO136~143, Keep I2C SDA2 ,turn-off TRACE signal */
DRV_WriteReg32(0x80002710, 0x0001);
#endif
/* TV power down*/
DRV_ClrReg32(TVENC, 0x13E0);
/* AFE power down*/
DRV_WriteReg32(PDN_AFE_AAPDN, 0);
DRV_WriteReg32(PDN_AFE_AAC_NEW, 0);
DRV_WriteReg32(PDN_AFE_AAC_CON1, 0x0003);
/* MIPI power down*/
DRV_WriteReg32(MIPI_PD_B00, 0);
DRV_WriteReg32(MIPI_PD_B04, 0);
DRV_WriteReg32(MIPI_PD_B08, 0);
DRV_WriteReg32(MIPI_PD_B0C, 0);
DRV_WriteReg32(MIPI_PD_B10, 0);
DRV_WriteReg32(MIPI_PD_B14, 0);
DRV_WriteReg32(MIPI_PD_B18, 0);
DRV_WriteReg32(MIPI_PD_B1C, 0);
DRV_WriteReg32(MIPI_PD_B40, 0);
DRV_WriteReg32(MIPI_PD_B44, 0);
DRV_WriteReg32(MIPI_PD_B48, 0);
DRV_WriteReg32(MIPI_PD_B4C, 0);
DRV_WriteReg32(MIPI_PD_04C, 1);
#if 1
/* MCU CG*/
DRV_SetReg32 (APMCUSYS_PDN_SET0, (1<<8)|(1<<9)|(1<<21));
/* MCU memory PDN*/
u4Val = 0;
u4Val = ((1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<10)| \
(1<<11)|(1<<12)|(1<<13)|(1<<16) );
DRV_SetReg32 (MCU_MEM_PDN, u4Val);
#endif
#if 1
/* GRAPH1SYS CG*/
DRV_SetReg32 (GRAPH1SYS_CG_SET, (1<<0));
/* GRAPH1SYS memory PDN*/
u4Val = 0;
u4Val = ((1<<2)|(1<<3)|(1<<4)|(1<<6)|(1<<9));
DRV_SetReg32 (G1_MEM_PDN, u4Val);
/* GRAPH2SYS CG */
DRV_SetReg32 (GRAPH2SYS_CG_SET, 0x1FF);
/* GRAPH2SYS memory PDN*/
u4Val = 0;
u4Val = ((1<<0));
DRV_SetReg32 (G2_MEM_PDN, u4Val);
/* GRAPH2SYS MTCMOS */
DRV_SetReg16(ISO_EN, 1<<4);
DRV_SetReg16(IN_ISO_EN, 1<<4 );
DRV_SetReg16(PWR_OFF, 1<<4 );
DRV_SetReg16(ACK_CLR, 0x2);
#endif
/* CEVA memory PDN*/
u4Val = 0;
u4Val = ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5));
DRV_SetReg32 (CEVA_MEM_PDN, u4Val);
/* CEVA MTCMOS */
//printf("CEVA MTCMOS\n");
DRV_SetReg16(ISO_EN, 1<<5);
DRV_SetReg16(IN_ISO_EN, 1<<5 );
DRV_SetReg16(PWR_OFF, 1<<5 );
DRV_SetReg16(ACK_CLR, 0x1);
#if 1
/* Stop CEVA PLL*/
DRV_ClrReg32(CEVAPLL2,1<<0);
#endif
/* Stop UPLL*/
DRV_ClrReg32(PDN_CON,1<<4);
/* Stop DPLL*/
#if 0
printf("DPLL Power Down\n");
DRV_ClrReg32(PDN_CON,1<<3);
#endif
#endif
}
