void Speaker::playNote(uint8_t n,uint16_t dur){
	setNote(n);
	turnOn();
	DelayLoop(dur);
	turnOff();
	DelayLoop(5);
}
///////////////////////////////////////////////////////////////////////////////////
// Name: DoCristalCalibration
// Author: NIVIS LLC
// Description: calibrate the 24MHz clock
// Parameters: none
// Return: none
// Obs:
//      Access level: user level
///////////////////////////////////////////////////////////////////////////////////
void DoCristalCalibration (void)
{
  
//  uint8 ucOrigCTune = CRM_XTAL_CNTL.cTune;
  uint8 ucFinalCTune;
  uint8 aVersion[2];
  
  NVM_ReadPersistentData(aVersion, MANUFACTURING_START_ADDR, 2);
  
  if( (*(uint16*)aVersion != 0xFFFF) && ((*(uint16*)aVersion & 0xFEFE) == 0) ) // valid manufacturing version?
  {    
    NVM_ReadPersistentData(&ucFinalCTune, MANUFACTURING_START_ADDR + offsetof(T_MANUFACTURING,m_ucCristal), 1);  
    
    ucFinalCTune = (0x18 + ucFinalCTune) & 0x001F; // m_ucCristal
    CRM_XTAL_CNTL.fTune = 0x0F;
    
//    if( (ucOrigCTune ^ ucFinalCTune) & 0x10 ) // 4 pF capacitor is different, activate it first
    {
      DelayLoop(10*8000); // 10 ms
//      CRM_XTAL_CNTL.cTune = (ucFinalCTune & 0x10) | (ucOrigCTune & 0x0F);
      CRM_XTAL_CNTL.bulktune = (ucFinalCTune >> 4) & 0x01; // set bulk tune first (4 pF Capacitor)
    }
      
    DelayLoop(10*8000); // 10 ms
    CRM_XTAL_CNTL.cTune = ucFinalCTune & 0x0F;
  }
void AC97_write_codec(unsigned char ucReg, unsigned short usData)
{
	g_pAC97Reg->AC_CODEC_CMD = CMD_WRITE | CMD_ADDRESS(ucReg) | CMD_DATA(usData);
	DelayLoop(CMD_DELAY);

	g_pAC97Reg->AC_CODEC_CMD |= CMD_READ;	//To receive SLOTREQ bits when VRA is '1'
	DelayLoop(CMD_DELAY);
}
static void AC97_cold_reset(void)
{
	AC97_MSG((_T("[AC97] AC97_cold_reset()\n\r")));

	g_pAC97Reg->AC_GLBCTRL |= COLD_RESET;
	DelayLoop(CONTROL_DELAY);
	g_pAC97Reg->AC_GLBCTRL &= ~COLD_RESET;
	DelayLoop(CONTROL_DELAY);
}
static void AC97_warm_reset(void)
{
	AC97_MSG((_T("[AC97] AC97_warm_reset()\n\r")));

	g_pAC97Reg->AC_GLBCTRL |= WARM_RESET;
	DelayLoop(CONTROL_DELAY);
	g_pAC97Reg->AC_GLBCTRL &= ~WARM_RESET;
	DelayLoop(CONTROL_DELAY);
}
示例#6
0
int main(void)
{
    I2cInit( &I2c, I2C_SCL, I2C_SDA );

    GpioInit( &UsbDetect, USB_ON, PIN_INPUT, PIN_PUSH_PULL, PIN_NO_PULL, 0 );
    GpioInit( &DcDcEnable, DC_DC_EN, PIN_OUTPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );

    GpioInit( &RadioPushButton, RADIO_PUSH_BUTTON, PIN_INPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );
    
    GpioInit( &Led1, LED_1, PIN_OUTPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );
    GpioInit( &Led2, LED_2, PIN_OUTPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );
    GpioInit( &Led3, LED_3, PIN_OUTPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );
    GpioInit( &Led4, LED_4, PIN_OUTPUT, PIN_PUSH_PULL, PIN_NO_PULL, 1 );

    if( GpioRead( &RadioPushButton ) == 0 )
    { /* Test if user code is programmed starting from address 0x8003000 */
        if( ( ( *( volatile uint32_t* )ApplicationAddress ) & 0x2FFE0000 ) == 0x20000000 )
        { /* Jump to user application */

            JumpAddress = *( volatile uint32_t* )( ApplicationAddress + 4 );
            Jump_To_Application = ( pFunction ) JumpAddress;
            /* Initialize user application's Stack Pointer */
            __set_MSP( *( volatile uint32_t* ) ApplicationAddress );
            Jump_To_Application( );
        }
    } /* Otherwise enters DFU mode to allow user to program his application */

    /* Enter DFU mode */
    DeviceState = STATE_dfuERROR;
    DeviceStatus[0] = STATUS_ERRFIRMWARE;
    DeviceStatus[4] = DeviceState;

    UsbMcuInit( );

    /* Main loop */
    while (1)
    {
        GpioWrite( &Led1, 0 );
        GpioWrite( &Led2, 0 );
        GpioWrite( &Led3, 0 );
        GpioWrite( &Led4, 0 );
        DelayLoop( 500 );
        GpioWrite( &Led1, 1 );
        GpioWrite( &Led2, 1 );
        GpioWrite( &Led3, 1 );
        GpioWrite( &Led4, 1 );
        DelayLoop( 500 );
    }
}
void AC97_disable_ACLink_data_transfer(void)
{
	AC97_MSG((_T("[AC97] AC97_disable_ACLink_data_transfer()\n\r")));

	g_pAC97Reg->AC_GLBCTRL &= ~ACLINK_DATA_TRANSFER_ENABLE;
	DelayLoop(CONTROL_DELAY);
}
static void AC97_set_ACLink_Off(void)
{
	AC97_MSG((_T("[AC97] AC97_set_ACLink_Off()\n\r")));

	g_pAC97Reg->AC_GLBCTRL &= ~ACLINK_ON;
	DelayLoop(CONTROL_DELAY);
}
void NVM_FlashInit( void )
{
  // NVM_powerUp
  crmVRegCntl_t VRegCntl;
  
  VRegCntl.vReg = g1P8VReg_c;
  VRegCntl.cntl.vReg1P8VEn =1;
  
  CRM_VRegCntl(&VRegCntl);
  
  DelayLoop(8*1000); // min 1ms
  
  CRM_VREG_CNTL.vReg1P8VEn = 1; // NVM_StartNvmRegulator();
  while( !CRM_STATUS.vReg1P8VRdy ) // Wait for regulator to become active
      ;  
  
  DelayLoop( 1000 );
}
示例#10
0
void CTimer::usDelay (unsigned nMicroSeconds)
{
	if (nMicroSeconds > 0)
	{
		unsigned nCycles =  m_nusDelay * nMicroSeconds;

		DelayLoop (nCycles);
	}
}
示例#11
0
void CTimer::MsDelay (unsigned nMilliSeconds)
{
	if (nMilliSeconds > 0)
	{
		unsigned nCycles =  m_nMsDelay * nMilliSeconds;

		DelayLoop (nCycles);
	}
}
示例#12
0
void CRM_Init (void)
{
  //XtalAdjust
  //CRM_XTAL_CNTL.CTune = 0x15;//0x18;
  //CRM_XTAL_CNTL.FTune = 0x10;//0x0F;
  RTC_ExtRtcInit();
  
#if (HART_MODE != NONE)
  
  #if( (HART_DEV_KIT_REV == HART_DEV_KIT_REV3) ) 
    CRM_WU_CNTL_EXT_WU_EN   = 1;    // 1 = 0x0001 -> wake up on KBI_4
  #elif ( (HART_DEV_KIT_REV == HART_DEV_KIT_REV4) )   
    CRM_WU_CNTL_EXT_WU_EN   = 9;    // 9 = 0x1001 -> wake up on KBI_4 or KBI_7
  #endif 

#else
  
    CRM_WU_CNTL_EXT_WU_EN   = 0;    // no wake up    

#endif
    
  CRM_WU_CNTL_EXT_WU_POL &= ~4;   // internal Pullup for KBI_6(Wakeup and Status button)
    
  CRM_WU_CNTL_EXT_WU_IEN  = 0;    // without generating an interrupt
    
  CRM_WU_CNTL_TIMER_WU_EN   = 1;  // wake up from counter
  CRM_SLEEP_CNTL_RAM_RET    = 3;  // 3=96k
  CRM_SLEEP_CNTL_MCU_RET    = 1;  // e un must pt ticus
  CRM_SLEEP_CNTL_DIG_PAD_EN = 1;
    
  //  Set 32KHz pin in 1 to keep osc on ... only for old versions
  SET_GPIO_HI(KYB0_LINE);         // only for old versions of VN210 (C, D)
  CRM_WU_CNTL_EXT_OUT_POL = 0x01; // only for old versions of VN210 (C, D)

  //start the 32KHz osc
  _RINGOSC_CNTL.Bits.ROSC_EN=0;
  _XTAL32_CNTL.Bits.XTAL32_EN=1; //start the osc
  //XTAL32_CNTL = 1;  // !!!!!! wrong
  
  DelayLoop( 100 * 1000 );
  
  //source RTC_counter from 32KHz
  CRM_SYS_XTAL32_EXISTS = 1;  
  //reduce pwr consumption
  XTAL32_CNTL = 1;
          
  // set RTC interrupt    
  IntAssignHandler(gCrmInt_c, (IntHandlerFunc_t)RtcClock_Interrupt);
  ITC_SetPriority(gCrmInt_c, gItcFastPriority_c); //fiq
  ITC_EnableInterrupt(gCrmInt_c);
  g_ul250msStartTmr = RTC_COUNT; 
  RTC_TIMEOUT = RTC_32KHZ_250MS_TICS;
  CRM_WU_CNTL_RTC_WU_EN = 1;
  CRM_WU_CNTL_RTC_WU_IEN = 1;
}
unsigned short AC97_read_codec(unsigned char ucReg)
{
	unsigned short usVal;

	// Read Dummy
	usVal = STATUS_DATA(g_pAC97Reg->AC_CODEC_STAT);
	DelayLoop(CMD_DELAY);

	g_pAC97Reg->AC_CODEC_CMD = CMD_READ | CMD_ADDRESS(ucReg) | CMD_DATA(0x0);
	DelayLoop(CMD_DELAY);

	// Read Value
	usVal = STATUS_DATA(g_pAC97Reg->AC_CODEC_STAT);
	DelayLoop(CMD_DELAY);

	g_pAC97Reg->AC_CODEC_CMD |= CMD_READ;	//To receive SLOTREQ bits when VRA is '1'
	DelayLoop(CMD_DELAY);

	return usVal;
}
示例#14
0
void TimerusDelay (TTimer *pThis, unsigned nMicroSeconds)
{
	assert (pThis != 0);

	if (nMicroSeconds > 0)
	{
		unsigned nCycles =  pThis->m_nusDelay * nMicroSeconds;

		DelayLoop (nCycles);
	}
}
示例#15
0
void PROVISION_Init(void)
{        
    uint8 aProvBuffer[2+8+2+16];
    ReadPersistentData( aProvBuffer, MANUFACTURING_START_ADDR , sizeof(aProvBuffer) ); 

#if  (DEVICE_TYPE == DEV_TYPE_MC13225)
    const uint8 * pProv = aProvBuffer +2+8+2;
    
    g_ucPAValue = *(pProv++);
    
    if( g_ucPAValue > 0x1F )
    {
        g_ucPAValue = 0x0C;
    }
    
    uint8 ucProvCTune = *(pProv++);
      
    if( *(uint16*) aProvBuffer != 0xFFFF && (*(uint16*) aProvBuffer & 0xFEFE) ) // manufacturing version
    {
        CRM_XTAL_CNTL.fTune = *pProv; 
    }
    else
    {
        ucProvCTune = (0x18 + ucProvCTune) & 0x001F; // m_ucCristal
        CRM_XTAL_CNTL.fTune = 0x0F;
    }
    
    DelayLoop(10*8000); // 10 ms
    CRM_XTAL_CNTL.bulktune = (ucProvCTune >> 4) & 0x01; // set bulk tune first (4 uF Capacitor)
    
    DelayLoop(10*8000); // 10 ms
    CRM_XTAL_CNTL.cTune = ucProvCTune & 0x0F;
#endif

   // manufacturing data - BBR will receive manufacturing on different way
#if  !defined( BACKBONE_SUPPORT )     
    memcpy( c_oEUI64BE, aProvBuffer + 2, sizeof(c_oEUI64BE) );
    DLME_CopyReversedEUI64Addr( c_oEUI64LE, c_oEUI64BE );          
#endif              
}
示例#16
0
void Motion(unsigned char DATA0)
{
	unsigned char CS1;
	unsigned char CS2;
	
	CS1 = (Packet^pID^CMD^DATA0^DATA1) & 0xfe;
	CS2 = (~(Packet^pID^CMD^DATA0^DATA1)) & 0xfe;
	Send_Command(CS1, CS2, DATA0);

	printf("DATA0=%x\n", DATA0);
	printf("CS1=%x\n", CS1);
	printf("CS2=%x\n", CS2);
	DelayLoop(15000000);		// 3second delay
}
示例#17
0
void CRM_Init (void)
{
      //XtalAdjust
//    CRM_XTAL_CNTL.CTune = 0x18;
//    CRM_XTAL_CNTL.FTune = 0x0F;

    // hibernate init    
    CRM_WU_CNTL_EXT_WU_POL &= ~4 ;

    CRM_WU_CNTL_EXT_WU_EN = 1;   //wake up from Key_4 ; //wake up on level high is default at reset
    CRM_WU_CNTL_EXT_WU_IEN = 0;  //without generating an interrupt
    
    CRM_WU_CNTL_TIMER_WU_EN = 1; //wake up from counter
    CRM_SLEEP_CNTL_RAM_RET = 3;  //3=96k
    CRM_SLEEP_CNTL_MCU_RET = 1;  // e un must pt ticus
    CRM_SLEEP_CNTL_DIG_PAD_EN = 1;
    
    //start the 32KHz osc
    _RINGOSC_CNTL.Bits.ROSC_EN=0;
    _XTAL32_CNTL.Bits.XTAL32_EN=1; //start the osc
    
    DelayLoop( 1000 );
    
    //source RTC_counter from 32KHz
    CRM_SYS_XTAL32_EXISTS = 1;  
    //reduce pwr consumption
    XTAL32_CNTL = 1;
    
    
    // set RTC interrupt
    IntAssignHandler(gCrmInt_c, (IntHandlerFunc_t)RtcClock_Interrupt);
    ITC_SetPriority(gCrmInt_c, gItcFastPriority_c); //fiq
    ITC_EnableInterrupt(gCrmInt_c);
    g_ul250msStartTmr = RTC_COUNT; 
    RTC_TIMEOUT = CLK_250MS_32KHZ;
    CRM_WU_CNTL_RTC_WU_EN = 1;
    CRM_WU_CNTL_RTC_WU_IEN = 1;   
}
示例#18
0
void DelayUsec(unsigned int usec){
	while(usec--)
		DelayLoop(5);
}