// 08.03.14 by KYS // The function that initilize GPIO for DAT, CD and WP lines. BOOL CSDHController::InitGPIO() { volatile S3C6410_GPIO_REG *pIOPreg = NULL; pIOPreg = (volatile S3C6410_GPIO_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_GPIO, sizeof(S3C6410_GPIO_REG), FALSE); if (pIOPreg == NULL) { RETAILMSG(1, (TEXT("[HSMMC1] GPIO registers is *NOT* mapped.\n"))); return FALSE; } RETAILMSG(_DBG_, (TEXT("[HSMMC1] Setting registers for the GPIO.\n"))); #ifdef _SMDK6410_CH1_8BIT_ pIOPreg->GPHCON0 = (pIOPreg->GPHCON0 & ~(0xFFFFFFFF)) | (0x22222222); // 4'b0010 for the MMC 1 pIOPreg->GPHCON1 = (pIOPreg->GPHCON1 &~(0xFF)) | (0x22); // 4'b0010 for the MMC 1 pIOPreg->GPHPUD &= ~(0xFFFFF); // Pull-up/down disabled #else // DAT 4-Bit pIOPreg->GPHCON0 = (pIOPreg->GPHCON0 & ~(0xFFFFFF)) | (0x222222); // 4'b0010 for the MMC 1 pIOPreg->GPHPUD &= ~(0xFFF); // Pull-up/down disabled #endif #ifdef _SMDK6410_CH1_WP_ pIOPreg->GPFCON &= ~(0x3<<26); // WP_SD1 pIOPreg->GPFPUD &= ~(0x3<<26); // Pull-up/down disabled #endif pIOPreg->GPGCON = (pIOPreg->GPGCON & ~(0xF<<24)) | (0x3<<24); // MMC CDn1 pIOPreg->GPGPUD &= ~(0x3<<12); // Pull-up/down disabled DrvLib_UnmapIoSpace((PVOID)pIOPreg); return TRUE; }
~CPdd6400Serial3() { if(m_pSysconRegs) { m_pSysconRegs->PCLK_GATE &= ~(1<<4); // UART3 m_pSysconRegs->SCLK_GATE &= ~(1<<5); // UART0~3 } if (m_pIOPregs!=NULL) { DrvLib_UnmapIoSpace((PVOID)m_pIOPregs); } if (m_pSysconRegs!=NULL) { DrvLib_UnmapIoSpace((PVOID)m_pSysconRegs); } }
// 08.03.14 by KYS // The function that initilize SYSCON for a clock gating. BOOL CSDHController::InitClkPwr() { volatile S3C6410_SYSCON_REG *pCLKPWR = NULL; pCLKPWR = (volatile S3C6410_SYSCON_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_SYSCON, sizeof(S3C6410_SYSCON_REG), FALSE); if (pCLKPWR == NULL) { RETAILMSG(1, (TEXT("[HSMMC1] Clock & Power Management Special Register is *NOT* mapped.\n"))); return FALSE; } #ifdef _SRCCLK_48MHZ_ RETAILMSG(_DBG_, (TEXT("[HSMMC1] Setting registers for the USB48MHz (EXTCLK for SDCLK) : SYSCon.\n"))); // SCLK_HSMMC#_48 : CLK48M_PHY(OTH PHY 48MHz Clock Source from SYSCON block) // To use the USB clock, must be set the "USB_SIG_MASK" bit in the syscon register. pCLKPWR->OTHERS |= (0x1<<16); // set USB_SIG_MASK pCLKPWR->HCLK_GATE |= (0x1<<18); // Gating HCLK for HSMMC1 pCLKPWR->SCLK_GATE |= (0x1<<28); // Gating special clock for HSMMC1 (SCLK_MMC1_48) #else RETAILMSG(_DBG_, (TEXT("[HSMMC1] Setting registers for the EPLL (for SDCLK) : SYSCon.\n"))); // SCLK_HSMMC# : EPLLout, MPLLout, PLL_source_clk or CLK27 clock // (from SYSCON block, can be selected by MMC#_SEL[1:0] fields of the CLK_SRC register in SYSCON block) // Set the clock source to EPLL out for CLKMMC1 pCLKPWR->CLK_SRC = (pCLKPWR->CLK_SRC & ~(0x3<<20) & ~(0x1<<2)) | // Control MUX(MMC1:MOUT EPLL) (0x1<<2); // Control MUX(EPLL:FOUT EPLL) pCLKPWR->HCLK_GATE |= (0x1<<18); // Gating HCLK for HSMMC1 pCLKPWR->SCLK_GATE = (pCLKPWR->SCLK_GATE & ~(0x3F<<24)) | (0x1<<25); // Gating special clock for HSMMC1 (SCLK_MMC1) #endif DrvLib_UnmapIoSpace((PVOID)pCLKPWR); return TRUE; }
// 08.03.14 by KYS // The function that initilize the register for HSMMC Control. BOOL CSDHController::InitHSMMC() { volatile S3C6410_HSMMC_REG *pHSMMC = NULL; pHSMMC = (volatile S3C6410_HSMMC_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_HSMMC1, sizeof(S3C6410_HSMMC_REG), FALSE); if (pHSMMC == NULL) { RETAILMSG(1, (TEXT("[HSMMC1] HSMMC Special Register is *NOT* mapped.\n"))); return FALSE; } #ifdef _SRCCLK_48MHZ_ RETAILMSG(_DBG_, (TEXT("[HSMMC1] Setting registers for the USB48MHz (EXTCLK) : HSMMCCon.\n"))); // Set the clock source to USB_PHY for CLKMMC1 pHSMMC->CONTROL2 = (pHSMMC->CONTROL2 & ~(0xffffffff)) | (0x3<<9) | // Debounce Filter Count 0x3=64 iSDCLK (0x1<<8) | // SDCLK Hold Enable (0x3<<4); // Base Clock Source = External Clock #else RETAILMSG(_DBG_, (TEXT("[HSMMC1] Setting registers for the EPLL : HSMMCCon.\n"))); // Set the clock source to EPLL out for CLKMMC1 pHSMMC->CONTROL2 = (pHSMMC->CONTROL2 & ~(0xffffffff)) | (0x3<<9) | // Debounce Filter Count 0x3=64 iSDCLK (0x1<<8) | // SDCLK Hold Enable (0x2<<4); // Base Clock Source = EPLL out #endif DrvLib_UnmapIoSpace((PVOID)pHSMMC); return TRUE; }
// 08.03.14 by KYS // The function that initilize GPIO for DAT, CD and WP lines. BOOL CSDHController::InitGPIO() { volatile S3C6410_GPIO_REG *pIOPreg = NULL; pIOPreg = (volatile S3C6410_GPIO_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_GPIO, sizeof(S3C6410_GPIO_REG), FALSE); if (pIOPreg == NULL) { RETAILMSG(1, (TEXT("[HSMMC0] GPIO registers is *NOT* mapped.\n"))); return FALSE; } RETAILMSG(_DBG_, (TEXT("[HSMMC0] Setting registers for the GPIO.\n"))); pIOPreg->GPGCON = (pIOPreg->GPGCON & ~(0xFFFFFF)) | (0x222222); // 4'b0010 for the MMC 0 pIOPreg->GPGPUD &= ~(0xFFF); // Pull-up/down disabled #ifdef _SMDK6410_CH0_WP_ pIOPreg->GPNCON &= ~(0x3<<24); // WP_SD0 pIOPreg->GPNPUD &= ~(0x3<<24); // Pull-up/down disabled #endif #ifndef _SMDK6410_CH0_EXTCD_ pIOPreg->GPGCON = (pIOPreg->GPGCON & ~(0xF<<24)) | (0x2<<24); // SD CD0 pIOPreg->GPGPUD &= ~(0x3<<12); // Pull-up/down disabled #endif #ifdef _SMDK6410_CH0_EXTCD_ // 08.03.22 by KYS // Setting for card detect pin of HSMMC ch0 on SMDK6410. pIOPreg->GPNCON = ( pIOPreg->GPNCON & ~(0x3<<26) ) | (0x2<<26); // SD_CD0 by EINT13 pIOPreg->GPNPUD = ( pIOPreg->GPNPUD & ~(0x3<<26) ) | (0x0<<26); // pull-up/down disabled pIOPreg->EINT0CON0 = ( pIOPreg->EINT0CON0 & ~(0x7<<24)) | (0x7<<24); // Both edge triggered pIOPreg->EINT0PEND = ( pIOPreg->EINT0PEND | (0x1<<13) ); //clear EINT19 pending bit pIOPreg->EINT0MASK = ( pIOPreg->EINT0MASK & ~(0x1<<13)); //enable EINT19 #endif DrvLib_UnmapIoSpace((PVOID)pIOPreg); return TRUE; }
static void PWR_ReleaseResources(void) { PWRBTN_MSG((_T("[PWR] ++PWR_ReleaseResources()\r\n"))); if (g_pGPIOReg != NULL) { DrvLib_UnmapIoSpace((PVOID)g_pGPIOReg); g_pGPIOReg = NULL; } if (g_dwSysIntrPowerBtn != SYSINTR_UNDEFINED) { InterruptDisable(g_dwSysIntrPowerBtn); } if (g_hEventPowerBtn != NULL) { CloseHandle(g_hEventPowerBtn); } if (g_dwSysIntrPowerBtn != SYSINTR_UNDEFINED) { KernelIoControl(IOCTL_HAL_RELEASE_SYSINTR, &g_dwSysIntrPowerBtn, sizeof(DWORD), NULL, 0, NULL); } if (g_dwSysIntrResetBtn != SYSINTR_UNDEFINED) { InterruptDisable(g_dwSysIntrResetBtn); } if (g_hEventResetBtn != NULL) { CloseHandle(g_hEventResetBtn); } if (g_dwSysIntrResetBtn != SYSINTR_UNDEFINED) { KernelIoControl(IOCTL_HAL_RELEASE_SYSINTR, &g_dwSysIntrResetBtn, sizeof(DWORD), NULL, 0, NULL); } g_pGPIOReg = NULL; g_dwSysIntrPowerBtn = SYSINTR_UNDEFINED; g_dwSysIntrResetBtn = SYSINTR_UNDEFINED; g_hEventPowerBtn = NULL; g_hEventResetBtn = NULL; PWRBTN_MSG((_T("[PWR] --PWR_ReleaseResources()\r\n"))); }
// 08.03.22 by KYS // New function for enabling the Card detect interrupt of HSMMC ch0 on SMDK6410. BOOL CSDHController::EnableCardDetectInterrupt() { volatile S3C6410_GPIO_REG *pIOPreg = NULL; pIOPreg = (volatile S3C6410_GPIO_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_GPIO, sizeof(S3C6410_GPIO_REG), FALSE); if (pIOPreg == NULL) { RETAILMSG (1,(TEXT("[HSMMC0] GPIO registers is *NOT* mapped.\n"))); return FALSE; } pIOPreg->EINT0PEND = ( pIOPreg->EINT0PEND | (0x1<<13)); //clear EINT13 pending bit pIOPreg->EINT0MASK = ( pIOPreg->EINT0MASK & ~(0x1<<13)); //enable EINT13 DrvLib_UnmapIoSpace((PVOID)pIOPreg); return TRUE; }
static VOID TSP_VirtualFree(VOID) { TSPMSG((_T("[TSP] ++TSP_VirtualFree()\r\n"))); if (g_pGPIOReg) { DrvLib_UnmapIoSpace((PVOID)g_pGPIOReg); g_pGPIOReg = NULL; } if (g_pADCReg) { DrvLib_UnmapIoSpace((PVOID)g_pADCReg); g_pADCReg = NULL; } if (g_pVIC0Reg) { DrvLib_UnmapIoSpace((PVOID)g_pVIC0Reg); g_pVIC0Reg = NULL; } if (g_pVIC1Reg) { DrvLib_UnmapIoSpace((PVOID)g_pVIC1Reg); g_pVIC1Reg = NULL; } if (g_pPWMReg) { DrvLib_UnmapIoSpace((PVOID)g_pPWMReg); g_pPWMReg = NULL; } TSPMSG((_T("[TSP] --TSP_VirtualFree()\r\n"))); }
extern BOOL HcdPdd_Deinit(DWORD hDeviceContext) { SOhcdPdd * pPddObject = (SOhcdPdd *)hDeviceContext; USBH_MSG((_T("[USBH] HcdPdd_Deinit()\n\r"))); if(pPddObject->lpvOhcdMddObject) { HcdMdd_DestroyHcdObject(pPddObject->lpvOhcdMddObject); } if(pPddObject->lpvMemoryObject) { HcdMdd_DestroyMemoryObject(pPddObject->lpvMemoryObject); } if(pPddObject->pvVirtualAddress) { HalFreeCommonBuffer(&pPddObject->AdapterObject, pPddObject->dwPhysicalMemSize, pPddObject->LogicalAddress, pPddObject->pvVirtualAddress, FALSE); } if (pPddObject->IsrHandle) { FreeIntChainHandler(pPddObject->IsrHandle); pPddObject->IsrHandle = NULL; } if (pPddObject->hParentBusHandle) { CloseBusAccessHandle(pPddObject->hParentBusHandle); } free(pPddObject); if (g_pSysConReg) { //----------------------- // Deitialize Clock // HCLK, SCLK gate Mask //----------------------- g_pSysConReg->HCLK_GATE &= ~(0x1<<29); // HCLK_UHOST Mask (EVT1) g_pSysConReg->SCLK_GATE &= ~(0x1<<30); // SCLK_UHOST Mask DrvLib_UnmapIoSpace((PVOID)g_pSysConReg); g_pSysConReg = NULL; } return TRUE; }
BOOL CSerialPDD::Close() { if (InterlockedExchange(&m_lOpenCount,0) !=1) return FALSE; InitXmit(FALSE); InitReceive(FALSE); InitLine(FALSE); PREFAST_ASSERT(m_PowerHelperHandle!=INVALID_HANDLE_VALUE); ASSERT(m_hPowerLock!=NULL); DDKPwr_ReleaseLevel(m_PowerHelperHandle, m_hPowerLock); m_hPowerLock=NULL; if(cUart_Index==3) { //g_pIOPregs->GPCDAT &=~(1<<7); if (g_pIOPregs!=NULL) { DrvLib_UnmapIoSpace((PVOID)g_pIOPregs); } } return TRUE; }
/* InitializeOHCI * * Configure and initialize OHCI card * * Return Value: * Return TRUE if card could be located and configured, otherwise FALSE */ static BOOL InitializeOHCI( SOhcdPdd * pPddObject, // IN - Pointer to PDD structure LPCWSTR szDriverRegKey) // IN - Pointer to active registry key string { PUCHAR ioPortBase = NULL; DWORD dwAddrLen; DWORD dwIOSpace; BOOL InstallIsr = FALSE; BOOL fResult = FALSE; LPVOID pobMem = NULL; LPVOID pobOhcd = NULL; DWORD PhysAddr; DWORD dwHPPhysicalMemSize; HKEY hKey=NULL; DDKWINDOWINFO dwi; DDKISRINFO dii; USBH_MSG((_T("[USBH] ++InitializeOHCI()\n\r"))); g_pSysConReg = (S3C6410_SYSCON_REG *)DrvLib_MapIoSpace(S3C6410_BASE_REG_PA_SYSCON, sizeof(S3C6410_SYSCON_REG), FALSE); if (g_pSysConReg == NULL) { USBH_ERR((_T("[USBH:ERR] InitializeOHCI() : DrvLib_MapIoSpace() Failed\n"))); return FALSE; } #ifdef USE_SRCCLK_EPLL //----------------------- // Initialize Clock // ClkSrc = MOUT_EPLL (96MHz) // Divide by 2 (96/2=48MHz) // HCLK, SCLK gate pass //----------------------- g_pSysConReg->CLK_SRC = (g_pSysConReg->CLK_SRC & ~(0x3<<5)) | (0x1<<5); // UHOST_SEL : MoutEPLL g_pSysConReg->CLK_DIV1 = (g_pSysConReg->CLK_DIV1 & ~(0xf<<20)) | (0x1<<20); // UHOST_RATIO : 96 MHz / (1+1) = 48 MHz #else //----------------------- // Initialize Clock // ClkSrc = USB_PHY(48MHz) // Divide by 1 (48/1=48MHz) // HCLK, SCLK gate pass //----------------------- g_pSysConReg->OTHERS |= (1<<16); // Set SUB Signal Mask g_pSysConReg->CLK_SRC &= ~(0x3<<5); // UHOST_SEL : 48MHz g_pSysConReg->CLK_DIV1 &= ~(0xf<<20); // UHOST_RATIO : 48 MHz / (0+1) = 48 MHz #endif g_pSysConReg->HCLK_GATE |= (0x1<<29); // HCLK_UHOST Pass (EVT1) g_pSysConReg->SCLK_GATE |= (0x1<<30); // SCLK_UHOST Pass if (RegOpenKeyEx(HKEY_LOCAL_MACHINE,szDriverRegKey,0,0,&hKey)!= ERROR_SUCCESS) { DEBUGMSG(ZONE_ERROR,(TEXT("InitializeOHCI:GetRegistryConfig RegOpenKeyEx(%s) failed\r\n"), szDriverRegKey)); return FALSE; } dwi.cbSize=sizeof(dwi); dii.cbSize=sizeof(dii); if ( (DDKReg_GetWindowInfo(hKey, &dwi ) != ERROR_SUCCESS) || (DDKReg_GetIsrInfo (hKey, &dii ) != ERROR_SUCCESS)) { DEBUGMSG(ZONE_ERROR,(TEXT("InitializeOHCI:DDKReg_GetWindowInfo or DDKReg_GetWindowInfo failed\r\n"))); goto InitializeOHCI_Error; } if (dwi.dwNumMemWindows!=0) { PhysAddr = dwi.memWindows[0].dwBase; dwAddrLen= dwi.memWindows[0].dwLen; dwIOSpace = 0; } else if (dwi.dwNumIoWindows!=0) { PhysAddr= dwi.ioWindows[0].dwBase; dwAddrLen = dwi.ioWindows[0].dwLen; dwIOSpace = 1; } else { goto InitializeOHCI_Error; } DEBUGMSG(ZONE_INIT,(TEXT("OHCD: Read config from registry: Base Address: 0x%X, Length: 0x%X, I/O Port: %s, SysIntr: 0x%X, Interface Type: %u, Bus Number: %u\r\n"), PhysAddr, dwAddrLen, dwIOSpace ? L"YES" : L"NO", dii.dwSysintr, dwi.dwInterfaceType, dwi.dwBusNumber)); ioPortBase = (PBYTE) PhysAddr; if (!(fResult = ConfigureOHCICard(pPddObject, &ioPortBase, dwAddrLen, dwIOSpace,(INTERFACE_TYPE)dwi.dwInterfaceType, dwi.dwBusNumber))) { goto InitializeOHCI_Error; } if (dii.szIsrDll[0] != 0 && dii.szIsrHandler[0]!=0 && dii.dwIrq<0xff && dii.dwIrq>0 ) { // Install ISR handler pPddObject->IsrHandle = LoadIntChainHandler(dii.szIsrDll, dii.szIsrHandler, (BYTE)dii.dwIrq); if (!pPddObject->IsrHandle) { DEBUGMSG(ZONE_ERROR, (L"OHCD: Couldn't install ISR handler\r\n")); } else { GIISR_INFO Info; PHYSICAL_ADDRESS PortAddress = {PhysAddr, 0}; DEBUGMSG(ZONE_INIT, (L"OHCD: Installed ISR handler, Dll = '%s', Handler = '%s', Irq = %d\r\n", dii.szIsrDll, dii.szIsrHandler, dii.dwIrq)); if (!BusTransBusAddrToStatic(pPddObject->hParentBusHandle,(INTERFACE_TYPE)dwi.dwInterfaceType, dwi.dwBusNumber, PortAddress, dwAddrLen, &dwIOSpace, (PPVOID)&PhysAddr)) { DEBUGMSG(ZONE_ERROR, (L"OHCD: Failed TransBusAddrToStatic\r\n")); goto InitializeOHCI_Error; } // Set up ISR handler Info.SysIntr = dii.dwSysintr; Info.CheckPort = TRUE; Info.PortIsIO = (dwIOSpace) ? TRUE : FALSE; Info.UseMaskReg = TRUE; Info.PortAddr = PhysAddr + 0x0C; Info.PortSize = sizeof(DWORD); Info.MaskAddr = PhysAddr + 0x10; if (!KernelLibIoControl(pPddObject->IsrHandle, IOCTL_GIISR_INFO, &Info, sizeof(Info), NULL, 0, NULL)) { DEBUGMSG(ZONE_ERROR, (L"OHCD: KernelLibIoControl call failed.\r\n")); } } } // The PDD can supply a buffer of contiguous physical memory here, or can let the // MDD try to allocate the memory from system RAM. We will use the HalAllocateCommonBuffer() // API to allocate the memory and bus controller physical addresses and pass this information // into the MDD. if (GetRegistryPhysicalMemSize(szDriverRegKey,&pPddObject->dwPhysicalMemSize)) { // A quarter for High priority Memory. dwHPPhysicalMemSize = pPddObject->dwPhysicalMemSize/4; // Align with page size. pPddObject->dwPhysicalMemSize = (pPddObject->dwPhysicalMemSize + PAGE_SIZE -1) & ~(PAGE_SIZE -1); dwHPPhysicalMemSize = ((dwHPPhysicalMemSize + PAGE_SIZE -1) & ~(PAGE_SIZE -1)); } else { pPddObject->dwPhysicalMemSize=0; dwHPPhysicalMemSize = 0 ; } if (pPddObject->dwPhysicalMemSize<gcTotalAvailablePhysicalMemory) { // Setup Minimun requirement. pPddObject->dwPhysicalMemSize = gcTotalAvailablePhysicalMemory; dwHPPhysicalMemSize = gcHighPriorityPhysicalMemory; } pPddObject->AdapterObject.ObjectSize = sizeof(DMA_ADAPTER_OBJECT); pPddObject->AdapterObject.InterfaceType = dwi.dwInterfaceType; pPddObject->AdapterObject.BusNumber = dwi.dwBusNumber; if ((pPddObject->pvVirtualAddress = HalAllocateCommonBuffer(&pPddObject->AdapterObject, pPddObject->dwPhysicalMemSize, &pPddObject->LogicalAddress, FALSE)) == NULL) { goto InitializeOHCI_Error; } if (!(pobMem = HcdMdd_CreateMemoryObject(pPddObject->dwPhysicalMemSize, dwHPPhysicalMemSize, (PUCHAR) pPddObject->pvVirtualAddress, (PUCHAR) pPddObject->LogicalAddress.LowPart))) { goto InitializeOHCI_Error; } if (!(pobOhcd = HcdMdd_CreateHcdObject(pPddObject, pobMem, szDriverRegKey, ioPortBase, dii.dwSysintr))) { goto InitializeOHCI_Error; } pPddObject->lpvMemoryObject = pobMem; pPddObject->lpvOhcdMddObject = pobOhcd; _tcsncpy(pPddObject->szDriverRegKey, szDriverRegKey, MAX_PATH); pPddObject->ioPortBase = ioPortBase; pPddObject->dwSysIntr = dii.dwSysintr; // PCI OHCI support suspend and resume if ( hKey!=NULL) { DWORD dwCapability; DWORD dwType; DWORD dwLength = sizeof(DWORD); if (RegQueryValueEx(hKey, HCD_CAPABILITY_VALNAME, 0, &dwType, (PUCHAR)&dwCapability, &dwLength) == ERROR_SUCCESS) { HcdMdd_SetCapability(pobOhcd, dwCapability); USBH_INF((_T("[USBH:INF] InitializeOHCI() : USB Host Cap : 0x%08x\n"), dwCapability)); } RegCloseKey(hKey); } USBH_MSG((_T("[USBH] --InitializeOHCI() : Success\n\r"))); return TRUE; InitializeOHCI_Error: if (g_pSysConReg != NULL) { DrvLib_UnmapIoSpace((PVOID)g_pSysConReg); g_pSysConReg = NULL; } if (pPddObject->IsrHandle) { FreeIntChainHandler(pPddObject->IsrHandle); pPddObject->IsrHandle = NULL; } if (pobOhcd) { HcdMdd_DestroyHcdObject(pobOhcd); } if (pobMem) { HcdMdd_DestroyMemoryObject(pobMem); } if(pPddObject->pvVirtualAddress) { HalFreeCommonBuffer(&pPddObject->AdapterObject, pPddObject->dwPhysicalMemSize, pPddObject->LogicalAddress, pPddObject->pvVirtualAddress, FALSE); } pPddObject->lpvMemoryObject = NULL; pPddObject->lpvOhcdMddObject = NULL; pPddObject->pvVirtualAddress = NULL; if ( hKey!=NULL) { RegCloseKey(hKey); } USBH_ERR((_T("[USBH:ERR] --InitializeOHCI() : Error\n\r"))); return FALSE; }