/* * initEdma() - Initialize the DMA controller. Use linked transfers to * automatically transition from ping to pong and visa-versa. */ void initEdma(void) { /* Configure transmit channel */ hEdmaXmt = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET); // get hEdmaXmt handle and reset channel hEdmaReloadXmtPing = EDMA_allocTable(-1); // get hEdmaReloadXmtPing handle hEdmaReloadXmtPong = EDMA_allocTable(-1); // get hEdmaReloadXmtPong handle gEdmaConfigXmt.dst = MCBSP_getXmtAddr(hMcbsp1); // set the desination address to McBSP1 DXR gXmtChan = EDMA_intAlloc(-1); // get an open TCC gEdmaConfigXmt.opt |= EDMA_FMK(OPT,TCC,gXmtChan); // set TCC to gXmtChan EDMA_config(hEdmaXmt, &gEdmaConfigXmt); // then configure the registers EDMA_config(hEdmaReloadXmtPing, &gEdmaConfigXmt); // and the reload for Ping gEdmaConfigXmt.src = EDMA_SRC_OF(gBufferXmtPong); // change the structure to have a source of Pong EDMA_config(hEdmaReloadXmtPong, &gEdmaConfigXmt); // and configure the reload for Pong EDMA_link(hEdmaXmt,hEdmaReloadXmtPong); // link the regs to Pong EDMA_link(hEdmaReloadXmtPong,hEdmaReloadXmtPing); // link Pong to Ping EDMA_link(hEdmaReloadXmtPing,hEdmaReloadXmtPong); // and link Ping to Pong /* Configure receive channel */ hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); // get hEdmaRcv handle and reset channel hEdmaReloadRcvPing = EDMA_allocTable(-1); // get hEdmaReloadRcvPing handle hEdmaReloadRcvPong = EDMA_allocTable(-1); // get hEdmaReloadRcvPong handle gEdmaConfigRcv.src = MCBSP_getRcvAddr(hMcbsp1); // and the desination address to McBSP1 DXR gRcvChan = EDMA_intAlloc(-1); // get an open TCC gEdmaConfigRcv.opt |= EDMA_FMK(OPT,TCC,gRcvChan); // set TCC to gRcvChan EDMA_config(hEdmaRcv, &gEdmaConfigRcv); // then configure the registers EDMA_config(hEdmaReloadRcvPing, &gEdmaConfigRcv); // and the reload for Ping gEdmaConfigRcv.dst = EDMA_DST_OF(gBufferRcvPong); // change the structure to have a destination of Pong EDMA_config(hEdmaReloadRcvPong, &gEdmaConfigRcv); // and configure the reload for Pong EDMA_link(hEdmaRcv,hEdmaReloadRcvPong); // link the regs to Pong EDMA_link(hEdmaReloadRcvPong,hEdmaReloadRcvPing); // link Pong to Ping EDMA_link(hEdmaReloadRcvPing,hEdmaReloadRcvPong); // and link Ping to Pong /* Enable interrupts in the EDMA controller */ EDMA_intClear(gXmtChan); EDMA_intClear(gRcvChan); // clear any possible spurious interrupts EDMA_intEnable(gXmtChan); // enable EDMA interrupts (CIER) EDMA_intEnable(gRcvChan); // enable EDMA interrupts (CIER) EDMA_enableChannel(hEdmaXmt); // enable EDMA channel EDMA_enableChannel(hEdmaRcv); // enable EDMA channel /* Do a dummy write to generate the first McBSP transmit event */ MCBSP_write(hMcbsp1, 0); }
void DSK6713_configure_AIC23() { /* Configure McBSP0 as control interface for aic23 */ MCBSP_Handle MCBSP0_handle; MCBSP0_handle = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET); MCBSP_config(MCBSP0_handle, &MCBSP0_config); MCBSP_start(MCBSP0_handle, MCBSP_XMIT_START | MCBSP_SRGR_START | MCBSP_SRGR_START, 220); set_aic23_register(MCBSP0_handle, RESET_REGISTER, 0x0000); set_aic23_register(MCBSP0_handle, POWER_DOWN_CONTROL, 0x0000); set_aic23_register(MCBSP0_handle, LEFT_LINE_INPUT_CHANNEL_VOLUME, 0x0017); set_aic23_register(MCBSP0_handle, RIGHT_LINE_INPUT_CHANNEL_VOLUME, 0x0017); set_aic23_register(MCBSP0_handle, LEFT_CHANNEL_HEADPHONE_VOLUME, 0x00f9); set_aic23_register(MCBSP0_handle, RIGHT_CHANNEL_HEADPHONE_VOLUME, 0x00f9); set_aic23_register(MCBSP0_handle, ANALOG_AUDIO_PATH, 0x0011); // 00001 0010 set_aic23_register(MCBSP0_handle, DIGITAL_AUDIO_PATH, 0x0000); // 000000000 set_aic23_register(MCBSP0_handle, DIGITAL_AUDIO_INTERFACE_FORMAT, 0x0043); //0 0100 0001 set_aic23_register(MCBSP0_handle, SAMPLE_RATE_CONTROL, 0x000d); // 01100 set_aic23_register(MCBSP0_handle, DIGITAL_INTERFACE_ACTIVATION, 0x0001); /* Configure McBSP1 as data interface for aic23 */ MCBSP_Handle MCBSP1_handle; MCBSP1_handle = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET); MCBSP_config(MCBSP1_handle, &MCBSP1_config); MCBSP_start(MCBSP1_handle, MCBSP_XMIT_START|MCBSP_RCV_START|MCBSP_SRGR_FRAMESYNC|MCBSP_SRGR_START, 220); /* Configure receive EDMA */ EDMA_Handle hEdmaRcv; EDMA_Handle hEdmaRcvA; EDMA_Handle hEdmaRcvB; hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); hEdmaRcvA = EDMA_allocTable(-1); hEdmaRcvB = EDMA_allocTable(-1); gEdmaRcvConfig.src = MCBSP_getRcvAddr(MCBSP1_handle); // Get address of DRR gTccRcvChan = EDMA_intAlloc(-1); // get next free transfer complete code gEdmaRcvConfig.opt |= EDMA_FMK(OPT, TCC, gTccRcvChan); EDMA_config(hEdmaRcv, &gEdmaRcvConfig); EDMA_config(hEdmaRcvA, &gEdmaRcvConfig); gEdmaRcvConfig.dst = EDMA_DST_OF(gRcvBufferB); EDMA_config(hEdmaRcvB, &gEdmaRcvConfig); EDMA_link(hEdmaRcv, hEdmaRcvB); EDMA_link(hEdmaRcvB, hEdmaRcvA); EDMA_link(hEdmaRcvA, hEdmaRcvB); /* Configure transmit EDMA */ EDMA_Handle hEdmaXmt; EDMA_Handle hEdmaXmtA; EDMA_Handle hEdmaXmtB; hEdmaXmt = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET); hEdmaXmtA = EDMA_allocTable(-1); hEdmaXmtB = EDMA_allocTable(-1); gEdmaXmtConfig.dst = MCBSP_getXmtAddr(MCBSP1_handle); // Get address of DXR gTccXmtChan = EDMA_intAlloc(-1); // get next free transfer complete code gEdmaXmtConfig.opt |= EDMA_FMK(OPT, TCC, gTccXmtChan); EDMA_config(hEdmaXmt, &gEdmaXmtConfig); EDMA_config(hEdmaXmtA, &gEdmaXmtConfig); gEdmaXmtConfig.src = EDMA_DST_OF(gXmtBufferB); // set source to buffer B EDMA_config(hEdmaXmtB, &gEdmaXmtConfig); EDMA_link(hEdmaXmt, hEdmaXmtB); EDMA_link(hEdmaXmtB, hEdmaXmtA); EDMA_link(hEdmaXmtA, hEdmaXmtB); EDMA_intClear(gTccRcvChan); EDMA_intClear(gTccXmtChan); EDMA_intEnable(gTccRcvChan); EDMA_intEnable(gTccXmtChan); gBufferState.cpuBufferState = StateB; // inittial cpu buffer state EDMA_enableChannel(hEdmaRcv); EDMA_enableChannel(hEdmaXmt); IRQ_clear(IRQ_EVT_EDMAINT); IRQ_enable(IRQ_EVT_EDMAINT); MCBSP_write(MCBSP1_handle, 0x00); }
*/ EDMA_Config gEdmaRcvConfig = { EDMA_OPT_RMK( EDMA_OPT_PRI_LOW, EDMA_OPT_ESIZE_32BIT, EDMA_OPT_2DS_NO, EDMA_OPT_SUM_NONE, // no source address update EDMA_OPT_2DD_NO, EDMA_OPT_DUM_INC, // increment destination address EDMA_OPT_TCINT_YES, // Source address update mode EDMA_OPT_TCC_DEFAULT, EDMA_OPT_LINK_YES, EDMA_OPT_FS_NO), // Frame synchronisation, we copy element by element EDMA_SRC_OF(0x00000000), // EDMA Channel Source Address EDMA_CNT_RMK(0, 108), // Frame count (FRMCNT), Element count (FRMCNT) EDMA_DST_OF((Uint32) &gRcvBufferA), // EDMA Channel Destination Address EDMA_IDX_RMK(EDMA_IDX_FRMIDX_DEFAULT, EDMA_IDX_ELEIDX_DEFAULT), // Frame index, Element index EDMA_RLD_RMK(0x0000, 0x0000) // Element count reload, Link address }; /* * EDMA transmit channel config */ EDMA_Config gEdmaXmtConfig = { EDMA_OPT_RMK( EDMA_OPT_PRI_LOW, EDMA_OPT_ESIZE_32BIT, EDMA_OPT_2DS_NO, EDMA_OPT_SUM_INC, // increment source address EDMA_OPT_2DD_NO, EDMA_OPT_DUM_NONE, // don't update destination (TDR)