int16_t
inqueue_get(queue_t *q, int timeout) {
StatusType rc;
uint64_t deadline = 0;
uint8_t value;
if (timeout > TIMEOUT_NOBLOCK) {
deadline = timeout + CoGetOSTime();
}
DISABLE_IRQ();
while (q->count == 0) {
ENABLE_IRQ();
if (timeout == TIMEOUT_NOBLOCK) {
return EERR_TIMEOUT;
}
rc = CoWaitForSingleFlag(q->flag,
timeout == TIMEOUT_FOREVER ? 0 : (CoGetOSTime() - deadline));
if (rc != E_OK) {
return EERR_TIMEOUT;
}
DISABLE_IRQ();
}
q->count--;
value = *q->p_read++;
if (q->p_read == q->p_top) {
q->p_read = q->p_bot;
}
ENABLE_IRQ();
return value;
}
void sem_down(struct sem_s* sem) {
DISABLE_IRQ();
if (sem->val <= 0) {
// Initializing "wait_proc"
struct waiting_process* wait_proc = (struct waiting_process*) malloc_alloc(sizeof(struct waiting_process));
wait_proc->process = current_process;
wait_proc->next = 0;
// If the waiting queue is empty, we put our process as the first (and only) waiting element
if (sem->waiting == 0) {
sem->last_process = wait_proc;
sem->queue = wait_proc;
}
// Otherwise we put it at the end of the queue
else {
sem->last_process->next = wait_proc;
sem->last_process = wait_proc;
}
sem->waiting += 1;
current_process->state = WAITING;
ENABLE_IRQ();
while(current_process->state== WAITING){
//DO NOTHING
}
}
else {
sem->val -= 1;
ENABLE_IRQ();
}
}
void
outqueue_drain(queue_t *q) {
DISABLE_IRQ();
while (1) {
if (q->count == 0) {
break;
}
ENABLE_IRQ();
__ISB();
DISABLE_IRQ();
}
ENABLE_IRQ();
}
void kmain()
{
init_kernel();
int ret;
ret = sys_setscheduler(ROUND_ROBIN_SCHED); // returns 0
create_process(&process1);
create_process(&process2);
create_process(&process3);
start_kernel();
while (current_process != current_process->next || current_process != current_process->previous) ;
DISABLE_IRQ();
ret = sys_setscheduler(RANDOM_SCHED);
create_process(&process1);
create_process(&process2);
create_process(&process3);
ENABLE_IRQ();
while (current_process != current_process->next || current_process != current_process->previous) ;
DISABLE_IRQ();
ret = sys_setscheduler(FIXED_PRIORITY_SCHED);
create_process_with_fix_priority(&process1, 5);
create_process_with_fix_priority(&process2, 2);
create_process_with_fix_priority(&process3, 4);
ENABLE_IRQ();
while (current_process != current_process->next || current_process != current_process->previous) ;
DISABLE_IRQ();
ret = sys_setscheduler(DYNAMIC_PRIORITY_SCHED);
create_process(&process1);
create_process(&process2);
create_process(&process3);
ENABLE_IRQ();
while (current_process != current_process->next || current_process != current_process->previous) ;
ret = sys_setscheduler(-50); // fail (returns -1)
ret++;
}
/* currently unused */
static int slm_mode_select( int device, char *buffer, int len,
int default_flag )
{ int stat, rv;
struct slm *sip = &slm_info[device];
stdma_lock( NULL, NULL );
CMDSET_TARG_LUN( slmmselect_cmd, sip->target, sip->lun );
slmmselect_cmd[5] = default_flag ? 0x80 : 0;
if (!acsicmd_nodma( slmmselect_cmd, 0 )) {
rv = SLMSTAT_ACSITO;
goto the_end;
}
if (!default_flag) {
unsigned char c = len;
if (!acsi_extcmd( &c, 1 )) {
rv = SLMSTAT_ACSITO;
goto the_end;
}
if (!acsi_extcmd( buffer, len )) {
rv = SLMSTAT_ACSITO;
goto the_end;
}
}
stat = acsi_getstatus();
rv = (stat < 0 ? SLMSTAT_ACSITO : stat);
the_end:
ENABLE_IRQ();
stdma_release();
return( rv );
}
int main()
{
uart_config_t uart_conf;
DISABLE_IRQ();
hal_clk_init();
sys_tick_init();
I2cInit( &I2c, I2C_SCL, I2C_SDA );
uart_conf.baud = 9600;
uart_conf.word_length = 8;
uart_conf.parity = NONE;
uart_conf.stop_bits = 1;
uart_init(&uart_conf);
ENABLE_IRQ();
app_init();
DISABLE_IRQ();
led_init();
while(1){
/** polling all events */
app_evt();
led_evt();
}
}
int lpptest_ioctl(struct inode *inode, struct file *file, unsigned int ioctl_num, unsigned long ioctl_param)
{
int retval = 0;
switch (ioctl_num) {
case LPPTEST_DISABLE:
DISABLE_IRQ();
break;
case LPPTEST_ENABLE:
ENABLE_IRQ();
break;
case LPPTEST_TEST: {
cycles_t diff = test_response();
if (copy_to_user((void *)ioctl_param, (void*) &diff, sizeof(diff)))
goto errcpy;
break;
}
default: retval = -EINVAL;
}
return retval;
errcpy:
return -EFAULT;
}
void mtx_unlock(struct mtx_s* mutex){
DISABLE_IRQ();
if (current_process == mutex->owner) {
sem_up(mutex->sem_mtx);
}
ENABLE_IRQ();
}
int
main(void)
{
cpu_init();
/* Initialize UART connected to Galileo Gen2 FTDI header */
quarkX1000_uart_init(QUARK_X1000_UART_1);
clock_init();
rtimer_init();
printf("Starting Contiki\n");
ENABLE_IRQ();
process_init();
procinit_init();
ctimer_init();
autostart_start(autostart_processes);
eth_init();
while(1) {
process_run();
}
return 0;
}
int kmain( void )
{
struct pcb_s* process_screen_right_pcb;
struct pcb_s* process_screen_top_left_pcb;
struct pcb_s* process_screen_bottom_left_pcb;
FramebufferInitialize();
sched_init();
process_screen_right_pcb = sys_create_process((func_t*)&process_screen_right, 18);
process_screen_top_left_pcb = sys_create_process((func_t*)&process_screen_top_left, 20);
process_screen_bottom_left_pcb = sys_create_process((func_t*)&process_screen_bottom_left, 20);
// ******************************************
// switch CPU to USER mode
// ******************************************
ENABLE_IRQ();
__asm("cps 0x10");
// USER Program
// ******************************************
//On attend la terminaison de notre processus.
sys_wait(process_screen_right_pcb);
sys_wait(process_screen_top_left_pcb);
sys_wait(process_screen_bottom_left_pcb);
return 0;
}
/*=============================================================================
* Function :
* Description :
* Input Para :
* Output Para :
* Return Value :
=============================================================================*/
void drv_all_init(void)
{
ENABLE_IRQ();
led_init();
led_on(2);
uart_init();
systick_init();
// hwtm_init();
// key_init();
// rtc_init();
// SRAM_Init();
/* Initialize the LCD */
// STM3210E_LCD_Init();
// adc_init();
// return 0;
}
void
cli_cmd_profile(char *cmdline) {
uint64_t task_counts[CFG_MAX_USER_TASKS+SYS_TASK_NUM];
uint64_t count, pct, total = 0;
void *heap;
int i;
DISABLE_IRQ();
for(i = 0; i < CFG_MAX_USER_TASKS+SYS_TASK_NUM; i++) {
task_counts[i] = count = TCBTbl[i].tick_count;
total += count;
}
ENABLE_IRQ();
cli_printf("# Counts %% Name\r\n");
for(i = 0; i < CFG_MAX_USER_TASKS+SYS_TASK_NUM; i++) {
count = task_counts[i];
pct = 10000 * count / total;
cli_printf("%2d %08x%08x %3u.%02u%% %s\r\n",
i,
(uint32_t)(count >> 32),
(uint32_t)count,
(uint32_t)(pct / 100),
(uint32_t)(pct % 100),
TCBTbl[i].name);
}
heap = _sbrk(0);
if (heap != (void*)-1) {
cli_printf("Heap usage: %d bytes\r\n", heap - (void*)&_sheap);
}
}
void
monotonic_sleep_until(uint64_t mono_when) {
mono_when -= mono_when % MONO_PERIOD;
DISABLE_IRQ();
sleep_epoch = mono_when;
ENABLE_IRQ();
xSemaphoreTake(sleep_flag, portMAX_DELAY);
}
void start_sched()
{
ENABLE_IRQ();
set_tick_and_enable_timer();
//struct pcb_s* pcb = ALLOC(struct pcb_s);
//pcb_cycle_add(g_process_list_current, pcb);
}
int16_t
outqueue_put(queue_t *q, const uint8_t *value, uint16_t size, int timeout) {
StatusType rc;
uint64_t deadline = 0;
if (timeout > TIMEOUT_NOBLOCK) {
deadline = timeout + CoGetOSTime();
}
DISABLE_IRQ();
while (size) {
while (q->count == q->size) {
/* Wake this thread up when the buffer has room for all remaining
* bytes, or is empty. */
if (size > q->size) {
q->wakeup = 0;
} else {
q->wakeup = q->size - size;
}
ENABLE_IRQ();
if (q->cb_func) {
q->cb_func(q->cb_arg);
}
if (timeout == TIMEOUT_NOBLOCK) {
return EERR_TIMEOUT;
}
rc = CoWaitForSingleFlag(q->flag,
timeout == TIMEOUT_FOREVER ? 0 : (CoGetOSTime() - deadline));
if (rc != E_OK) {
return EERR_TIMEOUT;
}
DISABLE_IRQ();
}
size--;
q->count++;
*q->p_write++ = *value++;
if (q->p_write == q->p_top) {
q->p_write = q->p_bot;
}
}
ENABLE_IRQ();
if (q->cb_func) {
q->cb_func(q->cb_arg);
}
return EERR_OK;
}
uint64_t
monotonic_get_capture(void) {
/* Get the previous PPS capture */
uint64_t ret;
DISABLE_IRQ();
ret = mono_capture;
mono_capture = 0;
ENABLE_IRQ();
return ret;
}
void main()
{
uint32_t timestamp;
sx1276_config_t sx1276_config;
DISABLE_IRQ();
hal_clk_init();
sys_tick_init();
ENABLE_IRQ();
led_init();
sx1276_init(LORA, NULL);
sx1276_config.frequency = 433400000;
sx1276_config.spread_factor = SX1276_SF7;
sx1276_config.bandwidth = SX1276_BW_125K;
sx1276_config.coding_rate = SX1276_CR1;
sx1276_config.crc_mode = SX1276_CRC_ON;
sx1276_config.header_mode = SX1276_HEADER_ENABLE;
sx1276_config.payload_len = 0; // Set in HEADER disable mode
sx1276_config.tx_power = 20;
sx1276_config.tx_preamble_len = 12;
sx1276_config.rx_preamble_len = 12;
sx1276_set_config(&sx1276_config);
/** Enter HF/LF test mode */
if(sx1276_config.frequency < SX1276_LF_FREQ_MAX){
sx1276_write( 0x01, 0x88 );
}else{
sx1276_write( 0x01, 0x80 );
}
sx1276_write( 0x3D, 0xA1 );
sx1276_write( 0x36, 0x01 );
sx1276_write( 0x1e, 0x08 );
/** Enable TX to enter continuous wave transmitting mode */
sx1276_send(NULL, 0, 0);
/** Get system tick */
timestamp = millis();
while(1){
/** Blink LED every 1s*/
if( millis() - timestamp > 1000){
timestamp = millis();
led_blink(LED0, 100);
}
/** LED event polling */
led_evt();
}
}
void
play_music()
{
uint32_t counter=0;
LV2_Atom_Forge_Frame midi_seq_frame;
int buffer_processed = 0;
const Lv2Plugin *plugin;
plugin = lv2_world->plugin_list;
DISABLE_IRQ();
lv2_port *output_left = new_lv2_port(lv2_audio_port, 1);
lv2_port *output_right = new_lv2_port(lv2_audio_port, 2);
lv2_port *midi_in = new_lv2_port(lv2_atom_port, 3);
plugin->descriptor->connect_port(plugin->handle, midi_in->id, midi_in->buffer);
plugin->descriptor->connect_port(plugin->handle, output_left->id, output_left->buffer);
plugin->descriptor->connect_port(plugin->handle, output_right->id, output_right->buffer);
lv2_atom_forge_set_buffer(&forge,
midi_in->buffer,
LV2_ATOM_BUFFER_SIZE);
lv2_atom_forge_sequence_head(&forge, &midi_seq_frame, 0);
init_midi_source(&forge);
while (1) {
DISABLE_IRQ();
if (!buffer_processed) {
forge_midi_input();
lv2_atom_forge_pop(&forge, &midi_seq_frame);
plugin->descriptor->run(plugin->handle, LV2_AUDIO_BUFFER_SIZE);
lv2_atom_forge_set_buffer(&forge,
midi_in->buffer,
sizeof(uint8_t) * midi_in->buffer_sz);
lv2_atom_forge_sequence_head(&forge, &midi_seq_frame, 0);
buffer_processed = 1;
}
if (buffer_processed && audio_buffer_free_space() > LV2_AUDIO_BUFFER_SIZE * 2) {
audio_buffer_write(output_left->buffer, output_right->buffer, output_left->buffer_sz);
buffer_processed = 0;
counter++;
}
ENABLE_IRQ();
}
}
void sem_down(struct sem_s* sem) {
DISABLE_IRQ();
if (sem->val <= 0) {
// Initializing "wait_proc"
struct waiting_process* wait_proc = (struct waiting_process*) malloc_alloc(sizeof(struct waiting_process));
wait_proc->process = current_process;
wait_proc->next = 0;
// If the waiting queue is empty, we put our process as the first (and only) waiting element
if (sem->waiting == 0) {
sem->last_process = wait_proc;
sem->queue = wait_proc;
}
// Otherwise we put it at the end of the queue
else {
sem->last_process->next = wait_proc;
sem->last_process = wait_proc;
}
sem->waiting += 1;
// TODO : Marche pas si c'est le dernier process de sa queue
// ... 'va juste changer la valeur de current_process->schedule_queue
move_process(current_process, ¤t_process->schedule_queue, waiting)
current_process->state = WAITING;
ENABLE_IRQ();
// TODO : Schedule instead of doing a while
while(current_process->state== WAITING){
//DO NOTHING
}
}
else {
sem->val -= 1;
ENABLE_IRQ();
}
}
static void start_print( int device )
{ struct slm *sip = &slm_info[device];
unsigned char *cmd;
unsigned long paddr;
int i;
stdma_lock( slm_interrupt, NULL );
CMDSET_TARG_LUN( slmprint_cmd, sip->target, sip->lun );
cmd = slmprint_cmd;
paddr = virt_to_phys( SLMBuffer );
dma_cache_maintenance( paddr, virt_to_phys(BufferP)-paddr, 1 );
DISABLE_IRQ();
/* Low on A1 */
dma_wd.dma_mode_status = 0x88;
MFPDELAY();
/* send the command bytes except the last */
for( i = 0; i < 5; ++i ) {
DMA_LONG_WRITE( *cmd++, 0x8a );
udelay(20);
if (!acsi_wait_for_IRQ( HZ/2 )) {
SLMError = 1;
return; /* timeout */
}
}
/* last command byte */
DMA_LONG_WRITE( *cmd++, 0x82 );
MFPDELAY();
/* set DMA address */
set_dma_addr( paddr );
/* program DMA for write and select sector counter reg */
dma_wd.dma_mode_status = 0x192;
MFPDELAY();
/* program for 255*512 bytes and start DMA */
DMA_LONG_WRITE( SLM_DMA_AMOUNT, 0x112 );
#ifndef SLM_CONT_CNT_REPROG
SLMCurAddr = paddr;
SLMEndAddr = paddr + SLMSliceSize + SLM_DMA_INT_OFFSET;
#endif
START_TIMER( DMA_STARTUP_TIME + DMA_TIME_FOR( SLMSliceSize ));
#if !defined(SLM_CONT_CNT_REPROG) && defined(DEBUG)
printk( "SLM: CurAddr=%#lx EndAddr=%#lx timer=%ld\n",
SLMCurAddr, SLMEndAddr, DMA_TIME_FOR( SLMSliceSize ) );
#endif
ENABLE_IRQ();
}
void
start_sched()
{
current_process = &idle;
idle.next = ready_queue;
idle.period = 1000;
idle.calcul = 1000;
idle.period_remaining = 0;
idle.calcul_remaining = 0;
ENABLE_IRQ();
while(1) {
yield();
}
}
static int slm_get_pagesize( int device, int *w, int *h )
{ char buf[256];
int stat;
stat = slm_mode_sense( device, buf, 0 );
ENABLE_IRQ();
stdma_release();
if (stat != SLMSTAT_OK)
return( -EIO );
*w = (buf[3] << 8) | buf[4];
*h = (buf[1] << 8) | buf[2];
return( 0 );
}
void tpl_shutdown(void)
{
/* Enable interrupts because disabled bu ShutdownOS and we
need them to shutdown the NXT */
ENABLE_FIQ();
ENABLE_IRQ();
ecrobot_term_bt_connection(); /* shutdown bluetooth connection */
display_clear(1);
systick_wait_ms(10);
nxt_lcd_power_down(); /* reset LCD hardware */
systick_wait_ms(10);
while(1)
{
nxt_avr_power_down();
}
}
static int slm_req_sense( int device )
{ int stat, rv;
struct slm *sip = &slm_info[device];
stdma_lock( NULL, NULL );
CMDSET_TARG_LUN( slmreqsense_cmd, sip->target, sip->lun );
if (!acsicmd_nodma( slmreqsense_cmd, 0 ) ||
(stat = acsi_getstatus()) < 0)
rv = SLMSTAT_ACSITO;
else
rv = stat & 0x1f;
ENABLE_IRQ();
stdma_release();
return( rv );
}
void hal_sx1276_init(void)
{
uint32_t Exit_Line_Sum = 0;
/** SPI 10MHz, SCK Low when IDlE, sample on rising edge */
Spi1 = sx1276.Spi;
hal_spi_init(10000000, SPI_SCK_POLARITY_LOW, SPI_SAMPLE_ON_RISING_EDGE);
HAL_SX1276_SW_LF_INPUT();
HAL_SX1276_SW_HF_INPUT();
HAL_SX1276_SW_PWR_INPUT();
HAL_SX1276_DIO0_INPUT();
HAL_SX1276_DIO1_INPUT();
HAL_SX1276_DIO2_INPUT();
HAL_SX1276_DIO3_INPUT();
HAL_SX1276_DIO4_INPUT();
HAL_SX1276_DIO5_INPUT();
// //sys_tick_init();
// //for debugger
// //to be confirmed
// RxChainCalibration();
/*debugger end*/
DISABLE_IRQ();
SX1276IoIrqInit( hal_sx1276_irq_callback, &Exit_Line_Sum );
//EXTI->CR2 = 0x55; // Px4~7 rising edge interrupt
ENABLE_IRQ();
/** Clear interrupt flag */
EXTI_ClearFlag( Exit_Line_Sum );
/*EXTI->SR1 |= (HAL_SX1276_DIO0_BIT | HAL_SX1276_DIO1_BIT | \
HAL_SX1276_DIO2_BIT | HAL_SX1276_DIO3_BIT);*/
HAL_SX1276_NSS_OUTPUT();
HAL_SX1276_NSS_H();
//HAL_SX1276_RST_INPUT();
}
uint64_t
monotonic_now(void) {
/* Get value of monotonic clock */
uint64_t ret;
uint16_t tmr1, tmr2;
DISABLE_IRQ();
while (1) {
tmr1 = TIM3->CNT;
ret = mono_epoch;
tmr2 = TIM3->CNT;
if (tmr2 > tmr1) {
break;
}
/* Timer rolled over while we were sampling. Process the update event
* now */
TIM3_IRQHandler();
}
ENABLE_IRQ();
return ret + tmr2;
}
static int slm_mode_sense( int device, char *buffer, int abs_flag )
{ unsigned char stat, len;
int rv = 0;
struct slm *sip = &slm_info[device];
stdma_lock( NULL, NULL );
CMDSET_TARG_LUN( slmmsense_cmd, sip->target, sip->lun );
slmmsense_cmd[5] = abs_flag ? 0x80 : 0;
if (!acsicmd_nodma( slmmsense_cmd, 0 )) {
rv = SLMSTAT_ACSITO;
goto the_end;
}
if (!acsi_extstatus( &stat, 1 )) {
acsi_end_extstatus();
rv = SLMSTAT_ACSITO;
goto the_end;
}
if (!acsi_extstatus( &len, 1 )) {
acsi_end_extstatus();
rv = SLMSTAT_ACSITO;
goto the_end;
}
buffer[0] = len;
if (!acsi_extstatus( buffer+1, len )) {
acsi_end_extstatus();
rv = SLMSTAT_ACSITO;
goto the_end;
}
acsi_end_extstatus();
rv = stat & 0x1f;
the_end:
ENABLE_IRQ();
stdma_release();
return( rv );
}
int_least8_t enc_getdelta(void)
{
int_least8_t val;
DISABLE_IRQ();
val = enc_delta;
//read single step encoders
// enc_delta = 0;
//read two step encoders
// enc_delta = val & 1;
// val >>= 1;
//read four step encoders
enc_delta = val & 3;
val >>= 2;
ENABLE_IRQ();
return val;
}
void sem_up(struct sem_s* sem) {
DISABLE_IRQ();
if (sem->waiting > 0) {
// We take the first waiting process
struct waiting_process* first_process = sem->queue;
// Remove it from the top of the waiting list
sem->queue = first_process->next;
sem->waiting -= 1;
// Put the process back in the active list
put_back(first_process->process);
// And free the allocated memory to its position in the queue
malloc_free((uint32_t*) first_process);
}
else {
sem->val += 1;
}
ENABLE_IRQ();
}
void main()
{
uint32_t timestamp;
DISABLE_IRQ();
hal_clk_init();
sys_tick_init();
ENABLE_IRQ();
sx1276_init(FSK, NULL);
//Frequency 433.4MHz
sx1276_fsk_set_frf(433400000);
//Fdev 25KHz
sx1276_fsk_set_fdev(25000);
//Bitrate 10KHz
sx1276_fsk_set_bitrate(10000);
//Set RxBw depends on bitrate and fdev
sx1276_set_rxbw(25000, 10000);
sx1276_write(0x10,0xFF);
//Disable AGC, set G1
sx1276_write(0x0C,0x20);
sx1276_write(0x0D,0x00);
sx1276_fsk_rx_test_mode();
timestamp = millis();
while(1){
if( millis() - timestamp > 1000){
timestamp = millis();
led_blink(LED0,100);
}
led_evt();
}
}
