/*---------------------------------------------------------------------------*/
void
lpm_exit()
{
if((REG(SYS_CTRL_PMCTL) & SYS_CTRL_PMCTL_PM3) == SYS_CTRL_PMCTL_PM0) {
/* We either just exited PM0 or we were not sleeping in the first place.
* We don't need to do anything clever */
return;
}
LPM_STATS_ADD(REG(SYS_CTRL_PMCTL) & SYS_CTRL_PMCTL_PM3,
RTIMER_NOW() - sleep_enter_time);
/* Adjust the system clock, since it was not counting while we were sleeping
* We need to convert sleep duration from rtimer ticks to clock ticks and
* this will cost us some accuracy */
clock_adjust((clock_time_t)
((RTIMER_NOW() - sleep_enter_time) / RTIMER_CLOCK_TICK_RATIO));
/* Restore system clock to the 32 MHz XOSC */
select_32_mhz_xosc();
/* Restore PMCTL to PM0 for next pass */
REG(SYS_CTRL_PMCTL) = SYS_CTRL_PMCTL_PM0;
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
}
/*
* Routine to put is in PM0. We also need to do some housekeeping if the stats
* or the energest module is enabled
*/
static void
enter_pm0(void)
{
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/*
* After PM0 we don't need to adjust the system clock. Thus, saving the time
* we enter Deep Sleep is only required if we are keeping stats.
*/
if(LPM_CONF_STATS) {
sleep_enter_time = RTIMER_NOW();
}
assert_wfi();
/* We reach here when the interrupt context that woke us up has returned */
LPM_STATS_ADD(0, RTIMER_NOW() - sleep_enter_time);
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
}
/*
* Notify all modules that we're back on and rely on them to restore clocks
* and power domains as required.
*/
static void
wake_up(void)
{
lpm_registered_module_t *module;
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
/* Sync so that we get the latest values before adjusting recharge settings */
ti_lib_sys_ctrl_aon_sync();
/* Adjust recharge settings */
ti_lib_sys_ctrl_adjust_recharge_after_power_down();
/*
* Release the request to the uLDO
* This is likely not required, since the switch to GLDO/DCDC is automatic
* when coming back from deep sleep
*/
ti_lib_prcm_mcu_uldo_configure(false);
/* Turn on cache again */
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED);
ti_lib_prcm_cache_retention_enable();
ti_lib_aon_ioc_freeze_disable();
ti_lib_sys_ctrl_aon_sync();
/* Check operating conditions, optimally choose DCDC versus GLDO */
ti_lib_sys_ctrl_dcdc_voltage_conditional_control();
/*
* We may or may not have been woken up by an AON RTC tick. If not, we need
* to adjust our software tick counter
*/
clock_update();
watchdog_periodic();
/* Notify all registered modules that we've just woken up */
for(module = list_head(modules_list); module != NULL;
module = module->next) {
if(module->wakeup) {
module->wakeup();
}
}
}
/*---------------------------------------------------------------------------*/
void
lpm_sleep(void)
{
ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Just to be on the safe side, explicitly disable Deep Sleep */
HWREG(NVIC_SYS_CTRL) &= ~(NVIC_SYS_CTRL_SLEEPDEEP);
ti_lib_prcm_sleep();
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_SWITCH(ENERGEST_TYPE_LPM, ENERGEST_TYPE_CPU);
}
/*---------------------------------------------------------------------------*/
void
lpm_exit()
{
if((REG(SYS_CTRL_PMCTL) & SYS_CTRL_PMCTL_PM3) == SYS_CTRL_PMCTL_PM0) {
/* We either just exited PM0 or we were not sleeping in the first place.
* We don't need to do anything clever */
return;
}
/*
* When returning from PM1/2, the sleep timer value (used by RTIMER_NOW()) is
* not up-to-date until a positive edge on the 32-kHz clock has been detected
* after the system clock restarted. To ensure an updated value is read, wait
* for a positive transition on the 32-kHz clock by polling the
* SYS_CTRL_CLOCK_STA.SYNC_32K bit, before reading the sleep timer value.
*/
while(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K);
while(!(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K));
LPM_STATS_ADD(REG(SYS_CTRL_PMCTL) & SYS_CTRL_PMCTL_PM3,
RTIMER_NOW() - sleep_enter_time);
/* Adjust the system clock, since it was not counting while we were sleeping
* We need to convert sleep duration from rtimer ticks to clock ticks and
* this will cost us some accuracy */
clock_adjust((clock_time_t)
((RTIMER_NOW() - sleep_enter_time) / RTIMER_CLOCK_TICK_RATIO));
/* Restore system clock to the 32 MHz XOSC */
select_32_mhz_xosc();
/* Restore PMCTL to PM0 for next pass */
REG(SYS_CTRL_PMCTL) = SYS_CTRL_PMCTL_PM0;
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
}
/*
* Routine to put is in PM0. We also need to do some housekeeping if the stats
* or the energest module is enabled
*/
static void
enter_pm0(void)
{
ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Remember the current time so we can keep stats when we wake up */
if(LPM_CONF_STATS) {
sleep_enter_time = RTIMER_NOW();
}
assert_wfi();
/* We reach here when the interrupt context that woke us up has returned */
LPM_STATS_ADD(0, RTIMER_NOW() - sleep_enter_time);
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_SWITCH(ENERGEST_TYPE_LPM, ENERGEST_TYPE_CPU);
}
/*---------------------------------------------------------------------------*/
void
lpm_enter()
{
rtimer_clock_t lpm_exit_time;
rtimer_clock_t duration;
/*
* If either the RF or the registered peripherals are on, dropping to PM1/2
* would equal pulling the rug (32MHz XOSC) from under their feet. Thus, we
* only drop to PM0. PM0 is also used if max_pm==0.
*/
if((REG(RFCORE_XREG_FSMSTAT0) & RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE) != 0
|| !periph_permit_pm1() || max_pm == 0) {
enter_pm0();
/* We reach here when the interrupt context that woke us up has returned */
return;
}
/*
* Registered peripherals were off. Radio was off: Some Duty Cycling in place.
* rtimers run on the Sleep Timer. Thus, if we have a scheduled rtimer
* task, a Sleep Timer interrupt will fire and will wake us up.
* Choose the most suitable PM based on anticipated deep sleep duration
*/
lpm_exit_time = rtimer_arch_next_trigger();
duration = lpm_exit_time - RTIMER_NOW();
if(duration < DEEP_SLEEP_PM1_THRESHOLD || lpm_exit_time == 0) {
/* Anticipated duration too short or no scheduled rtimer task. Use PM0 */
enter_pm0();
/* We reach here when the interrupt context that woke us up has returned */
return;
}
/* If we reach here, we -may- (but may as well not) be dropping to PM1+. We
* know the registered peripherals and RF are off so we can switch to the
* 16MHz RCOSC. */
select_16_mhz_rcosc();
/*
* Switching the System Clock from the 32MHz XOSC to the 16MHz RC OSC may
* have taken a while. Re-estimate sleep duration.
*/
duration = lpm_exit_time - RTIMER_NOW();
if(duration < DEEP_SLEEP_PM1_THRESHOLD) {
/*
* oops... The clock switch took some time and now the remaining sleep
* duration is too short. Restore the clock source to the 32MHz XOSC and
* abort the LPM attempt altogether. We can't drop to PM0,
* we need to yield to main() since we may have events to service now.
*/
select_32_mhz_xosc();
return;
} else if(duration >= DEEP_SLEEP_PM2_THRESHOLD && max_pm == 2) {
/* Long sleep duration and PM2 is allowed. Use it */
REG(SYS_CTRL_PMCTL) = SYS_CTRL_PMCTL_PM2;
} else {
/*
* Anticipated duration too short for PM2 but long enough for PM1 and we
* are allowed to use PM1
*/
REG(SYS_CTRL_PMCTL) = SYS_CTRL_PMCTL_PM1;
}
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* Remember the current time so we can adjust the clock when we wake up */
sleep_enter_time = RTIMER_NOW();
/*
* Last chance to abort entering Deep Sleep.
*
* - There is the slight off-chance that a SysTick interrupt fired while we
* were trying to make up our mind. This may have raised an event.
* - The Sleep Timer may have fired
*
* Check if there is still a scheduled rtimer task and check for pending
* events before going to Deep Sleep
*/
if(process_nevents() || rtimer_arch_next_trigger() == 0) {
/* Event flag raised or rtimer inactive.
* Turn on the 32MHz XOSC, restore PMCTL and abort */
select_32_mhz_xosc();
REG(SYS_CTRL_PMCTL) = SYS_CTRL_PMCTL_PM0;
/* Remember IRQ energest for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
} else {
/* All clear. Assert WFI and drop to PM1/2. This is now un-interruptible */
assert_wfi();
}
/*
* We reach here after coming back from PM1/2. The interrupt context that
* woke us up has returned. lpm_exit() has run, it has switched the system
* clock source back to the 32MHz XOSC, it has adjusted the system clock,
* it has restored PMCTL and it has done energest housekeeping
*/
return;
}
/*---------------------------------------------------------------------------*/
int
main(void)
{
/* Hardware initialization */
bus_init();//ʱÖÓ³õʼ»¯
rtimer_init();//¼ÆʱÆ÷³õʼ»¯
/* model-specific h/w init. */
io_port_init();
/* Init LEDs here */
leds_init();//LED³õʼ»¯
/*LEDS_GREEN indicate LEDs Init finished*/
fade(LEDS_GREEN);
/* initialize process manager. */
process_init();//½ø³Ì¹ÜÀí³õʼ»¯
/* Init UART0
* Based on the EJOY MCU CC2430 Circuit Design
* */
uart0_init();//UART0´®¿Ú³õʼ»¯
#if DMA_ON
dma_init();//DMA³õʼ»¯
#endif
#if SLIP_ARCH_CONF_ENABLE
/* On cc2430, the argument is not used */
slip_arch_init(0);//SLIP³õʼ»¯
#else
uart1_set_input(serial_line_input_byte);
serial_line_init();
#endif
PUTSTRING("##########################################\n");
putstring(CONTIKI_VERSION_STRING "\n");
// putstring(SENSINODE_MODEL " (CC24");
puthex(((CHIPID >> 3) | 0x20));
putstring("-" FLASH_SIZE ")\n");
#if STARTUP_VERBOSE
#ifdef HAVE_SDCC_BANKING
PUTSTRING(" With Banking.\n");
#endif /* HAVE_SDCC_BANKING */
#ifdef SDCC_MODEL_LARGE
PUTSTRING(" --model-large\n");
#endif /* SDCC_MODEL_LARGE */
#ifdef SDCC_MODEL_HUGE
PUTSTRING(" --model-huge\n");
#endif /* SDCC_MODEL_HUGE */
#ifdef SDCC_STACK_AUTO
PUTSTRING(" --stack-auto\n");
#endif /* SDCC_STACK_AUTO */
PUTCHAR('\n');
PUTSTRING(" Net: ");
PUTSTRING(NETSTACK_NETWORK.name);
PUTCHAR('\n');
PUTSTRING(" MAC: ");
PUTSTRING(NETSTACK_MAC.name);
PUTCHAR('\n');
PUTSTRING(" RDC: ");
PUTSTRING(NETSTACK_RDC.name);
PUTCHAR('\n');
PUTSTRING("##########################################\n");
#endif
watchdog_init();//¿´ÃŹ·³õʼ»¯
/* Initialise the cc2430 RNG engine. */
random_init(0);//Ëæ»úÊýÉú³ÉÆ÷³õʼ»¯
/* start services */
process_start(&etimer_process, NULL);//
ctimer_init();//ctimer³õʼ»¯
/* initialize the netstack */
netstack_init();//ÍøÂçµ×²ãÕ»³õʼ»¯
set_rime_addr();//rimeµØÖ·ÉèÖÃ
//there is no sensor for us maintenance
#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
process_start(&sensors_process, NULL);
sensinode_sensors_activate();
#endif
//IPV6,YES!
#if UIP_CONF_IPV6
memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
queuebuf_init();
process_start(&tcpip_process, NULL);
//DISCO
#if DISCO_ENABLED
process_start(&disco_process, NULL);
#endif /* DISCO_ENABLED */
//VIZTOOL
#if VIZTOOL_CONF_ON
process_start(&viztool_process, NULL);
#endif
#if (!UIP_CONF_IPV6_RPL)
{
uip_ipaddr_t ipaddr;
uip_ip6addr(&ipaddr, 0x2001, 0x630, 0x301, 0x6453, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
}
#endif /* UIP_CONF_IPV6_RPL */
#endif /* UIP_CONF_IPV6 */
/*
* Acknowledge the UART1 RX interrupt
* now that we're sure we are ready to process it
*
* We don't need it. by MW
*/
// model_uart_intr_en();
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
fade(LEDS_RED);
#if BATMON_CONF_ON
process_start(&batmon_process, NULL);
#endif
autostart_start(autostart_processes);
watchdog_start();
while(1) {
do {
/* Reset watchdog and handle polls and events */
watchdog_periodic();
/**/
#if !CLOCK_CONF_ACCURATE
if(sleep_flag) {
if(etimer_pending() &&
(etimer_next_expiration_time() - count - 1) > MAX_TICKS) { /*core/sys/etimer.c*/
etimer_request_poll();
}
sleep_flag = 0;
}
#endif
r = process_run();
} while(r > 0);
#if SHORTCUTS_CONF_NETSTACK
len = NETSTACK_RADIO.pending_packet();
if(len) {
packetbuf_clear();
len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
if(len > 0) {
packetbuf_set_datalen(len);
NETSTACK_RDC.input();
}
}
#endif
#if LPM_MODE
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
CLKCON |= OSC; /* Switch to the RCOSC */
while(!(CLKCON & OSC)); /* Wait till it's happened */
SLEEP |= OSC_PD; /* Turn the other one off */
#endif /* LPM_MODE==LPM_MODE_PM2 */
/*
* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
*/
SLEEP = (SLEEP & 0xFC) | (LPM_MODE - 1);
#if (LPM_MODE==LPM_MODE_PM2)
/*
* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
* no interrupt occurred and we can safely power down
*/
__asm
nop
nop
nop
__endasm;
if (SLEEP & SLEEP_MODE0) {
#endif /* LPM_MODE==LPM_MODE_PM2 */
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Go IDLE or Enter PM1 */
PCON |= IDLE;
/* First instruction upon exiting PM1 must be a NOP */
__asm
nop
__endasm;
/* Remember energest IRQ for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & XOSC_STB)); /* Wait for XOSC to be stable */
CLKCON &= ~OSC; /* Switch to the XOSC */
/*
* On occasion the XOSC is reported stable when in reality it's not.
* We need to wait for a safeguard of 64us or more before selecting it
*/
clock_delay(10);
while(CLKCON & OSC); /* Wait till it's happened */
}
#endif /* LPM_MODE==LPM_MODE_PM2 */
#endif /* LPM_MODE */
}
}
/*---------------------------------------------------------------------------*/
int
main(void)
{
clock_init(); // 初始化 睡眠定时器 必要
soc_init(); // 还函数中启动了全局中断 可修改
rtimer_init(); // rtimer为定时器1 必要
/* Init LEDs here */
leds_init(); // 初始化LED 可修改
leds_off(LEDS_ALL); // 关闭所有LED 非必要
fade(LEDS_GREEN); // 绿色闪烁一下 非必要
/* initialize process manager. */
process_init(); // 任务初始化 必要
/* Init UART */
uart0_init(); // 初始化串口0，先用于调试，可修改
#if DMA_ON
dma_init(); // 非必要
#endif
#if SLIP_ARCH_CONF_ENABLE
slip_arch_init(0);
#else
uart0_set_input(serial_line_input_byte);
serial_line_init();
#endif
fade(LEDS_RED); // 红色LED闪烁一下 非必要
// 打印若干提示信息 非必要 可修改
putstring("**************************************\r\n");
putstring(CONTIKI_VERSION_STRING "\r\n"); // 打印若干信息
putstring("Platform CC2530 NB\r\n");
switch(CHIPID) {
case 0xA5:
putstring("CC2530");
break;
case 0xB5:
putstring("CC2531");
break;
case 0x95:
putstring("CC2533");
break;
case 0x8D:
putstring("CC2540");
break;
}
putstring("-F");
switch(CHIPINFO0 & 0x70) {
case 0x40:
putstring("256,");
break;
case 0x30:
putstring("128,");
break;
case 0x20:
putstring("64,");
break;
case 0x10:
putstring("32,");
break;
}
puthex(CHIPINFO1 + 1);
putstring("KB SRAM\r\n");
#if STARTUP_VERBOSE
PUTSTRING("Net: "); // NETWORK名称
PUTSTRING(NETSTACK_NETWORK.name);
PUTCHAR('\r');PUTCHAR('\n');
PUTSTRING("MAC: "); // MAC名称
PUTSTRING(NETSTACK_MAC.name);
PUTCHAR('\r');PUTCHAR('\n');
PUTSTRING("RDC: "); // RDC名称
PUTSTRING(NETSTACK_RDC.name);
PUTCHAR('\r');PUTCHAR('\n');
PUTSTRING("**************************************\r\n");
#endif
watchdog_init(); // 初始化看门狗
/* Initialise the H/W RNG engine. */
random_init(0); //
/* start services */
process_start(&etimer_process, NULL); // 启动etimer任务
ctimer_init(); // ctimer初始化
/* initialize the netstack */
netstack_init(); // NET协议栈初始化
set_rime_addr(); // 设置RIME地址，相当于设置IP地址
#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
process_start(&sensors_process, NULL);
BUTTON_SENSOR_ACTIVATE();
ADC_SENSOR_ACTIVATE();
#endif
#if UIP_CONF_IPV6 // 非常重要，启动TCPIP查询任务
memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
queuebuf_init();
process_start(&tcpip_process, NULL);
#endif /* UIP_CONF_IPV6 */
#if VIZTOOL_CONF_ON
process_start(&viztool_process, NULL);
#endif
energest_init(); // 能量估计初始化，但是该功能未被打开
ENERGEST_ON(ENERGEST_TYPE_CPU); // 该功能未被打开
autostart_start(autostart_processes); // 启动被定义为自动启动的任务
watchdog_start(); // 看门狗初始化
fade(LEDS_YELLOW); // 黄色LED闪烁，完成所有初始化工作
while(1) {
do {
/* Reset watchdog and handle polls and events */
watchdog_periodic(); // 喂狗操作
r = process_run();
} while(r > 0);
#if SHORTCUTS_CONF_NETSTACK // 循环查询无线输入数据包长度 tcpip_process
len = NETSTACK_RADIO.pending_packet();
if(len) {
packetbuf_clear();
len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
if(len > 0) {
packetbuf_set_datalen(len);
NETSTACK_RDC.input();
}
}
#endif
#if LPM_MODE // 该宏被定义为0，没有休眠功能，以下代码均无效
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
CLKCON |= OSC; /* Switch to the RCOSC */
while(!(CLKCON & OSC)); /* Wait till it's happened */
SLEEP |= OSC_PD; /* Turn the other one off */
#endif /* LPM_MODE==LPM_MODE_PM2 */
/*
* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
*/
SLEEPCMD = (SLEEPCMD & 0xFC) | (LPM_MODE - 1);
#if (LPM_MODE==LPM_MODE_PM2)
/*
* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
* no interrupt occurred and we can safely power down
*/
__asm
nop
nop
nop
__endasm;
if(SLEEPCMD & SLEEP_MODE0) {
#endif /* LPM_MODE==LPM_MODE_PM2 */
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Go IDLE or Enter PM1 */
PCON |= PCON_IDLE;
/* First instruction upon exiting PM1 must be a NOP */
__asm
nop
__endasm;
/* Remember energest IRQ for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
#if (LPM_MODE==LPM_MODE_PM2)
SLEEPCMD &= ~SLEEP_OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEPCMD & SLEEP_XOSC_STB)); /* Wait for XOSC to be stable */
CLKCONCMD &= ~CLKCONCMD_OSC; /* Switch to the XOSC */
/*
* On occasion the XOSC is reported stable when in reality it's not.
* We need to wait for a safeguard of 64us or more before selecting it
*/
clock_delay(10);
while(CLKCONCMD & CLKCONCMD_OSC); /* Wait till it's happened */
}
#endif /* LPM_MODE==LPM_MODE_PM2 */
#endif /* LPM_MODE */
}
}
/*---------------------------------------------------------------------------*/
int
main(void)
{
/* Hardware initialization */
clock_init();
soc_init();
rtimer_init();
/* Init LEDs here */
leds_init();
leds_off(LEDS_ALL);
fade(LEDS_GREEN);
/* initialize process manager. */
process_init();
/* Init UART */
uart0_init();
#if DMA_ON
dma_init();
#endif
#if SLIP_ARCH_CONF_ENABLE
slip_arch_init(0);
#else
uart0_set_input(serial_line_input_byte);
serial_line_init();
#endif
fade(LEDS_RED);
PUTSTRING("##########################################\n");
putstring(CONTIKI_VERSION_STRING "\n");
putstring("TI SmartRF05 EB\n");
switch(CHIPID) {
case 0xA5:
putstring("cc2530");
break;
case 0xB5:
putstring("cc2531");
break;
case 0x95:
putstring("cc2533");
break;
case 0x8D:
putstring("cc2540");
break;
}
putstring("-F");
switch(CHIPINFO0 & 0x70) {
case 0x40:
putstring("256, ");
break;
case 0x30:
putstring("128, ");
break;
case 0x20:
putstring("64, ");
break;
case 0x10:
putstring("32, ");
break;
}
puthex(CHIPINFO1 + 1);
putstring("KB SRAM\n");
PUTSTRING("\nSDCC Build:\n");
#if STARTUP_VERBOSE
#ifdef HAVE_SDCC_BANKING
PUTSTRING(" With Banking.\n");
#endif /* HAVE_SDCC_BANKING */
#ifdef SDCC_MODEL_LARGE
PUTSTRING(" --model-large\n");
#endif /* SDCC_MODEL_LARGE */
#ifdef SDCC_MODEL_HUGE
PUTSTRING(" --model-huge\n");
#endif /* SDCC_MODEL_HUGE */
#ifdef SDCC_STACK_AUTO
PUTSTRING(" --stack-auto\n");
#endif /* SDCC_STACK_AUTO */
PUTCHAR('\n');
PUTSTRING(" Net: ");
PUTSTRING(NETSTACK_NETWORK.name);
PUTCHAR('\n');
PUTSTRING(" MAC: ");
PUTSTRING(NETSTACK_MAC.name);
PUTCHAR('\n');
PUTSTRING(" RDC: ");
PUTSTRING(NETSTACK_RDC.name);
PUTCHAR('\n');
PUTSTRING("##########################################\n");
#endif
watchdog_init();
/* Initialise the H/W RNG engine. */
random_init(0);
/* start services */
process_start(&etimer_process, NULL);
ctimer_init();
/* initialize the netstack */
netstack_init();
set_rime_addr();
#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
process_start(&sensors_process, NULL);
BUTTON_SENSOR_ACTIVATE();
ADC_SENSOR_ACTIVATE();
#endif
#if UIP_CONF_IPV6
memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
queuebuf_init();
process_start(&tcpip_process, NULL);
#endif /* UIP_CONF_IPV6 */
#if VIZTOOL_CONF_ON
process_start(&viztool_process, NULL);
#endif
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
autostart_start(autostart_processes);
watchdog_start();
fade(LEDS_YELLOW);
while(1) {
do {
/* Reset watchdog and handle polls and events */
watchdog_periodic();
#if CLOCK_CONF_STACK_FRIENDLY
if(sleep_flag) {
if(etimer_pending() &&
(etimer_next_expiration_time() - clock_time() - 1) > MAX_TICKS) {
etimer_request_poll();
}
sleep_flag = 0;
}
#endif
r = process_run();
} while(r > 0);
len = NETSTACK_RADIO.pending_packet();
if(len) {
packetbuf_clear();
len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
if(len > 0) {
packetbuf_set_datalen(len);
NETSTACK_RDC.input();
}
}
#if LPM_MODE
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
CLKCON |= OSC; /* Switch to the RCOSC */
while(!(CLKCON & OSC)); /* Wait till it's happened */
SLEEP |= OSC_PD; /* Turn the other one off */
#endif /* LPM_MODE==LPM_MODE_PM2 */
/*
* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
*/
SLEEPCMD = (SLEEPCMD & 0xFC) | (LPM_MODE - 1);
#if (LPM_MODE==LPM_MODE_PM2)
/*
* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
* no interrupt occurred and we can safely power down
*/
__asm
nop
nop
nop
__endasm;
if(SLEEPCMD & SLEEP_MODE0) {
#endif /* LPM_MODE==LPM_MODE_PM2 */
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Go IDLE or Enter PM1 */
PCON |= PCON_IDLE;
/* First instruction upon exiting PM1 must be a NOP */
__asm
nop
__endasm;
/* Remember energest IRQ for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
#if (LPM_MODE==LPM_MODE_PM2)
SLEEPCMD &= ~SLEEP_OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEPCMD & SLEEP_XOSC_STB)); /* Wait for XOSC to be stable */
CLKCONCMD &= ~CLKCONCMD_OSC; /* Switch to the XOSC */
/*
* On occasion the XOSC is reported stable when in reality it's not.
* We need to wait for a safeguard of 64us or more before selecting it
*/
clock_delay(10);
while(CLKCONCMD & CLKCONCMD_OSC); /* Wait till it's happened */
}
#endif /* LPM_MODE==LPM_MODE_PM2 */
#endif /* LPM_MODE */
}
}
