示例#1
0
void s3c_fimc0_cfg_gpio(struct platform_device *pdev)
{
#if defined(CONFIG_MACH_SMDK4212) || defined(CONFIG_MACH_SMDK4210) \
	|| defined(CONFIG_VIDEO_S5K5BBGX)
	if (soc_is_exynos4210()) {
		/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8,
					S3C_GPIO_SFN(2));
		/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also),
		* FIELD */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5,
					S3C_GPIO_SFN(2));
#if !defined(CONFIG_MACH_P8LTE) || !defined(CONFIG_VIDEO_S5K5BBGX)
		/* CAM B port(b0011) : DATA[0-7] */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8,
					S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5,
					S3C_GPIO_SFN(3));
#endif
	} else {
		/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ0(0), 8,
					S3C_GPIO_SFN(2));
		/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also),
		* FIELD */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ1(0), 5,
					S3C_GPIO_SFN(2));
		/* CAM B port(b0011) : PCLK, DATA[0-6] */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM0(0), 8,
					S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : FIELD, DATA[7]*/
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM1(0), 2,
					S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : VSYNC, HREF, CLKOUT*/
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM2(0), 3,
					S3C_GPIO_SFN(3));
	}
	/* note : driver strength to max is unnecessary */
#elif defined(CONFIG_MACH_PX)
	/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
	s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
	/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
	s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5, S3C_GPIO_SFN(2));
	/* Disable Mclk */
	s3c_gpio_cfgpin(EXYNOS4210_GPJ1(3), S3C_GPIO_INPUT);
	s3c_gpio_setpull(EXYNOS4210_GPJ1(3), S3C_GPIO_PULL_DOWN);

#if !defined(CONFIG_MACH_P8LTE)
	/* CAM B port(b0011) : DATA[0-7] */
	s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8, S3C_GPIO_SFN(3));
	/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
	s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5, S3C_GPIO_SFN(3));
#endif
#endif
}
示例#2
0
void s3c_fimc0_cfg_gpio(struct platform_device *pdev)
{
	if (soc_is_exynos4210()) {
#if defined (CONFIG_MX_SERIAL_TYPE)
		/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
		/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 4, S3C_GPIO_SFN(2));
#else
		/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
		/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5, S3C_GPIO_SFN(2));
		/* CAM B port(b0011) : DATA[0-7] */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8, S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
		s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5, S3C_GPIO_SFN(3));
#endif
	} else {
#if defined(CONFIG_MX_SERIAL_TYPE)
		/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ0(0), 8, S3C_GPIO_SFN(2));		
		/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ1(0), 4, S3C_GPIO_SFN(2));

		/* CAM B port(b0011) : PCLK, DATA[0-6] */
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM0(0), 8, S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : FIELD, DATA[7]*/
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM1(0), 2, S3C_GPIO_SFN(3));
		/* CAM B port(b0011) : VSYNC, HREF, CLKOUT*/
		s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM2(0), 3, S3C_GPIO_SFN(3));
#endif

#if defined(CONFIG_MX2_SERIAL_TYPE)
		s3c_gpio_cfgpin(EXYNOS4212_GPJ1(3), S3C_GPIO_SFN(2));
#endif
	}
	/* note : driver strength to max is unnecessary */
}
    {EXYNOS4212_GPJ1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
    {EXYNOS4212_GPJ1(1), S3C_GPIO_SLP_PREV,  S3C_GPIO_PULL_NONE},/*TCH_EN*/
    {EXYNOS4212_GPJ1(2), S3C_GPIO_SLP_PREV,  S3C_GPIO_PULL_NONE},/*TCH_SET*/
    {EXYNOS4212_GPJ1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
    {EXYNOS4212_GPJ1(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},

    {EXYNOS4212_GPM0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

    {EXYNOS4212_GPM1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},

    {EXYNOS4212_GPM2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4212_GPM2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
    {EXYNOS4212_GPM2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4212_GPM2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

    {EXYNOS4212_GPM3(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*PMIC_DVS1*/
    {EXYNOS4212_GPM3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*PMIC_DVS2*/
示例#4
0
		}
	}, {
		.base	= (S5P_VA_GPIO2 + 0x260),
		.eint_offset = 0x24,
		.group	= 23,
		.chip	= {
			.base	= EXYNOS4212_GPM0(0),
			.ngpio	= EXYNOS4212_GPIO_M0_NR,
			.label	= "GPM0",
		},
	}, {
		.base	= (S5P_VA_GPIO2 + 0x280),
		.eint_offset = 0x28,
		.group	= 24,
		.chip	= {
			.base	= EXYNOS4212_GPM1(0),
			.ngpio	= EXYNOS4212_GPIO_M1_NR,
			.label	= "GPM1",
		},
	}, {
		.base	= (S5P_VA_GPIO2 + 0x2A0),
		.eint_offset = 0x2C,
		.group	= 25,
		.chip	= {
			.base	= EXYNOS4212_GPM2(0),
			.ngpio	= EXYNOS4212_GPIO_M2_NR,
			.label	= "GPM2",
		},
	}, {
		.base	= (S5P_VA_GPIO2 + 0x2C0),
		.eint_offset = 0x30,
示例#5
0
	{EXYNOS4212_GPM0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* IRDA_IRQ */
	{EXYNOS4212_GPM0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#else
	{EXYNOS4212_GPM0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TA_nCHG */
	{EXYNOS4212_GPM0(4),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* TSP_nRST */
	{EXYNOS4212_GPM0(5),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* TSK_EN */
	{EXYNOS4212_GPM0(6),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* IRDA_IRQ */
#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM)
	{EXYNOS4212_GPM0(7),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* USB_SEL_CP */
#else
	{EXYNOS4212_GPM0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
#endif

	{EXYNOS4212_GPM1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV0 */
	{EXYNOS4212_GPM1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV1 */
	{EXYNOS4212_GPM1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV2 */
	{EXYNOS4212_GPM1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV3 */
	{EXYNOS4212_GPM1(6),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* 2M_nRST */

	{EXYNOS4212_GPM2(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CHG_SDA_1.8V */
	{EXYNOS4212_GPM2(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* CHG_SCL_1.8V */
#if defined(CONFIG_TARGET_TAB3_WIFI8) || defined(CONFIG_TARGET_TAB3_3G8) || \
	defined(CONFIG_TARGET_TAB3_LTE8)
	{EXYNOS4212_GPM2(2),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* VT_CAM_MCLK */
#else
	{EXYNOS4212_GPM2(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
	{EXYNOS4212_GPM0(0),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_VDD_EN */
	{EXYNOS4212_GPM0(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* ISP_STANDBY */
	{EXYNOS4212_GPM0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_IO_EN */
	{EXYNOS4212_GPM0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_ISP_CORE_EN */
	{EXYNOS4212_GPM0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_AF_EN */
#if defined(CONFIG_MACH_BAFFIN_KOR_LGT)
	{EXYNOS4212_GPM0(5),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CP_BOOT_SEL_1.8V */
	{EXYNOS4212_GPM0(6),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CP_ON */
#else
	{EXYNOS4212_GPM0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
	{EXYNOS4212_GPM0(7),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_SENSOR_CORE_EN */

#if defined(CONFIG_MACH_BAFFIN_KOR_LGT)
	{EXYNOS4212_GPM1(0),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* VIA_PS_HOLD_OFF */
	{EXYNOS4212_GPM1(1),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* VIA_USB_OFF */
#else
	{EXYNOS4212_GPM1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
	{EXYNOS4212_GPM1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV0 */
	{EXYNOS4212_GPM1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV1 */
	{EXYNOS4212_GPM1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV2 */
	{EXYNOS4212_GPM1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV3 */
	{EXYNOS4212_GPM1(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* CAM_VT_nRST */

	{EXYNOS4212_GPM2(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SDA_1.8V */
	{EXYNOS4212_GPM2(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SCL_1.8V */
	{EXYNOS4212_GPM2(2),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* CAM_MCLK_VGA */
	{EXYNOS4212_GPM2(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* TSP_nINT */
	{EXYNOS4_GPL2(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* UART_SEL -> NC */

#if defined(CONFIG_SEC_MODEM) || defined(CONFIG_QC_MODEM)
	{EXYNOS4212_GPM0(0),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MICBIAS_EN */
#else
	{EXYNOS4212_GPM0(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MICBIAS_EN */
#endif
	{EXYNOS4212_GPM0(1),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* LED_BACKLIGHT_RESET */
	{EXYNOS4212_GPM0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4212_GPM0(5),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* 2TOUCH_EN */
	{EXYNOS4212_GPM0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IRDA_IRQ */
	{EXYNOS4212_GPM0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

	{EXYNOS4212_GPM1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SDA */
	{EXYNOS4212_GPM1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MOTOR_I2C_SCL */
	{EXYNOS4212_GPM1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV0 */
	{EXYNOS4212_GPM1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV1 */
	{EXYNOS4212_GPM1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV2 */
	{EXYNOS4212_GPM1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* HW_REV3 */
	{EXYNOS4212_GPM1(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

	{EXYNOS4212_GPM2(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SDA */
	{EXYNOS4212_GPM2(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* IF_PMIC_SCL */
	{EXYNOS4212_GPM2(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* VT_CAM_MCLK */
	{EXYNOS4212_GPM2(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_INT */
	 /*  SUSPEND_REQUEST_HSIC for 3G, AP2MDM_WAKEUP for LTE, NC */
	{EXYNOS4212_GPM2(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},

	{EXYNOS4212_GPM3(0),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PMIC_DVS1 */
示例#8
0
static void headset_switch_work(struct work_struct *work)
{
	int handset_state;
	int ear_jack_state;
	int report_state = SEC_JACK_NO_DEVICE;
	
	static int report_old_state = SEC_JACK_NO_DEVICE;
	static int handset_old_state = 0xff;
	
	struct v210_headset_switch_data	*data =
		container_of(work, struct v210_headset_switch_data, work);

	handset_state = gpio_get_value(HP_DETECT_PIN);
	printk("%s,handset_state:%d\n",__FUNCTION__,handset_state);

	
	if (handset_state==1){ //plug in
		printk(KERN_DEBUG "Headset plug in.\n");
		printk("Headset plug in.\n");
		gpio_direction_output(EXYNOS4212_GPM1(4),0);
		report_state = SEC_HEADSET_3POLE;
		if (!strcmp(g_selected_codec,"wm8976"))
			{
			//	msleep(500);
				wm8978_set_bias(1);
			}
	//	enable_irq(EAR_PRESSKEY_ENIT_NUM);
	} else {//plug out
		printk("Headset plug out.\n");
		
		gpio_direction_output(EXYNOS4212_GPM1(4),1);
		report_state =0;
	}
	
	
	if(handset_old_state^handset_state) {
		data->set_micbias_state(!!handset_state);
		handset_old_state = handset_state;
	}


	if(report_old_state ^ report_state) {
		switch_set_state(&data->sdev, report_state);
		report_old_state = report_state;
	}
	
	if (!strcmp(g_selected_codec,"wm8976"))
		{
 	 	  wm8978_set_bias(0);
		}
		
	schedule_work(&delay_open_micbias);


	scan_pin_cnt = 0;
	 if(handset_state==1)		
		earphone_inset_flag=1;
	else{		
		earphone_inset_flag=0;
		earphone_pole_flag=0;
		schedule_work(&earphone_report_work);
		}

}