void EepromInit() {
// enable timeout error
TCNT1 = 0;
TCCR1B = 3 << CS10;
TIMSK1 = 1 << TOIE1;
sei();
// initialize TWI
TwiInit();
// test if eeprom works
EepromWriteByte(0, 0, 11);
uint8_t test = EepromReadByte(0, 0);
if (test != 11) Error(4);
// get data size and current data pozition
index_page_size = (EepromReadByte(0, 1) << 8) | EepromReadByte(0, 2);
// disable timeout error
cli();
TCNT1 = 0;
TCCR1B = 0;
TIMSK1 = 0;
}
static void test_wtapper_write_byte(uint8_t pattern, uint32_t pos){
uint8_t u8result;
uint8_t u8 = pattern;
chFileStreamSeek(&EfsTest, pos);
if (EepromWriteByte(&EfsTest, u8) != sizeof(u8))
chDbgPanic("write failed");
chFileStreamSeek(&EfsTest, chFileStreamGetPosition(&EfsTest) - sizeof(u8));
u8result = EepromReadByte(&EfsTest);
if (u8 != u8result)
chDbgPanic("veryfication failed");
}
void EepromWriteData(const char *data) {
uint8_t len = strlen(data);
for (uint8_t i = 0; i < len; i++) {
EepromWriteByte((uint8_t)(current_eeprom_address >> 8), (uint8_t)current_eeprom_address, data[i]);
current_eeprom_address++;
}
if (len % 36 != 0) {
for (uint8_t i = 0; i < (36 - (len - 36*floor(len/36))); i++) {
EepromWriteByte((uint8_t)(current_eeprom_address >> 8), (uint8_t)current_eeprom_address, ' ');
current_eeprom_address++;
}
}
index_page_size = current_eeprom_address - EEPROM_DATA_ADDR;
EepromWriteByte(0, 1, (uint8_t)(index_page_size >> 8));
EepromWriteByte(0, 2, (uint8_t)index_page_size);
}
msg_t EepromTestThread(void *sdp){
chRegSetThreadName("EepromTst");
cli_println("basic tests");
cli_println("--------------------------------------------------------------");
cli_print("mount aligned file sized to whole test area");
ocfg.barrier_low = TEST_AREA_START;
ocfg.barrier_hi = TEST_AREA_END;
EepromFileOpen(&ofile, &ocfg);
OK();
printfileinfo(sdp, &ofile);
cli_print("test fill with 0xFF");
pattern_fill(&ofile, 0xFF);
if (chThdShouldTerminate()){goto END;}
OK();
cli_print("test fill with 0xAA");
pattern_fill(&ofile, 0xAA);
if (chThdShouldTerminate()){goto END;}
OK();
cli_print("test fill with 0x55");
pattern_fill(&ofile, 0x55);
if (chThdShouldTerminate()){goto END;}
OK();
cli_print("test fill with 0x00");
pattern_fill(&ofile, 0x00);
if (chThdShouldTerminate()){goto END;}
OK();
cli_print("Closing file");
chFileStreamClose(&ofile);
OK();
uint32_t b1, b2, b3, b4, istart, ilen;
uint8_t pattern = 0x55;
b1 = TEST_AREA_START;
b2 = TEST_AREA_START + EEPROM_PAGE_SIZE;
b3 = TEST_AREA_END - EEPROM_PAGE_SIZE;
b4 = TEST_AREA_END;
istart = 0;
ilen = b3-b2;
cli_println(" Linear barriers testing.");
chThdSleepMilliseconds(20);
overflow_check( b1, b2, b3, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b3, b4, istart + 1, ilen - 1, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b3, b4, istart + 1, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b3, b4, istart + 1, ilen + 23, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b3 + 1, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 2, b3 + 2, b4, istart + 2, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b3 + 1, b4, istart + 1, ilen + 23, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 2, b3 + 2, b4, istart + 1, ilen + 23, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 + 2, b3 - 3, b4, istart + 2, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b2 + 1, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b2 + 2, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2, b2 + 3, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 + 1, b2 + 2, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 + 1, b2 + 3, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 + 1, b2 + 4, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2 + 1, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2 + 2, b4, istart, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2 + 1, b4, istart + 1, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2 + 2, b4, istart + 1, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
overflow_check( b1, b2 - 1, b2 + 3, b4, istart + 1, ilen, pattern, FALSE, sdp);
if (chThdShouldTerminate()){goto END;}
pattern++;
cli_println(" Basic API testing.");
chThdSleepMilliseconds(20);
ocfg.barrier_low = TEST_AREA_START;
ocfg.barrier_hi = TEST_AREA_END;
EepromFileOpen(&ofile, &ocfg);
chFileStreamSeek(&ofile, 0);
EepromWriteByte(&ofile, 0x11);
EepromWriteHalfword(&ofile, 0x2222);
EepromWriteWord(&ofile, 0x33333333);
chFileStreamSeek(&ofile, 0);
if(EepromReadByte(&ofile) != 0x11)
chDbgPanic("");
if(EepromReadHalfword(&ofile) != 0x2222)
chDbgPanic("");
if(EepromReadWord(&ofile) != 0x33333333)
chDbgPanic("");
chFileStreamClose(&ofile);
OK();
cli_println("All tests passed successfully.");
END:
chThdExit(0);
return 0;
}
/**
* et131x_find_adapter - Find the adapter and get all the assigned resources
* @adapter: pointer to our private adapter structure
*
* Returns 0 on success, errno on failure (as defined in errno.h)
*/
int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
{
int result;
uint8_t eepromStat;
uint8_t maxPayload = 0;
uint8_t read_size_reg;
u8 rev;
/* Allow disabling of Non-Maskable Interrupts in I/O space, to
* support validation.
*/
if (adapter->RegistryNMIDisable) {
uint8_t RegisterVal;
RegisterVal = inb(ET1310_NMI_DISABLE);
RegisterVal &= 0xf3;
if (adapter->RegistryNMIDisable == 2)
RegisterVal |= 0xc;
outb(ET1310_NMI_DISABLE, RegisterVal);
}
/* We first need to check the EEPROM Status code located at offset
* 0xB2 of config space
*/
result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
&eepromStat);
/* THIS IS A WORKAROUND:
* I need to call this function twice to get my card in a
* LG M1 Express Dual running. I tried also a msleep before this
* function, because I thougth there could be some time condidions
* but it didn't work. Call the whole function twice also work.
*/
result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
&eepromStat);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev, "Could not read PCI config space for "
"EEPROM Status\n");
return -EIO;
}
/* Determine if the error(s) we care about are present. If they are
* present, we need to fail.
*/
if (eepromStat & 0x4C) {
result = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not read PCI config space for "
"Revision ID\n");
return -EIO;
} else if (rev == 0x01) {
int32_t nLoop;
uint8_t temp[4] = { 0xFE, 0x13, 0x10, 0xFF };
/* Re-write the first 4 bytes if we have an eeprom
* present and the revision id is 1, this fixes the
* corruption seen with 1310 B Silicon
*/
for (nLoop = 0; nLoop < 3; nLoop++) {
EepromWriteByte(adapter, nLoop, temp[nLoop]);
}
}
dev_err(&pdev->dev, "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
/* This error could mean that there was an error reading the
* eeprom or that the eeprom doesn't exist. We will treat
* each case the same and not try to gather additional
* information that normally would come from the eeprom, like
* MAC Address
*/
adapter->has_eeprom = 0;
return -EIO;
} else
adapter->has_eeprom = 1;
/* Read the EEPROM for information regarding LED behavior. Refer to
* ET1310_phy.c, et131x_xcvr_init(), for its use.
*/
EepromReadByte(adapter, 0x70, &adapter->eepromData[0]);
EepromReadByte(adapter, 0x71, &adapter->eepromData[1]);
if (adapter->eepromData[0] != 0xcd)
/* Disable all optional features */
adapter->eepromData[1] = 0x00;
/* Let's set up the PORT LOGIC Register. First we need to know what
* the max_payload_size is
*/
result = pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &maxPayload);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not read PCI config space for Max Payload Size\n");
return -EIO;
}
/* Program the Ack/Nak latency and replay timers */
maxPayload &= 0x07; /* Only the lower 3 bits are valid */
if (maxPayload < 2) {
const uint16_t AckNak[2] = { 0x76, 0xD0 };
const uint16_t Replay[2] = { 0x1E0, 0x2ED };
result = pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
AckNak[maxPayload]);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not write PCI config space for ACK/NAK\n");
return -EIO;
}
result = pci_write_config_word(pdev, ET1310_PCI_REPLAY,
Replay[maxPayload]);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not write PCI config space for Replay Timer\n");
return -EIO;
}
}
/* l0s and l1 latency timers. We are using default values.
* Representing 001 for L0s and 010 for L1
*/
result = pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not write PCI config space for Latency Timers\n");
return -EIO;
}
/* Change the max read size to 2k */
result = pci_read_config_byte(pdev, 0x51, &read_size_reg);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not read PCI config space for Max read size\n");
return -EIO;
}
read_size_reg &= 0x8f;
read_size_reg |= 0x40;
result = pci_write_config_byte(pdev, 0x51, read_size_reg);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev,
"Could not write PCI config space for Max read size\n");
return -EIO;
}
/* Get MAC address from config space if an eeprom exists, otherwise
* the MAC address there will not be valid
*/
if (adapter->has_eeprom) {
int i;
for (i = 0; i < ETH_ALEN; i++) {
result = pci_read_config_byte(
pdev, ET1310_PCI_MAC_ADDRESS + i,
adapter->PermanentAddress + i);
if (result != PCIBIOS_SUCCESSFUL) {
dev_err(&pdev->dev, ";Could not read PCI config space for MAC address\n");
return -EIO;
}
}
}
return 0;
}
