static void
lwIPInterruptTask(void *pvArg)
{
//
// Loop forever.
//
while(1)
{
//
// Wait until the semaphore has been signalled.
//
while(xQueueReceive(g_pInterrupt, &pvArg, portMAX_DELAY) != pdPASS)
{
}
//
// Processes any packets waiting to be sent or received.
//
stellarisif_interrupt(&g_sNetIF);
//
// Re-enable the Ethernet interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
}
}
//*****************************************************************************
//
// In this function, the hardware should be initialized.
// Called from stellarisif_init().
//
// @param netif the already initialized lwip network interface structure
// for this ethernetif
//!
//! \return None.
//!
//*****************************************************************************
static err_t low_level_init(struct netif *netif)
{
ETHServiceTaskDisable(0);
// set MAC hardware address length
netif->hwaddr_len = ETHARP_HWADDR_LEN;
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_transmit: frame sent\n"));
// set MAC hardware address
ETHServiceTaskMACAddress(0, &(netif->hwaddr[0]));
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_init: MAC address is %"X8_F"%"X8_F"%"X8_F"%"X8_F"%"X8_F"%"X8_F"\n",
netif->hwaddr[0],netif->hwaddr[1],netif->hwaddr[2],
netif->hwaddr[3],netif->hwaddr[4],netif->hwaddr[5]));
// maximum transfer unit
netif->mtu = ETH_MTU;
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_init: MTU set to %"U16_F"\n",netif->mtu));
// device capabilities
// don't set NETIF_FLAG_ETHARP if this device is not an ethernet one
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
/* Create task to handle link status changes */
xTaskCreate(ethLinkTask,
(signed char *)"eth-link",
DEFAULT_STACK_SIZE,
NULL,
ETH_LINK_TASK_PRIORITY,
ðLink_task_handle);
// Create the task that handles the incoming packets.
if (pdPASS == xTaskCreate(ethernetif_input,
( signed portCHAR * ) "eth-in",
netifINTERFACE_TASK_STACK_SIZE,
(void *)netif,
netifINTERFACE_TASK_PRIORITY,
NULL))
{
ETHServiceTaskEnable(0);
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_input: Waiting for Ethernet to become ready\n"));
ETHServiceTaskWaitReady(0);
EthernetPHYRead(ETH_BASE,ETH_INTSTATUS_REG);
EthernetIntClear(ETH_BASE, ETH_INT_PHY);
netif->flags |= NETIF_FLAG_LINK_UP;
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_init: Ethernet link is up\n"));
EthernetIntEnable(ETH_BASE, ETH_INT_PHY);
return ERR_OK;
}
else
{
LWIP_DEBUGF(NETIF_DEBUG, ("low_level_init: create receive task error\n"));
return ERR_IF;
}
}
/*
* This task will handle interrupts generated by the ethernet phy. All
* requests to the phy must be routed through the mac over the internal
* MII bus, making dealing with the phy a slow process that is not
* well suited for a real ISR. Generally, this task runs briefly after
* a phy interrupt, then suspends itself until the next interrupt.
*/
void ethLinkTask(void *pParams)
{
/* Wait for a phy interrupt to un-suspend */
vTaskSuspend(NULL);
LWIP_DEBUGF(NETIF_DEBUG, ("eth0 ISR: Ethernet link down\n"));
while (1) {
if (EthernetPHYRead(ETH_BASE, ETH_STATUS_REG) &
ETH_PHY_LINK_UP) {
/*
* Read the phy's interrupt register to clear the
* interrupts.
*/
EthernetPHYRead(ETH_BASE,ETH_INTSTATUS_REG);
HWREGBITW(ÐDevice[0], ETH_LINK_OK) = 1;
LWIP_DEBUGF(NETIF_DEBUG, ("eth0 link status: Ethernet link up\n"));
EthernetIntClear(ETH_BASE, ETH_INT_PHY);
EthernetIntEnable(ETH_BASE, ETH_INT_PHY);
/* Wait for a phy interrupt to un-suspend */
vTaskSuspend(NULL);
LWIP_DEBUGF(NETIF_DEBUG, ("eth0 ISR: Ethernet link down\n"));
}
else
vTaskDelay(ETH_LINK_TASK_WAIT_MS);
}
}
static void
lwIPInterruptTask(void *pvArg)
{
u8_t err;
pvArg = pvArg;
//
// Loop forever.
//
while(1)
{
//
// Wait until the semaphore has been signalled.
//
pvArg = OSQPend(LwIP_NetISR_Sem, 0, &err);
//
// Processes any packets waiting to be sent or received.
//
stellarisif_interrupt(&g_sNetIF);
//
// Re-enable the Ethernet interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
}
}
/**
* In this function, the hardware should be initialized.
* Called from stellarisif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void
stellarisif_hwinit(struct netif *netif)
{
u32_t temp;
//struct stellarisif *stellarisif = netif->state;
/* set MAC hardware address length */
netif->hwaddr_len = ETHARP_HWADDR_LEN;
#if 1
//
// Enable the Link OK and Link Activity LEDS.
//
GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinConfigure(GPIO_PF3_LED0);
GPIOPinConfigure(GPIO_PF2_LED1);
#endif
/* set MAC hardware address */
EthernetMACAddrGet(ETH_BASE, &(netif->hwaddr[0]));
/* maximum transfer unit */
netif->mtu = 1500;
/* device capabilities */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
/* Do whatever else is needed to initialize interface. */
/* Disable all Ethernet Interrupts. */
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
temp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, temp);
/* Initialize the Ethernet Controller. */
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
/*
* Configure the Ethernet Controller for normal operation.
* - Enable TX Duplex Mode
* - Enable TX Padding
* - Enable TX CRC Generation
* - Enable RX Multicast Reception
*/
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |ETH_CFG_TX_CRCEN |
ETH_CFG_TX_PADEN | ETH_CFG_RX_AMULEN));
/* Enable the Ethernet Controller transmitter and receiver. */
EthernetEnable(ETH_BASE);
/* Enable the Ethernet Interrupt handler. */
IntEnable(INT_ETH);
/* Enable Ethernet TX and RX Packet Interrupts. */
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
}
/**
* In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void low_level_init(struct netif *netif)
{
u32_t temp;
MAC_Type* mac = (MAC_Type*)netif->state;
//struct ethernetif *ethernetif = netif->state;
/* set MAC hardware address length */
netif->hwaddr_len = ETHARP_HWADDR_LEN;
/* set MAC hardware address */
EthernetMACAddrGet(mac, &(netif->hwaddr[0]));
/* maximum transfer unit */
netif->mtu = 1500;
/* device capabilities */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP
;//| NETIF_FLAG_LINK_UP;
/* Do whatever else is needed to initialize interface. */
/* Disable all Ethernet Interrupts. */
EthernetIntDisable(
mac,
(ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF
| ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
temp = EthernetIntStatus(mac, false);
EthernetIntClear(mac, temp);
/* Initialize the Ethernet Controller. */
EthernetInitExpClk(mac, system_clock_frequency);//SysCtlClockGet());
/*
* Configure the Ethernet Controller for normal operation.
* - Enable TX Duplex Mode
* - Enable TX Padding
* - Enable TX CRC Generation
* - Enable RX Multicast Reception
*/
EthernetConfigSet(
mac,
(ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN
| ETH_CFG_RX_AMULEN));
/* Enable the Ethernet Controller transmitter and receiver. */
EthernetEnable(mac);
/* Enable the Ethernet Interrupt handler. */
// IntEnable( INT_ETH);
NVIC_EnableIRQ(Ethernet_IRQn); //THIS IS BAD!
/* Enable Ethernet TX and RX Packet Interrupts. */
EthernetIntEnable(mac, ETH_INT_RX | ETH_INT_TX);
}
/**
* In this function, the hardware should be initialized.
* Called from stellarisif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void
stellarisif_hwinit(struct netif *netif)
{
u32_t temp;
//struct stellarisif *stellarisif = netif->state;
/* set MAC hardware address length */
netif->hwaddr_len = ETHARP_HWADDR_LEN;
/* set MAC hardware address */
EthernetMACAddrGet(ETH_BASE, &(netif->hwaddr[0]));
/* maximum transfer unit */
netif->mtu = 1500;
/* device capabilities */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
/* Do whatever else is needed to initialize interface. */
/* Disable all Ethernet Interrupts. */
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
temp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, temp);
/* Initialize the Ethernet Controller. */
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
/*
* Configure the Ethernet Controller for normal operation.
* - Enable TX Duplex Mode
* - Enable TX Padding
* - Enable TX CRC Generation
* - Enable RX Multicast Reception
*/
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |ETH_CFG_TX_CRCEN |
ETH_CFG_TX_PADEN | ETH_CFG_RX_AMULEN));
/* Enable the Ethernet Controller transmitter and receiver. */
EthernetEnable(ETH_BASE);
IntPrioritySet(INT_ETH, configKERNEL_INTERRUPT_PRIORITY);
/* Enable the Ethernet Interrupt handler. */
IntEnable(INT_ETH);
EthernetPHYWrite(ETH_BASE, PHY_MR17, PHY_MR17_LSCHG_IE);
/* Enable Ethernet TX and RX Packet Interrupts. */
EthernetIntEnable(ETH_BASE, ETH_INT_PHY | ETH_INT_RX | ETH_INT_TX);
}
//*****************************************************************************
//
// Low-Level initialization function for the Ethernet Controller.
//
//*****************************************************************************
void
low_level_init(struct netif *netif)
{
unsigned long ulTemp;
#if ENABLE_ETHERNET_QUEUE_IF
//
// Empty the ethernet frame queue
//
g_ulQueueRead = 0;
g_ulQueueWrite = 0;
#endif
//
// Disable all Ethernet Interrupts.
//
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER |
ETH_INT_RX));
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
//
// Initialize the Ethernet Controller.
//
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
//
// Configure the Ethernet Controller for normal operation.
// - Enable TX Duplex Mode
// - Enable TX Padding
// - Enable TX CRC Generation
//
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |
ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN));
//
// Enable the Ethernet Controller transmitter and receiver.
//
EthernetEnable(ETH_BASE);
//
// Enable the Ethernet Interrupt handler.
//
IntEnable(INT_ETH);
//
// Enable Ethernet TX and RX Packet Interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
}
/**
* This function with either place the packet into the Stellaris transmit fifo,
* or will place the packet in the interface PBUF Queue for subsequent
* transmission when the transmitter becomes idle.
*
* @param netif the lwip network interface structure for this ethernetif
* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
* @return ERR_OK if the packet could be sent
* an err_t value if the packet couldn't be sent
*
*/
static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
err_t status;
// Bump the reference count on the pbuf to prevent it from being
// freed till we are done with it.
pbuf_ref(p);
// Prevent from simultaneously writing to ETH TX FIFO
xSemaphoreTake(ETHTxAccessMutex[0], ( portTickType ) portMAX_DELAY);
// If Semaphore was given previously -> take it
while (xSemaphoreTake(ETHTxBinSemaphore[0], ( portTickType ) 0) == pdTRUE)
;
// If the transmitter is idle, send the pbuf now.
if (((HWREG(ETH_BASE + MAC_O_TR) & MAC_TR_NEWTX) == 0))
{
// Send packet via eth controller
status = low_level_transmit(netif, p);
}
else
{
LWIP_DEBUGF(CORTEX_DEBUG, ("low_level_output: Ethernet transmitter busy\n"));
// Enable generating transmit interrupt for eth. controller
EthernetIntEnable(ETH_BASE, ETH_INT_TX);
// Waiting for finishing transmitting from interrupt routine
xSemaphoreTake(ETHTxBinSemaphore[0], ( portTickType ) portMAX_DELAY);
// Send packet via eth controller
status = low_level_transmit(netif, p);
// Disable generating transmit interrupt for eth. controller
EthernetIntDisable(ETH_BASE, ETH_INT_TX);
}
// Release mutex
xSemaphoreGive(ETHTxAccessMutex[0]);
//pf vTaskDelay(10 / portTICK_RATE_MS);
pbuf_free(p);
return status;
}
//*****************************************************************************
//
// Low-Level initialization function for the Ethernet Controller.
//
//*****************************************************************************
rt_err_t luminaryif_init(rt_device_t dev)
{
unsigned long ulTemp;
//
// Disable all Ethernet Interrupts.
//
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER |
ETH_INT_RX));
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
//
// Initialize the Ethernet Controller.
//
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
//
// Configure the Ethernet Controller for normal operation.
// - Enable TX Duplex Mode
// - Enable TX Padding
// - Enable TX CRC Generation
// - Enable reception of multicast packets
//
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |
ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN | ETH_CFG_RX_AMULEN));
//
// Enable the Ethernet Controller transmitter and receiver.
//
EthernetEnable(ETH_BASE);
//
// Enable the Ethernet Interrupt handler.
//
IntEnable(INT_ETH);
//
// Enable Ethernet TX and RX Packet Interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
return RT_EOK;
}
/**
* \brief Ethernet IO function.
* \param void There are no parameters needed.
* \return No return values.
*/
static void
eth_poll(void)
{
/*Get Buffer*/
uip_len = (u16_t)EthernetPacketGet(ETH_BASE, uip_buf, UIP_BUFSIZE);
if(uip_len > 0) {
if(BUF->type == HTONS(UIP_ETHTYPE_IP)) {
uip_arp_ipin();
uip_input();
if(uip_len > 0) {
uip_arp_out();
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
}
} else if(BUF->type == HTONS(UIP_ETHTYPE_ARP)) {
uip_arp_arpin();
if(uip_len > 0) {
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
}
}
}
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
}
//*****************************************************************************
//
// Low-Level receive routine. Should allocate a pbuf and transfer the bytes
// of the incoming packet from the interface into the pbuf.
//
//*****************************************************************************
struct pbuf * luminaryif_rx(rt_device_t dev)
{
struct pbuf *p, *q;
u16_t len;
unsigned long ulTemp;
int i;
unsigned long *ptr;
if(!EthernetPacketAvail(ETH_BASE))
{
//
// Enable Ethernet RX Interrupt.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
return(NULL);
}
//
// Obtain the size of the packet and put it into the "len" variable.
// Note: The length returned in the FIFO length position includes the
// two bytes for the length + the 4 bytes for the FCS.
//
ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
len = ulTemp & 0xFFFF;
//
// We allocate a pbuf chain of pbufs from the pool.
//
p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if(p != NULL)
{
//
// Place the first word into the first pbuf location.
//
*(unsigned long *)p->payload = ulTemp;
p->payload = (char *)(p->payload) + 4;
p->len -= 4;
//
// Process all but the last buffer in the pbuf chain.
//
q = p;
while(q != NULL)
{
//
// Setup a byte pointer into the payload section of the pbuf.
//
ptr = q->payload;
//
// Read data from FIFO into the current pbuf
// (assume pbuf length is modulo 4)
//
for(i = 0; i < q->len; i += 4)
{
*ptr++ = HWREG(ETH_BASE + MAC_O_DATA);
}
//
// Link in the next pbuf in the chain.
//
q = q->next;
}
//
// Restore the first pbuf parameters to their original values.
//
p->payload = (char *)(p->payload) - 4;
p->len += 4;
#if LINK_STATS
lwip_stats.link.recv++;
#endif
}
else
{
//
// Just read all of the remaining data from the FIFO and dump it.
//
for(i = 4; i < len; i+=4)
{
ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
}
#if LINK_STATS
lwip_stats.link.memerr++;
lwip_stats.link.drop++;
#endif
}
return(p);
}
//*****************************************************************************
//
// This example demonstrates the use of the Ethernet Controller with the uIP
// TCP/IP stack.
//
//*****************************************************************************
int
main(void)
{
uip_ipaddr_t ipaddr;
static struct uip_eth_addr sTempAddr;
long lPeriodicTimer, lARPTimer, lPacketLength;
unsigned long ulUser0, ulUser1;
unsigned long ulTemp;
//
// Set the clocking to run directly from the crystal.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
//
// Initialize the OLED display.
//
RIT128x96x4Init(1000000);
RIT128x96x4StringDraw("Ethernet with uIP", 12, 0, 15);
//
// Enable and Reset the Ethernet Controller.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
//
// Enable Port F for Ethernet LEDs.
// LED0 Bit 3 Output
// LED1 Bit 2 Output
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
//
// Configure SysTick for a periodic interrupt.
//
SysTickPeriodSet(SysCtlClockGet() / SYSTICKHZ);
SysTickEnable();
SysTickIntEnable();
//
// Intialize the Ethernet Controller and disable all Ethernet Controller
// interrupt sources.
//
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
//
// Initialize the Ethernet Controller for operation.
//
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
//
// Configure the Ethernet Controller for normal operation.
// - Full Duplex
// - TX CRC Auto Generation
// - TX Padding Enabled
//
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN |
ETH_CFG_TX_PADEN));
//
// Wait for the link to become active.
//
RIT128x96x4StringDraw("Waiting for Link", 12, 8, 15);
ulTemp = EthernetPHYRead(ETH_BASE, PHY_MR1);
while((ulTemp & 0x0004) == 0)
{
ulTemp = EthernetPHYRead(ETH_BASE, PHY_MR1);
}
RIT128x96x4StringDraw("Link Established", 12, 16, 15);
//
// Enable the Ethernet Controller.
//
EthernetEnable(ETH_BASE);
//
// Enable the Ethernet interrupt.
//
IntEnable(INT_ETH);
//
// Enable the Ethernet RX Packet interrupt source.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
//
// Enable all processor interrupts.
//
IntMasterEnable();
//
// Initialize the uIP TCP/IP stack.
//
uip_init();
#ifdef USE_STATIC_IP
uip_ipaddr(ipaddr, DEFAULT_IPADDR0, DEFAULT_IPADDR1, DEFAULT_IPADDR2,
DEFAULT_IPADDR3);
uip_sethostaddr(ipaddr);
DisplayIPAddress(ipaddr, 18, 24);
uip_ipaddr(ipaddr, DEFAULT_NETMASK0, DEFAULT_NETMASK1, DEFAULT_NETMASK2,
DEFAULT_NETMASK3);
uip_setnetmask(ipaddr);
#else
uip_ipaddr(ipaddr, 0, 0, 0, 0);
uip_sethostaddr(ipaddr);
DisplayIPAddress(ipaddr, 18, 24);
uip_ipaddr(ipaddr, 0, 0, 0, 0);
uip_setnetmask(ipaddr);
#endif
//
// Configure the hardware MAC address for Ethernet Controller filtering of
// incoming packets.
//
// For the Ethernet Eval Kits, the MAC address will be stored in the
// non-volatile USER0 and USER1 registers. These registers can be read
// using the FlashUserGet function, as illustrated below.
//
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
//
// We should never get here. This is an error if the MAC address has
// not been programmed into the device. Exit the program.
//
RIT128x96x4StringDraw("MAC Address", 0, 16, 15);
RIT128x96x4StringDraw("Not Programmed!", 0, 24, 15);
while(1)
{
}
}
//
// Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
// address needed to program the hardware registers, then program the MAC
// address into the Ethernet Controller registers.
//
sTempAddr.addr[0] = ((ulUser0 >> 0) & 0xff);
sTempAddr.addr[1] = ((ulUser0 >> 8) & 0xff);
sTempAddr.addr[2] = ((ulUser0 >> 16) & 0xff);
sTempAddr.addr[3] = ((ulUser1 >> 0) & 0xff);
sTempAddr.addr[4] = ((ulUser1 >> 8) & 0xff);
sTempAddr.addr[5] = ((ulUser1 >> 16) & 0xff);
//
// Program the hardware with it's MAC address (for filtering).
//
EthernetMACAddrSet(ETH_BASE, (unsigned char *)&sTempAddr);
uip_setethaddr(sTempAddr);
//
// Initialize the TCP/IP Application (e.g. web server).
//
httpd_init();
#ifndef USE_STATIC_IP
//
// Initialize the DHCP Client Application.
//
dhcpc_init(&sTempAddr.addr[0], 6);
dhcpc_request();
#endif
//
// Main Application Loop.
//
lPeriodicTimer = 0;
lARPTimer = 0;
while(true)
{
//
// Wait for an event to occur. This can be either a System Tick event,
// or an RX Packet event.
//
while(!g_ulFlags)
{
}
//
// If SysTick, Clear the SysTick interrupt flag and increment the
// timers.
//
if(HWREGBITW(&g_ulFlags, FLAG_SYSTICK) == 1)
{
HWREGBITW(&g_ulFlags, FLAG_SYSTICK) = 0;
lPeriodicTimer += SYSTICKMS;
lARPTimer += SYSTICKMS;
}
//
// Check for an RX Packet and read it.
//
lPacketLength = EthernetPacketGetNonBlocking(ETH_BASE, uip_buf,
sizeof(uip_buf));
if(lPacketLength > 0)
{
//
// Set uip_len for uIP stack usage.
//
uip_len = (unsigned short)lPacketLength;
//
// Clear the RX Packet event and renable RX Packet interrupts.
//
if(HWREGBITW(&g_ulFlags, FLAG_RXPKT) == 1)
{
HWREGBITW(&g_ulFlags, FLAG_RXPKT) = 0;
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
}
//
// Process incoming IP packets here.
//
if(BUF->type == htons(UIP_ETHTYPE_IP))
{
uip_arp_ipin();
uip_input();
//
// If the above function invocation resulted in data that
// should be sent out on the network, the global variable
// uip_len is set to a value > 0.
//
if(uip_len > 0)
{
uip_arp_out();
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
uip_len = 0;
}
}
//
// Process incoming ARP packets here.
//
else if(BUF->type == htons(UIP_ETHTYPE_ARP))
{
uip_arp_arpin();
//
// If the above function invocation resulted in data that
// should be sent out on the network, the global variable
// uip_len is set to a value > 0.
//
if(uip_len > 0)
{
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
uip_len = 0;
}
}
}
//
// Process TCP/IP Periodic Timer here.
//
if(lPeriodicTimer > UIP_PERIODIC_TIMER_MS)
{
lPeriodicTimer = 0;
for(ulTemp = 0; ulTemp < UIP_CONNS; ulTemp++)
{
uip_periodic(ulTemp);
//
// If the above function invocation resulted in data that
// should be sent out on the network, the global variable
// uip_len is set to a value > 0.
//
if(uip_len > 0)
{
uip_arp_out();
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
uip_len = 0;
}
}
#if UIP_UDP
for(ulTemp = 0; ulTemp < UIP_UDP_CONNS; ulTemp++)
{
uip_udp_periodic(ulTemp);
//
// If the above function invocation resulted in data that
// should be sent out on the network, the global variable
// uip_len is set to a value > 0.
//
if(uip_len > 0)
{
uip_arp_out();
EthernetPacketPut(ETH_BASE, uip_buf, uip_len);
uip_len = 0;
}
}
#endif // UIP_UDP
}
//
// Process ARP Timer here.
//
if(lARPTimer > UIP_ARP_TIMER_MS)
{
lARPTimer = 0;
uip_arp_timer();
}
}
}
