}, \ } #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on, \ _gpio_nr, _active_high, _boot_state, _millivolts) \ FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on, \ _gpio_nr, _active_high, _boot_state, _millivolts, true) /* common to most of boards*/ FIXED_REG(0, en_5v_cp, en_5v_cp, NULL, 1, 0, TPS6591X_GPIO_0, true, 1, 5000); FIXED_REG(1, en_5v0, en_5v0, NULL, 0, 0, TPS6591X_GPIO_4, true, 0, 5000); FIXED_REG(2, en_ddr, en_ddr, NULL, 0, 0, TPS6591X_GPIO_3, true, 1, 1500); FIXED_REG(3, en_3v3_sys, en_3v3_sys, NULL, 0, 0, TPS6591X_GPIO_1, true, 0, 3300); FIXED_REG(4, en_vdd_bl, en_vdd_bl, NULL, 0, 0, TEGRA_GPIO_PK3, true, 1, 5000); FIXED_REG(5, en_3v3_modem, en_3v3_modem, NULL, 1, 0, TEGRA_GPIO_PD6, true, 1, 3300); FIXED_REG(6, en_vdd_pnl1, en_vdd_pnl1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL4, true, 1, 3300); FIXED_REG(7, cam3_ldo_en, cam3_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PS0, true, 0, 3300); FIXED_REG(8, en_vdd_com, en_vdd_com, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD0, true, 1, 3300); FIXED_REG(9, en_3v3_fuse, en_3v3_fuse, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL6, true, 0, 3300); FIXED_REG(10, en_3v3_emmc, en_3v3_emmc, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD1, true, 1, 3300); FIXED_REG(11, en_vdd_sdmmc1, en_vdd_sdmmc1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PD7, true, 1, 3300); FIXED_REG(12, en_3v3_pex_hvdd, en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL7, true, 0, 3300); FIXED_REG(13, en_1v8_cam, en_1v8_cam, ricoh583_rails(DC2), 0, 0, TEGRA_GPIO_PBB4, true, 0, 1800); /* E1198/E1291 specific*/ FIXED_REG(18, cam1_ldo_en, cam1_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PR6, true, 0, 2800); FIXED_REG(19, cam2_ldo_en, cam2_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PR7, true, 0, 2800); FIXED_REG(22, en_vbrtr, en_vbrtr, FIXED_SUPPLY(en_3v3_sys), 0, 0, PMU_TCA6416_GPIO_PORT12,true, 0, 3300); /*Specific to pm269*/ FIXED_REG(4, en_vdd_bl_pm269, en_vdd_bl, NULL, 0, 0, TEGRA_GPIO_PH3, true, 1, 5000);
static struct platform_device fixed_reg_##_var##_dev = { \
.name = "reg-fixed-voltage", \
.id = _id, \
.dev = { \
.platform_data = &fixed_reg_##_var##_pdata, \
}, \
}
/* common to most of boards*/
FIXED_REG(0, en_5v_cp, en_5v_cp, NULL, 1, 0, TPS6591X_GPIO_0, true, 1, 5000);
FIXED_REG(1, en_5v0, en_5v0, NULL, 0, 0, TPS6591X_GPIO_2, true, 0, 5000);
FIXED_REG(2, en_ddr, en_ddr, NULL, 1, 0, TPS6591X_GPIO_6, true, 1, 1500);
FIXED_REG(3, en_3v3_sys, en_3v3_sys, NULL, 0, 0, TPS6591X_GPIO_7, true, 1, 3300);
FIXED_REG(4, en_vdd_bl, en_vdd_bl, NULL, 0, 0, TEGRA_GPIO_PK3, true, 1, 5000);
FIXED_REG(5, en_3v3_modem, en_3v3_modem, NULL, 1, 0, TEGRA_GPIO_PD6, true, 1, 3300);
FIXED_REG(6, en_vdd_pnl1, en_vdd_pnl1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL4, true, 1, 3300);
FIXED_REG(7, cam3_ldo_en, cam3_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PS0, true, 0, 3300);
FIXED_REG(8, en_vdd_com, en_vdd_com, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD0, true, 1, 3300);
FIXED_REG(9, en_3v3_fuse, en_3v3_fuse, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL6, true, 0, 3300);
FIXED_REG(10, en_3v3_emmc, en_3v3_emmc, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD1, true, 1, 3300);
FIXED_REG(11, en_vdd_sdmmc1, en_vdd_sdmmc1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PD7, true, 1, 3300);
FIXED_REG(12, en_3v3_pex_hvdd, en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL7, true, 0, 3300);
FIXED_REG(13, en_1v8_cam, en_1v8_cam, tps6591x_rails(VIO), 0, 0, TEGRA_GPIO_PBB4, true, 0, 1800);
/* Specific to E1187/E1186/E1256 */
FIXED_REG(14, dis_5v_switch_e118x, dis_5v_switch, FIXED_SUPPLY(en_5v0), 0, 0, TEGRA_GPIO_PX2, false, 0, 5000);
/* E1291-A04/A05 specific */
FIXED_REG(1, en_5v0_a04, en_5v0, NULL, 0, 0, TPS6591X_GPIO_8, true, 0, 5000);
FIXED_REG(2, en_ddr_a04, en_ddr, NULL, 1, 0, TPS6591X_GPIO_7, true, 1, 1500);
FIXED_REG(3, en_3v3_sys_a04, en_3v3_sys, NULL, 0, 0, TPS6591X_GPIO_6, true, 1, 3300);
.enabled_at_boot = _boot_state, \
.init_data = &ri_data_##_var, \
}; \
static struct platform_device fixed_reg_##_var##_dev = { \
.name = "reg-fixed-voltage", \
.id = _id, \
.dev = { \
.platform_data = &fixed_reg_##_var##_pdata, \
}, \
}
/* A00 specific */
FIXED_REG(1, en_3v3_sys_a00, en_3v3_sys_a00, NULL,
1, 0, MAX77663_GPIO_BASE + MAX77663_GPIO3, true, 1, 3300);
FIXED_REG(2, en_avdd_hdmi_usb_a00, en_avdd_hdmi_usb_a00, FIXED_SUPPLY(en_3v3_sys_a00),
1, 0, MAX77663_GPIO_BASE + MAX77663_GPIO2, true, 1, 3300);
FIXED_REG(3, en_1v8_cam_a00, en_1v8_cam, max77663_rails(sd2),
0, 0, TEGRA_GPIO_PS0, true, 0, 1800);
FIXED_REG(4, en_vddio_vid_a00, en_vddio_vid, NULL,
0, 0, TEGRA_GPIO_PB2, true, 0, 5000);
FIXED_REG(5, en_3v3_modem_a00, en_3v3_modem, NULL,
1, 1, TEGRA_GPIO_PP0, true, 0, 3300);
FIXED_REG(6, en_vdd_pnl_a00, en_vdd_pnl, FIXED_SUPPLY(en_3v3_sys_a00),
0, 0, TEGRA_GPIO_PW1, true, 1, 3300);
FIXED_REG(7, en_cam3_ldo_a00, en_cam3_ldo, FIXED_SUPPLY(en_3v3_sys_a00),
0, 0, TEGRA_GPIO_PR7, true, 0, 3300);
FIXED_REG(8, en_vdd_com_a00, en_vdd_com, FIXED_SUPPLY(en_3v3_sys_a00),
1, 0, TEGRA_GPIO_PD0, true, 0, 3300);
FIXED_REG(9, en_vdd_sdmmc1_a00, en_vdd_sdmmc1, FIXED_SUPPLY(en_3v3_sys_a00),
0, 0, TEGRA_GPIO_PC6, true, 0, 3300);
